Patent Application
20050141166
1. Field of the Invention
The present invention relates to an ESD protection component that protects an electronic device against static electricity.
2. Background Art
The withstand voltage of an electronic part used for an electronic device is becoming low with a rapid progress in downsizing and higher performance of an electronic device such as a mobile phone. Consequently, the number of failures is increasing where static pulses occurring when a human body touches a terminal of an electronic device destroy an electronic part inside the electronic device.
Conventionally, the following method has been well known for protecting from such static pulses. That is to say, provide a laminated chip varistor or Zener diode between a line to which static electricity is input and the ground, to bypass static electricity for suppressing a voltage applied to an electronic part inside an electronic device.
In addition, a growing number of antistatic areas against static pulses are seen with downsizing and higher performance of an electronic device. Consequently, a demand is particularly increasing for antistatic measures for a component with a plurality of parts arranged in an array, as well as for a single part. Further, a demand for downsizing and slimming down is also increasing recently.
One of Electro Static Discharge (ESD) protection components that meet the demand for downsizing, arraying, and slimming down is a varistor. A method of manufacturing the varistor is disclosed in Japanese Patent Laid-Open Application No. S63-316405. The method discloses a step of screen-printing a varistor paste made of varistor powder and a glass component on one surface of a baked ceramic substrate to form a varistor pattern, and then baking it. In addition, using alumina or the like, with a high mechanical strength, for the ceramic substrate allows an ESD protection component that meets a demand for arraying and slimming down to be implemented.
Generally, it is known that the arrangement structure of particles after baking largely influences the varistor characteristic. This characteristic appears owing to existence of an insulating layer at grain boundaries of semiconductor particles such as zinc oxide that is the principal component of a varistor. In a case where formed with screen printing, the percentage of varistor content in the paste must be small by all means if the pattern shape is to be printed with a high degree of accuracy. Still, the uniformity of the varistor particles in the paste is not so great.
Therefore, a large number of cracks and holes occur inside a varistor film formed with conventional screen-printing, and areas without insulating films at grain boundaries of semiconductor particles like zinc oxide will increase as well. Thus, a high-performance varistor characteristic cannot be achieved with screen printing. In addition, the varistor characteristic was not uniform and reliability was low.
The method of manufacturing an ESD protection component according to the present invention includes at least a step of producing slurry by mixing varistor particles, a resin binder, a plasticizer, and a solvent; a step of producing a varistor green sheet by coating a film with the slurry and then drying it; a step of forming a conductor layer; a step of forming an adhesive layer including a resin as its principal component, on at least one side of a ceramic substrate; a step of sticking the varistor green sheet on the adhesive layer; and a step of baking at a temperature at which the varistor particles substantively sinter. The invention provides a method of manufacturing high-performance, small-variation ESD protection components.
The present invention relates to a method of manufacturing an ESD protection component, a method that includes at least a step of producing slurry including varistor particles and a resin binder; a step of producing a varistor green sheet from the slurry; a step of forming a conductor layer; a step of forming an adhesive layer on a ceramic substrate; a step of sticking the varistor green sheet on the adhesive layer; and a step of baking. This invention provides a method of manufacturing high-performance, highly uniform ESD protection components.
The present invention relates to a method of manufacturing an ESD protection component where conductor layers are formed on the top and bottom of a varistor green sheet. This invention efficiently provides a method of manufacturing an ESD protection component with a more complicated structure.
The present invention relates to a method of manufacturing an ESD protection component where conductor layers are formed at an inner layer part and at a surface layer part of a varistor green sheet. This invention provides a method of manufacturing a more high-performance varistor with high productivity.
The present invention relates to a method of manufacturing an ESD protection component where a varistor material is used including varistor particles with zinc oxide as its principal component. This invention provides a method of manufacturing an extremely high-performance ESD protection component.
The present invention relates to a method of manufacturing an ESD protection component that contains in the adhesive layer, at least one of inorganic components out of zinc oxide, bismuth oxide, cobalt oxide, manganese oxide, and antimony oxide. This invention provides a method of manufacturing an extremely high-performance ESD protection component with high reliability.
The present invention relates to a method of manufacturing an ESD protection component where the adhesive layer contains 5 to 20 w/t parts of inorganic component against 100 w/t parts of resin that is the principal component of the adhesive layer. This invention provides a method of manufacturing an ESD protection component in which the varistor green sheet securely adheres to the ceramic substrate.
The present invention relates to a method of manufacturing an ESD protection component in which the porosity of the varistor green sheet stuck to the ceramic substrate is 5% to 20%. This invention provides a method of stably manufacturing a high-performance ESD protection component.
The present invention relates to a method of manufacturing an ESD protection component that uses a ceramic substrate formed with a through-hole, with a diameter of 0.1 mm to 0.5 mm, thereon. This invention provides a method of manufacturing an ESD protection component in which the varistor green sheet strongly adheres to the ceramic substrate when sintered.
The present invention relates to a method of manufacturing an ESD protection component that uses a ceramic substrate formed with slits thereon. This invention provides a method of manufacturing an ESD protection component with high productivity and low costs owing to the cost saving effects of cutting off the substrate.
The present invention relates to a method of manufacturing an ESD protection component, where the method includes a step of covering the ceramic substrate with an insulation layer made of an organic material after baking. This invention provides a method of manufacturing an ESD protection component with high reliability, with an external electrode being easily plated.
The present invention relates to a method of manufacturing an ESD protection component, where the method includes a step of covering the ceramic substrate with an insulation layer made of an inorganic material before baking. This invention provides a method of manufacturing an ESD protection component with high productivity, with an external electrode being easily plated.
The present invention relates to a method of manufacturing an ESD protection component provided with a ceramic substrate made of a low temperature co-fired ceramic material, and having a wiring layer internally. This invention provides a method of manufacturing an ESD protection component combined with an electronic circuit.
The present invention relates to a method of manufacturing an ESD protection component where a varistor green sheet is formed from varistor particles, a conductor layer is formed, the sheet is stuck to a ceramic substrate through an adhesive layer, and then sintered. This invention provides a method of manufacturing an ESD protection component with high performance, small variation, and high reliability, owing to the high percentage of varistor content in the green sheet, and small variation in density, enabling downsizing, arraying, and slimming down.
A detailed description is made for a method of manufacturing an ESD protection component according to the first embodiment of the present invention, using an example.
ESD protection component 101 includes ceramic substrate 11, varistor layer 12, conductor layers 13 and 14, and terminal electrodes 15 and 16. In other words, conductor layer 13 is formed with a conductive material such as silver, on ceramic substrate 11 such as 96% alumina, a layer made of a varistor material is formed thereon, and baked, to produce varistor layer 12. Further, conductor layer 14 is provided on this varistor layer 12 to form a varistor element in which varistor layer 12 is sandwiched by conductor layers 13 and 14. Finally, terminal electrodes 15 and 16 that connect to conductor layers 13 and 14, respectively, are provided at both ends of substrate 11, to complete ESD protection component 101 having a varistor characteristic.
Next, a description is made for an example method of producing ESD protection component 101, using
First of all, add 8.0 g of polyvinyl butyral as a binder, 5.0 g of dibutyl phthalate as a plasticizer, and 80.0 g of butyl acetate as a solvent, to 100 g of varistor powder which is a mixture of bismuth oxide, manganese oxide, cobalt oxide, and antimony oxide, added to zinc oxide, and then mix it in a ball mill for 40 hours to produce slurry.
Next, coat a PET film with the slurry produced with conventional doctor blade method, for example, to produce varistor green sheet 18 with a thickness of approximately 30 μm. The thickness of the green sheet can be selected as appropriate according to a characteristic and a shape required.
For example, the sheet can be used as a layered product. In order to produce varistor green sheet 18 with a required thickness from the aspect of a varistor characteristic and productivity, a plurality of green sheets with different thicknesses may be preliminarily produced and combined to obtain varistor green sheet 18 with a targeted thickness.
Next, prepare an alumina substrate with 10 mm×10 mm×0.6 mm in thickness shown in
Next, as shown in
Next, as shown in
Varistor green sheet 18 produced in such a way is transferred on adhesive layer 17, stuck, and thermo-compressed at 100° C. with 500 kg/cm2.
Next, an electrode pattern for conductor layer 14 is printed on varistor green sheet 18 transferred and stuck on adhesive layer 17 as shown in
After that, when the substrate composed as shown in
In example 1, the description is made for a method in which conductor layer 13 is formed on alumina substrate 11, and then adhesive layer 17 is formed. As another method, the following one can be also used. That is, form conductor layer 14 on the top surface of varistor green sheet 18, print conductor layer 13 also on the bottom surface preliminarily, and then transfer and stick varistor green sheet 18 on alumina substrate 11 having adhesive layer 17.
The basic structure of ESD protection component 107 is the same as ESD protection component 101 as shown in
Next, a description is made for an example method of producing ESD protection component 107 according to example 2, using
First, varistor green sheet 19 is produced in the same way as in example 1. This varistor green sheet 19 is cut into two sheets with the size of 10 mm×10 mm, and electrode patterns for conductor layers 13 and 14 are printed and formed on respective varistor green sheets 19 using silver paste with screen printing.
After that, as shown in
Next, as shown in
The substrate produced in this way is baked at 900° C. for two hours. Further, terminal electrodes 15 and 16 are coated and formed on both end surfaces with silver paste, and then baked at 850° C. to produce ESD protection component 107.
With the method of manufacturing according to example 2, an ESD protection component having a minute and highly accurate conductor structure can be produced efficiently.
Table 1 shows the varistor characteristic (voltage-current characteristic) of an ESD protection component produced in such a way. Still, as a comparative example, an ESD protection component with the structure shown in
Hereinafter, an evaluation method is described.
V (1 mA), which is a voltage when a current of 1 mA is applied between terminal electrodes 15 and 16 of the ESD protection component produced; and V (0.1 mA), which is a voltage when a current of 0.1 mA is applied, are measured, and V (1 mA)/V (0.1 mA), which is a ratio of both voltages, is evaluated as varistor characteristic α-value. The varistor characteristic α-value closer to one shows a better varistor characteristic, meaning an excellent ESD protection component is produced.
As shown in table 1, α-values of the samples number 11 through 15 are all 1.5 or more, meaning a poor varistor characteristic, and its ratio varies widely between 1.5 and 2.0, for the samples that are produced by screen-printing the varistor paste for comparative examples. The close-up observation of the samples for the comparative examples reveals many large bores and cracks inside the varistor layer. These bores and cracks presumably cause deterioration and variation in varistor characteristic.
Meanwhile, for the sample, for the samples number 21 through 25, related to ESD protection component 101 in example 1, produced with the method described in the first embodiment, and for the samples number 31 through 35, related to ESD protection component 107 in example 2, it is proved that the values of varistor characteristic α-value have an average of approximately 1.2, meaning to be excellent, and its variation is small.
In the second embodiment of the present invention, a description is made for the component of adhesive to be used for adhesive layer 17. In the first embodiment, adhesive layer 17 is formed using a solution of polyvinyl butyral and dibutyl phthalate mixed at a weight ratio of 1:10. Varistor particles, and inorganic materials, namely constituent materials for varistor particles, such as zinc oxide, bismuth oxide, cobalt oxide, manganese oxide, or antimony oxide, are dispersed in the solution.
Table 2 compares the characteristics of an ESD protection component, when changing the kind of an inorganic material dispersed in adhesive layer 17, and its added amount (added amount per 100 g of adhesive). Ten pieces of ESD protection components 107 are produced per each condition using substrates with 15 cm×15 cm. The probability that peeling occurs after baking and the average value of the varistor characteristics a are measured as evaluation items.
As shown in table 2, sample 41 with no adhesive added, and sample 42 with small amount of adhesive added, show peeling after baking with probabilities of 2/10 and 1/10, respectively. Meanwhile, sample 46 with adhesive added 25 w/t % of the inorganic material shows peeling because adhesive layer 17 is less effective. In contrast, the samples with adhesive added 5% to 20% by weight, which is within the range according to the present invention, show no peeling, even for a large substrate, and also the varistor characteristic a is excellent, between 1.15 and 1.20. From these results, the addition amount of varistor particles to adhesive layer 17 is desirably 5% to 20% by weight.
Still, as in samples 47 through 56, adding the inorganic material composing varistor particles, such as zinc oxide, bismuth oxide, cobalt oxide, manganese oxide, and antimony oxide, instead of varistor particles, also brings the same effect. In such a case, added amount is also desirably 5% to 20% by weight.
As described above, adding a proper amount of varistor particles, which are inorganic components, and an inorganic material composing varistor particles, such as zinc oxide, bismuth oxide, cobalt oxide, manganese oxide, and antimony oxide, in the adhesive composing adhesive layer 17, suppresses peeling when baking, providing a method of manufacturing an ESD protection component with excellent varistor characteristic α.
The third embodiment of the present invention describes a relation of the porosity of varistor green sheet 19 shown in
In the third embodiment, the pressing pressure and temperature in the transferring or laminating step are changed to control the porosity of varistor green sheet 19.
Ten pieces of ESD protection components 107 shown in
As shown in table 3, increasing the pressure in the step of transferring or laminating to decrease the porosity causes the varistor characteristic α-value to be reduced as in samples 61 through 65. In a porosity range of 5% to 20%, the α-value is excellent, 1.10 to 1.15, proving that a high-performance ESD protection component is yielded.
However, reducing the porosity down to 3% as in sample 66 results in as large as 4/10 of probability that peeling occurs after baking. This is because a too small porosity causes air not to be exhausted and to remain, at the interface between the layered product of varistor green sheet 19 and alumina substrate 11, when laminating onto alumina substrate 11, generating incompletely contacting areas. From the above, the porosity of varistor green sheet 19 to be stuck to alumina substrate 11 is desirably 5% to 20%.
The fourth embodiment of the present invention prepares alumina substrate 11 provided with a through-hole with a diameter of 0.2 mm at 0.5 mm intervals, roughly all over the surface. When sticking the layered product of varistor green sheet 19, which is sample 66 with porosity 3%, used in the third embodiment, to alumina substrate 11, and baking it, no peeling occurs after baking.
This shows that air can be successfully exhausted through a through-hole bored in alumina substrate 11. Therefore, even varistor green sheet 19 having a small porosity can be successfully exhausted, which the air at the interface between the layered product of varistor green sheet 19 and alumina substrate 11 is difficult to vent. Consequently, the layered product of varistor green sheet 19 is presumably able to contact the whole surface of alumina substrate 11, because air does not remain between the layered product and alumina substrate 11.
Table 4 shows the evaluation result for samples provided with through-holes having different diameters and different porosities. Samples 71 through 75 shown in table 4 are those stuck with the layered product of varistor green sheet 19 with small porosity, used for sample 66, on alumina substrate 11 with through-holes having different diameters, and then baked. The probability of peeling in table 4 is the evaluation result of peeling ratio of varistor layer 12 from alumina substrate 11 after baking.
As shown in table 4, when the diameter of a through-hole is less than 0.1 mm such as in sample 71, air is resistant to be exhausted and the peeling rate is increased. When the diameter is larger than 0.1 mm, the peeling rate becomes 0/10, a favorable value. However, when the diameter is more than 0.5 mm, varistor layer 12 deforms at the periphery of the through-hole to cause cracks to occur. This proves the diameter of a through-hole bored on alumina substrate 11 is desirably 0.1 mm to 0.5 mm. In this way, providing a through-hole on alumina substrate 11 enables varistor green sheet 19, with small porosity, to be transferred and stuck uniformly on the whole surface of alumina substrate 11, without bubbles remaining at the interface to be bonded. This provides a method of manufacturing an ESD protection component without peeling occurring after baking.
The ESD protection component in the fifth embodiment differs from ESD protection component 107 described in the first embodiment in that alumina substrate 11 has slit 21 of 0.1 mm depth on at least one side. After varistor green sheets 18 and 19 are stuck through adhesive layer 17 with the same method as in embodiments 1 and 2, on the other surface of alumina substrate 11, where slit 21 is not formed, collected body 110 is produced formed with varistor layer 12, conductor layers 13 and 14, by baking.
Next, applying a stress to slit 21 of collected body 110 along alumina substrate 11 can dice alumina substrate 11 together with varistor layer 12 baked, with slit 21 as a base point. In this case of dicing, peeling at the interface of varistor layer 12 and alumina substrate 11, chips in varistor layer 12, or the like is not found, which ensures no defect is occurring.
Usually, when dicing an object formed with a large number of ESD protection components in a matrix form on alumina substrate 11, a dicer or the like is used for cutting off. Such a conventional dicing method requires time and money, while the method according to the present invention has an advantage that dicing is made very efficiently and reliably.
Because ESD protection component 111 is used as a surface mounting part, the surface layer can be nickel-tin-plated for improving solder wettability of terminal electrodes 15 and 16.
In this case, if the surface of varistor layer 12 is exposed, there is a problem that causes a short circuit due to a deposition of a plated film on the surface of varistor layer.
In order to solve this problem, a thermosetting resin is printed so as to cover the surface of varistor layer 12 after baking, and is heated for curing at a predetermined temperature to form insulation layer 20. Forming insulation layer 20 eliminates exposure of varistor layer 12, and thus a plated film does not deposit on the surface of varistor layer 12 even if nickel-tin-plated, preventing a short circuit.
In addition, it is also possible to form insulation layer 20 made of glass before baking varistor green sheets 18 and 19. In this case, a glass paste is printed or laminated on the most outer surfaces of varistor green sheets 18 and 19 before baking. Alumina substrate 11, varistor green sheets 18 and 19, conductor layers 13 and 14, and the glass paste layer having been formed, are baked at the same time to produce ESD protection component 111 including insulation layer 20 made of glass. Forming insulation layer 20 on the varistor layer 12 with this method prevents a plated film to deposit on varistor layer 12 even if nickel-tin-plated, and thus a short circuit does not occur. Making insulation layer 20 of glass allows the heat resistance and reliability to be further enhanced.
Here, a material for insulation layer 20 is not especially limited as far as it does not deteriorate the varistor characteristic. For example, glass ceramic or borosilicate glass that has a property of low-temperature co-firing, including alumina for example, can be used.
Hereinafter, a description is made for an example of manufacturing an ESD protection component using a ceramic substrate including a wiring layer inside the ceramic substrate that is made of a low temperature co-fired ceramic material, with a method of manufacturing according to the present invention.
An example is shown where a low temperature co-fired ceramic material made of a mixture of ceramic and glass is used for ceramic substrate 11.
Preliminarily, a material that is a mixture of alumina and borosilicate barium glass at a ratio of 50:50 by weight is produced, and then a ceramic green sheet is produced with the roughly same method as for varistor green sheet 18 in the first embodiment. A via hole is formed at a predetermined position of this ceramic green sheet using a puncher or CO2 laser stepping, and then an electrode is embedded in the via hole using silver paste.
Meanwhile, a predetermined electrode pattern is formed on the surface of the ceramic green sheet, using conductor paste including silver as its principal component, with screen printing, for example. After these ceramic green sheets are laminated with high accuracy, a layered product is produced that is a laminated green sheets for restraining using alumina or the like, on both top and bottom main surfaces of the layered product of the ceramic green sheet.
After this integrated layered product is baked at 900° C., a temperature at which a glass-ceramic material is substantively baked, alumina, which is the principal component of the restraining green sheet that does not sinter to remain, is removed with a mechanical process, obtaining a glass-ceramic substrate excellent in dimensional accuracy for a planar direction.
At the inner layer part of this glass-ceramic substrate, an element can be composed such as a capacitor element that is composed by facing internal electrode patterns each other, and an inductor element that is formed by routing a conductor in a spiral or meander form. These capacitor elements and inductor elements are further wired internally and/or connected with via electrodes to form an electronic circuit.
This glass-ceramic substrate is used as ceramic substrate 11 shown in the first embodiment, varistor green sheet 18 is stuck through adhesive layer 17 with the same method as in the first embodiment, and then sintered. This fastens varistor layer 12 to ceramic substrate 11 made of a glass-ceramic substrate, and an electronic circuit part having an ESD protection component is obtained. In a conventional electronic circuit part, chip ESD protection components are surface-mounted on a glass-ceramic substrate. While, a method of manufacturing an ESD protection component according to the present invention has an advantage that an electronic circuit with a small ESD protection component can be implemented.
As described above, a method of manufacturing according to the present invention allows a high-performance, uniform and highly reliable ESD protection component to be manufactured, which is useful for measures against static electricity for an electronic device such as a mobile phone.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2003-429446 | Dec 2003 | JP | national |
