Claims
- 1. A method of manufacturing an insulated gate thin film field effect transistor, comprising the steps of:
- forming first and second closely adjacent anodic oxidation electrodes upon an electrically insulating substrate;
- forming a semiconducting layer on said insulating substrate and said first and second anodic oxidation electrodes;
- performing anodic oxidation of said semiconducting layer, utilizing said first and second anodic oxidation electrodes, to thereby form a layer of oxide on said semiconducting layer;
- shaping said oxide layer to form a gate insulator;
- shaping said semiconducting layer to expose a portion of each of said first and second anodic oxidation electrodes;
- patterning exposed portions of said first and second anodic oxidation electrodes to form source and drain electrodes, respectively; and
- forming an electrically conducting layer on said oxide layer of said semiconducting layer to form a gate electrode.
- 2. A method of manufacturing an insulated gate thin film field effect transistor according to claim 1, in which semiconductor layer comprises silicon.
- 3. A method of manufacturing an insulated gate thin film field effect transistor according to claim 2, in which said semiconducting layer comprises a layer of polycrystalline silicon.
- 4. A method of manufacturing an insulated gate thin film field effect transistor according to claim 3, in which said layer of polycrystalline silicon is formed by a chemical vapor deposition process.
Priority Claims (3)
Number |
Date |
Country |
Kind |
56-112025 |
Jul 1981 |
JPX |
|
56-132860 |
Aug 1981 |
JPX |
|
56-207736 |
Dec 1981 |
JPX |
|
Parent Case Info
This is a continuation-in-part of patent application Ser. No. 398,126 filed July 14, 1982, and now abandoned.
US Referenced Citations (9)
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
398126 |
Jul 1982 |
|