METHOD OF OPERATING AN IMAGE SENSOR

Abstract

An image sensor may include a shared memory resources which can be selectively used by a digital filter for image scaling or by a defect correction circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

FIG. 1 illustrates components of a prior art image sensor; and

FIG. 2 illustrates components of an embodiment of a new image sensor.

Claims

1-26. (canceled)

27. An image sensor comprising: an image scaler;a defect corrector; anda shared memory at least partly shared between said image scaler and said defect corrector.

28. The image sensor of claim 27, further comprising a switcher selectively allocating the shared memory to be used with the image scaler or the defect corrector.

29. The image sensor of claim 27, further comprising a logic controller sending a control signal to enable or disable the defect corrector and the image scaler.

30. The image sensor of claim 29, further comprising at least one register bank storing a status of the control signal.

31. The image sensor of claim 27, wherein the shared memory comprises a sub-portion of a memory used by the image scaler.

32. The image sensor of claim 31, wherein the memory used by the image scaler comprises a plurality of line memories.

33. The image sensor of claim 27, wherein the shared memory comprises a sub-portion of a memory used by the defect corrector.

34. The image sensor of claim 27, wherein the shared memory comprises at least one line memory.

35. The image sensor of claim 27, wherein the defect corrector comprises a circuit programmed for operation of a defect correction algorithm.

36. The image sensor of claim 35, wherein the defect correction algorithm switches the image sensor between an image scaling mode wherein the image scaler is enabled and the defect corrector is disabled, the shared memory being switched for operation with the image scaler; and an image capture mode wherein the image scaler is disabled and the defect corrector is enabled, the shared memory being switched for operation with the defect corrector.

37. The image sensor of claim 27, wherein the image scaler comprises a circuit programmed for operation of a digital filtering algorithm for scaling an input image.

38. The image sensor of claim 27, comprising an array of CMOS image sensing pixels upstream of the defect corrector.

39. An electronic device comprising: an image sensor including an image scaler,a defect corrector, anda shared memory at least partly shared between said image scaler and said defect corrector.

40. The electronic device of claim 39, further comprising a switcher selectively allocating the shared memory to be used with the image scaler or the defect corrector.

41. The electronic device of claim 40, further comprising an actuator for image capture operated by a user, said actuator being connected to the switcher for concurrent operation therewith.

42. The electronic device of claim 39, wherein the defect corrector comprises a circuit programmed for operation of a defect correction algorithm.

43. The electronic device of claim 39, further comprising a logic controller sending a control signal to enable or disable the defect corrector or the image scaler.

44. The electronic device of claim 43, further comprising at least one register bank storing a status of the control signal.

45. The electronic device of claim 39, wherein the shared memory comprises a sub-portion of a memory used by the image scaler.

46. The electronic device of claim 39, wherein the shared memory comprises a sub-portion of a memory used by the defect corrector.

47. The electronic device of claim 39, wherein the electronic device comprises at least one of a digital camera, an integrated circuit, and a mobile communications device.

48. A method of operating an electronic device, the electronic device including an image sensor comprising an image scaler and a defect corrector, the method comprising: switching a shared memory for use by the image scaler or the defect corrector.

49. The method of claim 48, further comprising: switching the image sensor between an image scaling mode wherein the image scaler is enabled and the defect corrector is disabled, the shared memory being switched for operation with the image scaler; andan image capture mode wherein the image scaler is disabled and the defect corrector is enabled, the shared memory being switched for operation with the defect corrector.

50. The method of claim 48, wherein the shared memory is a sub-portion of a memory used by the image scaler.

51. The method of claim 48, wherein the shared memory is a sub-portion of a memory used by the defect corrector.

52. The method of claim 4S, wherein switching the shared memory is controlled by a logic controller which inputs a control signal to enable or disable the image scaler or the defect corrector.

53. The method of claim 48, wherein the defect corrector sorts values of a current pixel and of a plurality of neighboring pixels into a rank order and modifies the current pixel value based upon its place in said rank order.

54. The method of claim 53, wherein the value of the current pixel is modified if its rank is greater than than a predetermined maximum rank value or less than a predetermined minimum rank value.

55. The method of claim 54, wherein the current pixel value is replaced by the value of the pixel having said predetermined maximum rank value, if the current pixel value has a rank greater than said predetermined maximum rank value.

56. The method of claim 54, wherein the current pixel value is replaced by the value of the pixel having said predetermined minimum rank value, if the current pixel value has a rank less than said predetermined minimum rank value.

57. The method of claim 54, wherein the current pixel value is left unchanged if the current pixel value has a rank less than said predetermined maximum rank value and greater than said predetermined minimum rank value.

58. The method of claim 54, wherein said predetermined maximum rank value is the highest ranking of said neighboring pixels and said predetermined minimum rank value is the lowest ranking of said neighboring pixels.

59. The method of claim 48, wherein the image sensor comprises an array of CMOS image sensing pixels upstream of the defect corrector.