Claims
- 1. A method of testing an integrated circuit having a memory, an external terminal, and a test circuit connected to the memory through data lines, address lines, and control lines, which comprises:
- providing a switching device with inputs, outputs, and a control input for causing the switching device to switch through;
- connecting at least one of the control lines to the switching device such that a signal impressed on the at least one of the control lines during a testing operation is received at an input of the switching device and cannot be transferred to an output of the switching device until the switching device switches through;
- connecting the control input to an external terminal of the integrated circuit;
- testing the memory with the test circuit by impressing with the test circuit appropriate test signals on the data lines, address lines, and control lines; and
- during the testing step, influencing a signal characteristic on the corresponding control line, and a resultant timing of the test, through the external terminal of the circuit.
CROSS-REFERENCE TO RELATED APPLICATION
This is a continuation of copending International Application PCT/DE98/00479, filed Feb. 17, 1998, which designated the United States.
US Referenced Citations (5)
Foreign Referenced Citations (4)
Number |
Date |
Country |
0 053 665 A1 |
Jun 1982 |
EPX |
0 213 037 A2 |
Mar 1987 |
EPX |
0 337 106 A2 |
Oct 1989 |
EPX |
42 06 344 C2 |
Apr 1993 |
DEX |
Continuations (1)
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Number |
Date |
Country |
Parent |
PCTDE9800479 |
Feb 1998 |
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