BRIEF DESCRIPTION OF THE DRAWINGS
The above and/or other aspects, features, and advantages of the present invention will become apparent and more readily appreciated from the following description of exemplary embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a diagram illustrating a network connection of an MPSoC according to an exemplary embodiment of the present invention;
FIG. 2 is a flowchart illustrating operations of a data transmission system when a processor supports a virtual memory, according to an exemplary embodiment of the present invention;
FIG. 3 is a diagram illustrating an example of a Translation Lookaside Buffer (TLB) according to an exemplary embodiment of the present invention;
FIG. 4 is a flowchart illustrating operations of a data transmission system when a processor does not support a virtual memory, according to an exemplary embodiment of the present invention;
FIG. 5 is a diagram illustrating a storage device according to an exemplary embodiment of the present invention;
FIG. 6 is a flowchart illustrating operations of the data transmission system when a processor is a data input/output unit, according to an exemplary embodiment of the present invention;
FIG. 7 is a block diagram illustrating a configuration of the data transmission system according to an exemplary embodiment of the present invention;
FIG. 8 is a diagram illustrating a process of transmitting encoding method information by using an expanded bus, according to an exemplary embodiment of the present invention;
FIG. 9 is a diagram illustrating a process of transmitting encoding method information by using a conventional bus; and
FIG. 10 is a diagram illustrating an example of a plurality of encoding circuits included in the data transmission system according to an exemplary embodiment of the present invention.