This disclosure relates generally to receivers for communication systems, and, more particularly, to methods and apparatus to perform turbo decoding for communications receivers.
Communications Systems widely adopt error correction coding techniques to combat with error introduced by interference and noise.
Turbo codes are decoded by iterative decoding algorithms. It belongs to a family of iterative decoding algorithms applicable to LDPC code, turbo product code, parallel concatenated convolutional code, serial concatenated convolutional code and etc. During each iteration, the decoder improves the reliability of the information bits. In order to reach a sufficient decoding performance, usually a fixed number of iteration is used. However, in many cases, the correct decoding results can be generated with only a few iterations. Excessive iteration does not help to improve the performance further and only consumes extra power which is a critical resource in mobile devices.
Many early stop algorithms have been proposed to reduce the power consumption for turbo decoding. These algorithm claims to have good performance but these studies did not looked into practical scenarios where the code rate is high. For example, a hard-decision comparison based algorithm has been proposed in [1]. This algorithm compares hard-decisions of information bits from the current iteration and that of the previous iteration. The decoding is stopped once the hard-decisions from the previous iteration matches with those of the current iteration. This algorithm introduces large performance loss in high SNR channel conditions especially with the combination of high code rate. This made the algorithm difficult to be implemented into a practical communication system since the practical communication system like HSDPA usually applies high code rate when signal to noise ration is sufficient. Another early stop algorithm [1] has been proposed which computes the minimum log likelihood ratio (LLR) of decoded output bits. If the minimum value of LLR of all bits exceeds the certain threshold, the decoding is stopped. However, a large block error rate (BLER) performance loss is reported when channel SNR is high. Among various early stop algorithms proposed, no sufficient investigation in the literature has been found to explore the relationship between the BLER performance loss and code rate.
[1] A. Matache, S. Dolinar and F. Pollara, “Stopping Rules for Turbo Decoders”, TMO Progress Report 42-142, Jet Propulsion Laboratory, Aug. 15, 2000.
As illustrated in
The decoding algorithm of turbo codes is known as iterative decoding algorithm. The block diagram of an example iterative decoding algorithm is illustrated in
In cellular communication systems, the turbo code is adopted for many standards. The WCDMA standard, the CDMA2000 standard and the WiMAX standard have adopted turbo code as forward error correction techniques. In the case of mobile devices which usually powered by batteries, the power consumption is an important factor. For high data rate communication applications, the turbo decoder consumes significant percentage of total amount of power of a mobile device. Therefore, reducing power consumption by early stopping the turbo decoding iterations without error rate performance degradation is critical.
In this disclosure, a new algorithm is proposed to reduce the number of iterations without observable performance loss in BLER. This algorithm as illustrated in
For each half iteration number (i), the hard-decisions are stored and compared with the hard-decisions from the previous iteration (i−2). No comparison is performed between two consecutive half iterations due to the fact that these information bits are generated in the interleaved order. For two consecutive half iterations (i) and (i+1), if both of them have matched hard-decisions with their previous iteration results respectively, i.e., half iteration (i) matched with (i−2) and half iteration (i−1) matched with (i−3). The first stop criterion is met. This stop criterion is found to perform well in low code rate but showing significant performance loss in high code since no sufficient extrinsic information is provided from highly punctured parity bits therefore hard decision may not change between consecutive iterations.
The minimum log likelihood ratio (LLR) of all output bits are computed and compared with a threshold K. If the minimum reliability of the output bits exceeds the threshold K. Then the second stop criterion is met. This stop criterion is found to provide limited performance in high SNR scenario but is good in high code rate cases.
For each half iteration, the decoding is stopped when both stop criterions are met therefore.
Extensive computer simulation has been performed to check the performance of the disclosed algorithm to cover different code rate from ⅓ to 0.99 and different code block sizes. Using the first stopping criteria alone, the BLER performance does not degrade in the low code rate but significant performance loss observed in high code rate. Using the second stopping criteria alone, the BLER performance degradation is significant especially when code rate is low. However, combining these two stopping criteria, the BLER performance loss becomes none observable in any code rate.
Computer simulation results are given for the disclosed algorithm. The performance loss of BLER is illustrated in
This patent claims priority from U.S. Provisional Application Ser. No. 61/289,958 entitled “A simple and efficient early stop scheme for turbo decoder” which was filed on Dec. 23, 2009; U.S. Provisional Application Ser. No. 61/292,801 entitled “A UMTS turbo decoder with multiple MAP engines” which was filed on Jan. 6, 2010; U.S. Provisional Application Ser. No. 61/289,921 entitled “A method of trellis termination handling in turbo decoder” which was filed on Dec. 23, 2009; and U.S. Provisional Application Ser. No. 61/301,046 entitled “A contention free memory structure and interleaver for parallel HSPA_LTE turbo decoder” which was filed on Feb. 3, 2010. Each of U.S. Provisional Patent Application Ser. Nos. 61/289,958, 61/292,801, 61/289,921 and 61/301,046 is hereby incorporated by reference in its entirety.
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