Patent Application
20070285105
Further advantages of the invention are apparent by reference to the detailed description when considered in conjunction with the figures, which are not to scale so as to more clearly show the details, wherein like reference numbers indicate like elements throughout the several views, and wherein:
An overview of an integrated circuit 2 as used in various embodiments of the invention is shown in Figure. The boundaries of the integrated circuit 2 are drawn as dotted lines to show that the parts described hereafter may be arranged in many different formations. Integrated circuit 2 is one exemplary embodiment of many circuit embodiments used with the methods described herein. The integrated circuit 2 includes an address register 4, a memory 6, a serial shift register 8, a serial data register 10, and a trim register 12. Serial lines 11a, 11b, and 14 are designated as solid black arrows and broad/outlined arrows 13a, 13b, and 13c designate parallel lines. However, it should be understood by those skilled in the art that any combination of serial and parallel lines could be used to accomplish the methods described herein, so the choice of serial lines and parallel lines represented in
The address register 4 is capable of receiving incoming data in serial form from a source external to the integrated circuit 2. When received by the integrated circuit 2, the incoming data arrives via the first line 14, which may also be the line by which the integrated circuit receives data for addressing at least one of a plurality of actuators (not shown) of the integrated circuit. In an exemplary embodiment, line 13a and data register 10, for example, may also be used for addressing at least one of a plurality of actuators of the integrated circuit. For example, in an exemplary embodiment, with the exception of trim register 12 (and associated trimming circuits), the embodiment illustrated in
The address register 4 converts the incoming serial data into parallel data and uses the parallel data to index memory 6.Memory 6 contains memory inputs 16 for receiving indexing data (e.g., in parallel form) from the address register 4. When the indexing data is received, corresponding trim data stored in memory 6 is transfered out of memory 6. Memory 6 further contains memory outputs 18 for transferring trim data (e.g., in parallel form) from memory 6.
Memory 6 has, at least in part, digital memory capacity in the form of for example nonvolatile memory. For instance, memory 6 may be composed of one or more blocks of fuses. However, those skilled in the art appreciate that any means of storing nonvolatile memory in the special parameters of an integrated circuit like the embodiments disclosed herein will suffice including, but not limited to, EPROM, EEPROM, Flash memory and anti-fuse devices. Trim data may be stored in memory 6 after or during final stages of the fabrication of integrated circuit 2. In an exemplary embodiment, trim data is distributed through the integrated circuit 2 upon or shortly after an event (such as a power up command).
Trim data is retrieved and sent from memory 6, through memory interface 8 for example a serial shift register. Interface 8 may transform the trim data from parallel form to serial form. The trim data in serial form maybe sent to an external device 15 over serial lines 11. The external device 15 might be the same device used to communicate data to the circuit 2 via serial line 14. In an exemplary embodiment the external device 15 might verify the trim data and/or process the trim data to produce corresponding trim data. For example the external device 15 might modify the trim data in relation to a mode of operation of the external device and or an application that is being processed by the external device. In an exemplary embodiment for example, the external device 15 might be a print controller wherein the print controller modifies trim data as a function of operating information, such as ink usage. After the external device has processed and/or verified the trim data (if applicable) the corresponding trim data (which may be identical to the trim data) is sent back to the integrated circuit 2 (e.g., in serial form) to serial data register 10. In an exemplary embodiment, this data may be sent to the integrated circuit using a line that is used to send and/or receive other data operated on by the integrated circuit 2 (e.g., print data, such as address or primitive data).
Serial data register 10 receives the corresponding trim data from the external device 15 Substantially when the serial data register 10 receives a latch command (e.g., from the external device 15), the corresponding trim data in the serial data register 10 is latched to the trim register 12 and temporarily stored. The corresponding trim data is transferred (e.g., in parallel form) from the serial data register 10 to the trim register 12. The “latch” command, as mentioned above, may be accomplished by using an unused input combination of serial data from the external device (e.g., LOAD+CLK+FIRE, wherein “LOAD” represents a data loading command, “CLK” represents a clock or time value command, and “FIRE” represents an action command). Since these three commands are not otherwise used together simultaneously for normal operation of integrated circuit 2, their use together in combination for the latching command to transfer trim data to the trim register 12 is convenient.
The specific information contained in the trim data maybe used to modify one or more functions of one or more analog devices. For example, if testing of a particular integrated circuit revealed that a specific analog device in the integrated circuit operated with a voltage measurement that was 0.1 volts too high (based on pre-selected tolerance values for that particular module), the trim data associated with that particular analog device could be used to alter the analog device to function at least 0.1 volts less during operation of the integrated circuit. As long as the corresponding trim data remains in the trim register 12 during operation of the integrated circuit 2, the function of the analog device in the integrated circuit will be modified based on the corresponding trim data. Therefore this embodiment as well as others described herein allow for integrated circuit 2 to be manipulated after fabrication and after processing such as to fine tune its function(s) without making physical changes to the characteristics of individual devices such as transistors or other vital parts of the integrated circuit 2. By using embodiments such as those described above, fabrication costs can remain low as (1) circuit components like transistors need not be made more robust and (2) fabricated integrated circuits can be “fixed” or “tweaked” after non-fatal damage or errors occur in the circuit.
Another exemplary method involves a plurality of serial data registers 20a, 20b, and 20c connected in series as shown in
As with certain previous embodiments discussed with relation to
Another set of exemplary embodiments involves using a sequencer. For example, data may be retrieved from memory in the integrated circuit using a sequencer. The retrieved data may or may not be then transferred to an external device, such as one that is separate from and controls the integrated circuit. If transferred to an external device, the retrieved data is also received by the integrated circuit from the external device. Function of at least one analog device of the integrated circuit is then modified in response to the retrieved data. In an exemplary embodiment, the sequencer is used to select at least one of a plurality of registers in an integrated circuit. The sequencer then shifts the retrieved data to the at least one selected register.
In a simplified embodiment, a method for modifying a function of an analog device in an integrated circuit includes (i) receiving data on a line used for addressing at least one of a plurality of actuators of an integrated circuit wherein the data is received at a sequencer, (ii) indexing the memory of the integrated circuit using an address register that is driven by the sequencer, (iii) retrieving data that can be used to modify a function of an analog device of the integrated circuit from memory of the integrated circuit based on the received data, and (iv) modifying a function of the analog device in response to the retrieved data.
Another exemplary embodiment of the invention involves an integrated circuit, at least one analog device in the integrated circuit, at least one actuator of the integrated circuit, a memory in the integrated circuit, and a sequencer. An exemplary method for use with the same may involve (i) using the sequencer to retrieve data that can be used to modify a function of an analog device of the integrated circuit from memory of the integrated circuit, (ii) selecting at least one of a plurality of registers, (iii) shifting the retrieved data to the at least one selected register, and (iv) modifying the function of at least one analog device in response to the retrieved data. This exemplary method may, in certain other embodiments, include transferring the retrieved data to an external device and receiving the retrieved data from the external device. The retrieved data may, for example, be transferred and received in serial form. The transferred data may also be encrypted before it is transferred to the external device and received by the external device. In certain related embodiments, the external device might control the integrated circuit and be separate from the integrated circuit. In an exemplary embodiment, the external device is a print controller and the data received from the external device is received on the same line as print data.
One example of a circuit with a sequencer used in various methods described herein is illustrated in
The address data is used to index memory 6. In response to the sequencer 26, trim data is retrieved and transferred from memory 6 to shift register 8. The shift register 8 converts the trim data from parallel form to serial form. The trim data may then be transferred to decode register 28a. The sequencer 26 is in communication with all of the decode registers 28 such that the trim data is shifted through to all decode registers 28 until the trim data is ready for transfer to the serial data registers 20. After the trim data is transferred to the serial data registers 20, a latch command may be used to initiate latching of the trim data into each of the respective trim registers 22. For example, substantially as long as trim data remains latched into trim register 22b, the function of the one or more analog devices associated with trim register 22b will be modified based on the latched trim data.
The foregoing description of certain exemplary embodiments of the present invention has been provided for purposes of illustration only, and it is understood that numerous modifications or alterations may be made in and to the illustrated embodiments without departing from the spirit and scope of the invention as defined in the following claims.
