Claims
- 1. A circuit for correcting a drooped DC signal, said circuit comprising:an asynchronous drooping correcting subcircuit, receiving said drooped DC signal and outputting a first corrected signal; a synchronous drooping correcting subcircuit, receiving said drooped DC signal and outputting a second corrected signal; a multiplexer, receiving said first corrected signal and said second corrected signal; data lock signal generating means generating a data lock signal, supplied to the multiplexer, wherein said multiplexer selects said first corrected signal or said second corrected signal based on the data lock signal; and an equalizer, receiving said drooped DC signal and a signal selected by said multiplexer and outputting an output corrected signal which is a sum of the received signals.
- 2. A circuit for correcting a drooped DC signal according to claim 1, wherein said asynchronous drooping correcting subcircuit determines a difference between a peak positive amplitude of said drooped DC signal and a peak negative amplitude of said drooped DC signal and said first corrected signal is proportional to said difference.
- 3. A circuit for correcting a drooped DC signal according to claim 1, wherein said synchronous drooping correcting subcircuit comprises:a slicer, which receives said drooped DC signal, separates negative and positive equalized portions of said drooped DC signal, generates a NRZI signal based on a sum of said negative and positive equalized portions, outputs said NRZI signal to said data lock signal generating means, and outputs said negative and positive equalized portions; a regeneration circuit, which receives said negative and positive equalized portions and generates a regenerated signal based on predetermined signals supplied by a band gap reference circuit; and a substractor, receiving said regenerated signal and said drooped DC signal and producing a difference signal proportional to the difference between said regenerated signal and said drooped DC signal; wherein said second corrected signal is said difference signal.
PRIORITY CLAIM
This application claims priority to a provisional application entitled “Zero-Forcing DC-Restoration” filed on Oct. 8, 1998, having an application Ser. No. 60/103,687.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
5122677 |
Sato |
Jun 1992 |
|
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/103687 |
Oct 1998 |
US |