Patent Application
20240306285
Embodiments are generally related to the field of metallurgy. Embodiments are further related to the field of superconductors. Embodiments are further related to superconducting radiofrequency cavities. Embodiments are generally related to the field of quantum computing. Embodiments are further related to methods and systems for reducing quality factor degradation consistent with two-level-system (TLS) defects hosted by niobium pentoxide, by minimizing or removing niobium pentoxide.
Superconducting radio frequency (SRF) cavities are state-of-the-art technology for modern accelerators. SRF cavities are widely used in modern particle accelerator applications, to transfer energy to beams of charged particles.
One potential application of such particle accelerators is quantum computing. There are numerous problems that must be solved to produce ideal quantum computers. One such problem is that quantum computers improve with extremely high quality factors “Q” (e.g. up to Q>1011). The quality factor, or “Q” factor, is a dimensionless parameter that characterizes the resonance of an oscillator. A higher “Q” factor generally means the resonator resonates at a high amplitude at its resonant frequency. SRF cavities offer unique opportunities for various applications in the quantum-regime.
However, the quality factor of an SRF cavity decreases when going to the “quantum regime.” The origin of the additional losses is a consequence of naturally occurring oxide layers that form on the surface of the cavity.
Accordingly, there is a need in the art for reducing quality factor degradation consistent with two-level-system (TLS) defects by minimizing or removing the oxide layer, as described in the embodiments disclosed herein.
The following summary is provided to facilitate an understanding of some of the innovative features unique to the embodiments disclosed and is not intended to be a full description. A full appreciation of the various aspects of the embodiments can be gained by taking the entire specification, claims, drawings, and abstract as a whole.
It is, therefore, one aspect of the disclosed embodiments to provide a method and system for improving superconducting materials.
It is another aspect of the disclosed embodiments to provide methods and systems for improving superconducting cavities.
It is another aspect of the disclosed embodiments to provide a method and system for improving SRF cavities and associated applications.
It is another aspect of the disclosed embodiments to provide improved equipment for realizing methods and systems for quantum computing.
It is another aspect of the disclosed embodiments to reduce TLS degradation of quantum computing circuits.
It is another aspect of the disclosed embodiments to provide methods, systems, and apparatuses for reducing quality factor degradation consistent with TLS defects hosted by niobium pentoxide, by minimizing or removing the niobium pentoxide.
The aforementioned aspects and other objectives and advantages can now be achieved as described herein. Systems and methods for treating an SRF niobium cavity can comprise preparing a superconducting radio frequency (SRF) cavity for removal of a dielectric layer from on an inner surface of the SRF cavity, subjecting the SRF cavity to a heat treatment in order to remove the dielectric layer from the inner surface of the SRF cavity, and preventing the development of a new dielectric layer on the inner surface of the SRF cavity by preventing an interaction between the inner surface of the SRF cavity and atmospheric gasses.
While the description provided herein often refers to a “cavity” it should be appreciated that the methods and systems disclosed herein can also be applied to various non-cavity implementations. As such, it should be understood that the methods, systems, and procedures disclosed herein can be applied to, for example, other superconducting qubits (e.g. 2D architectures), without departing from the scope of this disclosure.
For example, in an embodiment a method comprises preparing a surface of a device for removal of a dielectric layer, removing the dielectric layer from the surface of the device, and reducing two-level-system (TLS) degradation of the device, wherein reducing TLS degradation of the device further comprises: preventing development of a new dielectric layer on the surface of the device by preventing an interaction between the surface of the device and atmospheric gasses by adding a capping layer to the surface of the device. In an embodiment, removing the dielectric layer further comprises exposing the device to a heat treatment. In an embodiment, exposing the device to a heat treatment further comprises evacuating a chamber surrounding the device during the heat treatment, ramping the device to a temperature greater than 340 degrees Celsius, baking the device for a prescribed time, and ramping the temperature of the device down. In an embodiment, baking the device for a prescribed time comprises baking the device for at least one hour. In an embodiment, the method comprises depositing a film on the surface of the device. In an embodiment, the film comprises one of a niobium film, a tantalum film, and a rhenium film. In an embodiment, the capping layer exhibits minimal TLS degradation. In an embodiment, the device comprises a superconducting quantum circuit. In an embodiment, the surface of the device comprises at least one of a sapphire substrate and a silicon substrate. In an embodiment, the capping layer comprises at least one of Tantalum, Gold, Titanium, Aluminum, Rhenium, titanium nitride, platinum, palladium, silicon, and/or germanium.
The accompanying figures, in which like reference numerals refer to identical or functionally similar elements throughout the separate views and which are incorporated in and form a part of the specification, further illustrate the embodiments and, together with the detailed description, serve to explain the embodiments disclosed herein.
The particular values and configurations discussed in the following non-limiting examples can be varied, and are cited merely to illustrate one or more embodiments and are not intended to limit the scope thereof. All values provided in the appendix are exemplary only, and may be varied in other embodiments.
Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which illustrative embodiments are shown. The embodiments disclosed herein can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the embodiments to those skilled in the art. Like numbers refer to like elements throughout.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms “a”, “an”, and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Throughout the specification and claims, terms may have nuanced meanings suggested or implied in context beyond an explicitly stated meaning. Likewise, the phrase “in one embodiment” as used herein does not necessarily refer to the same embodiment and the phrase “in another embodiment” as used herein does not necessarily refer to a different embodiment. It is intended, for example, that claimed subject matter include combinations of example embodiments in whole or in part.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
It is contemplated that any embodiment discussed in this specification can be implemented with respect to any method, kit, reagent, or composition of the invention, and vice versa. Furthermore, compositions of the invention can be used to achieve methods of the invention.
It will be understood that particular embodiments described herein are shown by way of illustration and not as limitations of the invention. The principal features of this invention can be employed in various embodiments without departing from the scope of the invention. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, numerous equivalents to the specific procedures described herein. Such equivalents are considered to be within the scope of this invention and are covered by the claims.
The use of the word “a” or “an” when used in conjunction with the term “comprising” in the claims and/or the specification may mean “one,” but it is also consistent with the meaning of “one or more,” “at least one,” and “one or more than one.” The use of the term “or” in the claims is used to mean “and/or” unless explicitly indicated to refer to alternatives only or the alternatives are mutually exclusive, although the disclosure supports a definition that refers to only alternatives and “and/or.” Throughout this application, the term “about” is used to indicate that a value includes the inherent variation of error for the device, the method being employed to determine the value, or the variation that exists among the study subjects.
As used in this specification and claim(s), the words “comprising” (and any form of comprising, such as “comprise” and “comprises”), “having” (and any form of having, such as “have” and “has”), “including” (and any form of including, such as “includes” and “include”) or “containing” (and any form of containing, such as “contains” and “contain”) are inclusive or open-ended and do not exclude additional, unrecited elements or method steps.
The term “or combinations thereof” as used herein refers to all permutations and combinations of the listed items preceding the term. For example, “A, B, C, or combinations thereof” is intended to include at least one of: A, B, C, AB, AC, BC, or ABC, and if order is important in a particular context, also BA, CA, CB, CBA, BCA, ACB, BAC, or CAB. Continuing with this example, expressly included are combinations that contain repeats of one or more item or term, such as BB, AAA, AB, BBC, AAABCCCC, CBBAAA, CABABB, and so forth. The skilled artisan will understand that typically there is no limit on the number of items or terms in any combination, unless otherwise apparent from the context.
All of the compositions and/or methods disclosed and claimed herein can be made and executed without undue experimentation in light of the present disclosure. While the compositions and methods of this invention have been described in terms of preferred embodiments, it will be apparent to those of skill in the art that variations may be applied to the compositions and/or methods and in the steps or in the sequence of steps of the method described herein without departing from the concept, spirit, and scope of the invention. All such similar substitutes and modifications apparent to those skilled in the art are deemed to be within the spirit, scope and concept of the invention as defined by the appended claims.
The methods and systems disclosed herein are aimed at producing SRF cavities that can achieve very high quality factors (e.g. Q>1010-1011) corresponding to photon lifetimes as long as tens of seconds. It should be appreciated that this is much higher than the highest reported Q of approximately 108 used in various quantum regime studies, where associated photon lifetimes are approximately 1 msec. The disclosed embodiments may thus be adopted for the creation of SRF cavities for 3D circuit QED architecture for quantum computing or memory applications—owing to the potential of a thousand-fold increase in the photon lifetime, and therefore improved cavity-stored quantum state coherence times. The two-level systems (TLS) residing inside niobium oxide play a significant role in the low field performance of such SRF cavities.
As used herein, a two-level system (TLS) relates to quantum systems that can exist in two independent quantum states. Two-level systems are basic quantum systems. A two-level system can be described with a wavefunction where the amplitude of the wavefunction oscillates between the two states. Quantum computing is based on two-level systems. A two-level system can be a quantum bit or “qubit.” Qubits serve as the basic unit of quantum information—the equivalent of a bit in classical computing.
In certain embodiments, the disclosed methods and systems can be used to produce SRF cavities that can yield photon lifetimes of more than 2 seconds (and up to 10 s of seconds), where Q decreases when going from temperatures of 1.4 K down to below 20 mK. Thus, the SRF cavities produced according to the methods and systems disclosed herein, can serve as the longest coherence platform for cQED and quantum memory applications.
It should be understood that in certain embodiments disclosed herein, a fine grain high residual resistivity ratio (RRR)>˜200 bulk single cell niobium cavity, of the TESLA shape, with resonant frequencies of the TM010 modes of 1.3, 2.6, and 5.0 GHz can serve as the base cavity for further treatment. However, the single cell niobium cavity is meant to be exemplary, and, in other embodiments, the disclosed methods and systems can be used to treat cavities of other shapes and with other properties, including cavities with multiple cells. Furthermore, the methods and systems disclosed herein can also be applied to various non-cavity implementations. As such, it should be understood that the methods, systems, and procedures disclosed herein can be applied to other superconducting qubits (e.g. 2D architectures), without departing from the scope of this disclosure. Likewise, other superconducting devices, can be treated in the manner disclosed herein, to remove dielectric layers.
In general, the disclosed embodiments involve subjecting a cavity to a heat treatment while maintaining the inner volume of the cavity at or near vacuum. The cavity can be subject to temperatures at or near, 340 degrees C. using a custom designed furnace. This treatment removes the natural dielectric layer (e.g. niobium pentoxide, or other such dielectric layer) formed on the surfaces of the cavity, and results in a marked improvement in TLS degradation.
In certain embodiments, the treated cavities can be inserted in a BlueFors dilution refrigerator at temperatures down to 10-20 mK. The treatment of the cavity yields cavity conditions where oxide is modified, reduced, and/or eliminated, thereby producing a cavity with an extremely high quality factor, Q>˜1×1010. The treatment methods can suppress residual resistance at all fields.
The removal of the dielectric at step 110 can comprise various approaches. For example, step 110 can include dissolution of the dielectric layer via heat treatment, dispersion of the dielectric layer via heat treatment, removal of the dielectric layer via chemical reaction, reduction of the dielectric layer via chemical reaction, removal of the dielectric layer via bombardment with charged particles, and/or reduction of the dielectric layer via bombardment with charged particles.
Next at step 115, the method 100 can further include preventing the development of a new dielectric layer in the cavity. This step can generally include limiting the exposure of the internal surfaces of the cavity to gases that could react with the internal surface to create dielectric layers. This can include maintaining a vacuum in the cavity and/or adding a capping layer to the internal surfaces of the cavity.
It should be understood that one or both of steps 110 and 115 can be repeatedly performed to further reduce or remove any harmful dielectric that may form during or after one or more of the steps in method 100 are complete. In this way, the method can be employed to prevent the development of a harmful dielectric layer in the SRF cavity. The method ends at step 120.
At step 210, various preparational steps can be implemented to prepare the cavity for removal, reduction, or modification of any oxide layer formed on the internal surfaces of the cavity.
In certain embodiments, preparation step 210 can also include the aforementioned cleaning steps, and then assembling the cavity in a cleanroom environment. The cleanroom environment ensures the inner cavity surface is not exposed to potential contaminants that may result in the development of unwanted dielectric layers on the inner cavity surfaces.
The cavity can then be assembled to a vacuum system, at step 308 and pumped at step 310. The vacuum system can include vacuum connections with RF feedthroughs, a burst disc, and a pump-out port that can be fluidically connected to the cavity via the vacuum connections, and can be closed by a right angle valve. This can include connecting one or more ends of the cavity to vacuum hardware in the cleanroom environment.
The vacuum connections can be checked for leaks using a residual gas analyzer. Helium can be sprayed on the vacuum connections and the gas analyzer can be used to ensure good seals at the connections. If no leaks are detected, the assembled cavity is ready for further treatment as disclosed herein.
In other embodiments, at step 210, rather than using a vacuum, the inner surfaces of the cavity can be subjected to an inert gas atmosphere such as argon, or other such gas, to prevent exposure of the surface to atmospheric gases that could generate a dielectric layer in the cavity.
A primary contributing factor to the improvement in Q value of the cavity resulting from the methods disclosed herein, is the modification, reduction, or removal of the any layer with dielectric properties (usually the oxide layer) in the cavity. Thus, once the cavity has been prepared for dielectric removal at step 210, at step 215, the dielectric layer in the cavity can be reduced, removed, or modified in various ways.
In one embodiment, illustrated in
Thermocouples placed on, or around, the cavity can be used to monitor the temperature of the cavity during the heat treatment at step 215. The temperature range over the surface of the cavity may vary between 250-400 degrees C. during this process. In certain embodiments this temperature range is between that used in a 120 degree C. low temperature bake (used to prevent High Field Q-Slope) and a >600 degree C. high temperature furnace treatment (used to degas hydrogen). As such, this temperature range (250-400 C) can be referred to as a “medium temperature bake.”
During the medium temperature bake, the internal volume of the cavity can be pumped with a turbomolecular pump to remove any atmospheric gases from the inner volume of the cavity, or it can be maintained under an inert gas atmosphere, such as argon. In certain embodiments, after the medium temperature bake, the oven can be maintained at the baking temperature, as shown at 316. In an exemplary embodiment, the temperature can be maintained for approximately 2.5 hours although in other embodiments, the temperature can be maintained for up to 22 hours. As shown at step 318, the temperature of the cavity can then be ramped back down to room temperature. Cooling can take place over a selected time period.
It should be noted that throughout his process, the internal volume of the cavity can be pumped to ensure that atmospheric gases are not reintroduced. Such reintroduction may result in the formation of a new dielectric layer. In some embodiments, the outside of the cavity may be kept under an inert gas atmosphere to minimize the absorption of oxygen, hydrogen, and other atmospheric gases via the outer surface.
Before cooldown, in certain embodiments, an argon purge can be stopped and the oven temperature can be lowered to 120 degrees C. The cavity can then be backfilled with up to 25 mtorr of nitrogen via a needle valve (with the turbopump off) and maintained at stasis for up to 48 hours. This step may be added if nitrogen or other impurities are desired to be implanted in the surface layer. Impurities may also be added.
In another embodiment of step 215 removal and/or reduction of the dielectric layer via chemical reaction can be completed as shown in
In still other embodiments, step 215 can comprise removal and/or reduction of the dielectric layer via bombardment with charged particles as illustrated in
It should be appreciated that in certain embodiments, one of more of the methods disclosed above and illustrated in
Once the necessary steps have been performed to remove or reduce the dielectric layer, as illustrated at step 215, it may be necessary to prevent the formation of any new dielectric layers, as illustrated at step 220. New dielectric growth is most commonly a result of the introduction of atmospheric gases in the cavity (for example, atmospheric oxygen can react with niobium to form Nb2O5).
Thus, step 220 can comprise limiting the exposure of the internal surfaces of the cavity to gases that can react with the surface to form a dielectric layer. This can be achieved, for example, by keeping the inner volume of the cavity under vacuum, or in an inert gas atmosphere, or by only allowing brief exposures of the inner cavity surface to atmosphere, mostly keeping the inner surface exposed only to vacuum or inert atmospheres after treatment.
For example, in an exemplary embodiment where the cavity is going to be put into use in a quantum computing application, this can be done while the cavity is kept under vacuum. If perturbation is required during setup, it is preferable to only briefly expose the inner surfaces of the cavity to air, or to prevent exposure to air entirely, by using a glovebox or other such device.
In certain embodiments, step 220 can be achieved by adding a “capping layer” to the internal surfaces of the cavity to prevent them from coming into direct contact with atmospheric gases. For example, in an embodiment, preventing growth of an oxide layer (e.g. pentoxide) can be accomplished with the capping layer applied to the internal surfaces of the cavity. The capping layer can be formed by encouraging the growth of a different, non-detrimental oxide, which can serve as a barrier to pentoxide.
Exemplary capping layers include, but are not limited to, Aluminum Oxide and Niobium Nitride. The capping layer can be described as a “passivating layer.” The passivating layer offers the benefit that it can be encouraged in the existing device, as described herein, in-situ.
For example, in an embodiment the capping layer can be formed at step 220, using atomic layer deposition as illustrated in
It should be understood that, in certain cases, the capping layer can itself be dielectric. Thus, the embodiments disclosed herein should be understood to include the prevention of a new dielectric, or the prevention of a harmful dielectric to the extent that a harmful dielectric includes any dielectric that results in Q degradation.
The cavity 505 can be sealed with vacuum connections 515. The vacuum connections 515 can be used to ensure a vacuum can be drawn in the interior 506 of the cavity 505. The vacuum connections 515 can include an RF feedthrough 520 that allows an RF signal to be fed into the cavity 505. The vacuum connections 515 are preferably cleaned and installed on the cavity 505 in a cleanroom environment as a part of the cavity preparation step illustrated as step 210 of method 200.
The vacuum connection 515 can be installed on the ends of the cavity openings 530 with a gasket 525 between the cavity opening 530 and vacuum connection 515. The gasket 525 facilitates the vacuum seal. In certain embodiments, the gasket 525 can be selected to be compatible with cryogenic temperatures (i.e. temperatures required for super conduction).
To that end, the gasket 525 can be cooled with a liquid cooled collar 535. The liquid cooled collar 535 comprises a conduit through which cooled liquid can flow to ensure that the gasket 525 remains cool enough to withstand the heat treatments, to which the cavity 505 is subjected, to remove internal dielectric layers. In certain embodiments, the liquid cooled collar 535 can be cooled with water, which is pumped to and from the liquid cooled collar 535 with a pump. The circulating water can be cooled with a water cooling system, so that the liquid cooled collar 535 keeps the gasket 525 at or below a threshold failure temperature.
During the treatment methods disclosed herein, the cavity 505 can be connected to a support frame 540. The support frame 540 can be configured with vertical members 545 and crossbeams 550. The support frame 540 is configured to withstand the temperatures to which the cavity 505 is subjected during heat treatment.
The external surfaces 555 of the cavity 505 can be kept warm with heating elements 560. The heating elements 560 are necessary to compensate for ambient cooling that may occur from the liquid cooled collar 535, particularly as the system is subject to heat treatment.
The schematic diagram 600 illustrates the cavity 505 subject to a heat treatment or oven heating from oven heaters 605. The cavity 505 is subject to heat 650 provided from the oven heater 605. It should be appreciated that the oven heater 605 can comprise an oven chamber or other such apparatus, and is illustrated in profile in the schematic 600.
The oven 605 can include an enclosure 610. In certain embodiments the enclosure 610 can comprise the interior of the oven 605 or a separate enclosure, such as a steel can. O2 625 in the enclosure 610 can be purged from the enclosure 610 via the pumping of argon 640 (or other such gas) into the enclosure 610.
Heaters 560 can be configured as heat bands 645, that encircle the cavity 505. A plurality of thermocouples 615-618 can be connected to the cavity 505 and enclosure 610 to monitor temperature. For example, a thermocouple 615 can be connected to one side of the cavity 505 near the heat band 645, thermocouple 616 can be connected to a second portion of the cavity 505, and another thermocouple 617 can be connected to another portion of the cavity 505 closer to the second heat band 645. A thermocouple 618 can also be connected to the enclosure 610.
Liquid cooling can be circulated to the liquid cooling collar 535 via lines 620. In certain embodiments, the liquid can comprise water circulated with a water pump. The liquid cooling collar 535 can be provided on both ends of the cavity 505 to cool the gasket 525 between the cavity opening and the vacuum connections 515.
Vacuum line 630 can be connected to the cavity 505 through the vacuum connection 515. The vacuum line 630 can be used to draw a vacuum inside the cavity 505, with a vacuum pulling system 635 connected to the vacuum line 630.
The embodiments disclosed herein describe various systems and methods for removing and/or minimizing oxidation in the interior of a cavity, such as a superconducting radio frequency cavity, for the purpose of reducing or eliminating Q degradation in a low-temperature, low-field regime. In some, but not all embodiments, this can include thermal treatment of the SRF cavity under vacuum.
According to the embodiments disclosed herein, state-of-the-art SRF accelerator cavities can be produced that can be directly taken to the quantum regime, exhibiting the longest demonstrated coherence times to date (e.g. 2 seconds). This opens a pathway of exploring, for example, coupled SRF cavity-transmon structures as the highest coherence superconducting quantum circuits for quantum computing and other potential applications. In particular, implementing certain protocols allows direct generation of very long-lived Fock states in SRF cavities.
In summary, the disclose embodiments include methods and systems for creating state-of-the-art SRF accelerator cavities in the quantum regime. The embodiments further address quality factor decrease at lower temperatures, consistent with the contribution of TLS degradation, hosted by niobium oxide and provide mitigation of this phenomena, by in-situ heat treatment, resulting in the removal of the dielectric layer.
It should be further appreciated that, the disclosed methods and systems can be applied to applications other than SRF accelerator cavities. For example, quantum computing involves the use of superconducting circuits for quantum computations. In such applications non-equilibrium quasiparticles and TLSs present major sources of loss.
To address such losses, a capping layer can be formed on the surface of such structures to prevent the formation of a dielectric layer.
At step 710, a film can be deposited on a substrate. In certain embodiments, the film can comprise a niobium film although other materials are possible, including but not limited to tantalum film, or rhenium film. The substrate in this example can comprise a surface of a superconducting cavity or can comprise other surfaces such as a planar surface as in the case of a superconducting quantum chip fabrication. In an exemplary embodiment, the chip can comprise a sapphire substrate or silicon substrate associated with a superconducting quantum chip.
Next, at step 715, the substrate can be placed in an ultra-high vacuum (UHV) chamber and an additional layer can be deposited over the already deposited film. In certain embodiments, the material of the additional layer can comprise tantalum, gold, titanium, titanium nitride, platinum, palladium, aluminum, silicon, germanium, and/or rhenium. The additional layer prevents the formation of a dielectric layer on the substrate. The method ends at step 720.
At step 810 a film can be deposited on a substrate. In certain embodiments, the film can comprise a niobium film although other materials are possible, such as tantalum film or rhenium film. The substrate in this example can comprise a surface of a superconducting cavity, or can comprise other surfaces such as a planar surface of a superconducting quantum chip. In an exemplary embodiment, the chip can comprise a sapphire or silicon substrate associated with a superconducting quantum chip. In certain embodiments, this step can be performed in a coating chamber under vacuum.
Next, at step 815, the substrate with the niobium coating is removed from the coating chamber and is subject to a gaseous species used to remove and replace the dielectric layer that forms on the surface. The method ends at step 820.
At step 855, a first gaseous precursor can be introduced to the film on the substrate, which includes a dielectric layer. The first gaseous precursor can be selected according to the desired material replacing the dielectric layer on the Niobium, but can be understood to be a reducing agent. Molecules from the first precursor interact with the dielectric layer that has formed on the niobium film at step 860. Any unreacted molecules from the first gaseous precursor can be purged at step 865.
Next, at step 870, a second gaseous precursor can be introduced to the film and associated dielectric layer. The second gaseous precursor can comprise an oxidizing agent such as water, oxygen plasma, and/or ozone. At 875 molecules from the second gaseous precursor interact with the dielectric layer removing the dielectric layer. Unreacted molecules from the second gaseous precursor are purged at step 880, at which point, a replacement capping material can cover the film at step 885. The capping layer can comprise metal nitrides such as Titanium Nitride, or metal oxides such as Aluminum Oxide.
The arrow 915 illustrates the chip 905 being capped by the film 910 which can be deposited on the chip 905. In certain embodiments, the film can comprise a niobium film although other materials are possible, such as tantalum film or rhenium film. Without treatment a dielectric Niobium oxide layer will form on the niobium film.
At step 1010 a film can be deposited on a substrate. In certain embodiments, the film can comprise a niobium film although other materials are possible, such as tantalum film or rhenium film. The substrate in this example can comprise a surface of a superconducting cavity, or can comprise other surfaces such as a planar surface of a superconducting quantum chip. In an exemplary embodiment, the chip can comprise a sapphire or silicon substrate associated with a superconducting quantum chip. In certain embodiments, this step can be performed in a coating chamber under vacuum.
Next, at step 1015, the substrate with the Niobium oxide layer is bombarded with energetic Ar ions. The energetic ions mill away the oxide layer. It should be appreciated that this process is conducted in ultra-high vacuum conditions, to effectively prevent the oxide layer from re-forming.
At step 1020 a capping layer can be deposited. The capping layer can be deposited for example according to the process, illustrated in
It should be understood that the systems illustrated in
Based on the foregoing, it can be appreciated that a number of embodiments, preferred and alternative, are disclosed herein. For example, in an embodiment, a method comprises preparing a device for removal of a dielectric layer from the inner surface of the device, removing the dielectric layer from the inner surface of the device, and preventing the development of a new dielectric layer on the inner surface of the device by preventing an interaction between the inner surface of the device and atmospheric gasses.
In an embodiment, removing the dielectric layer further comprises exposing the device to a heat treatment. In an embodiment, exposing the device to a heat treatment further comprises evacuating an internal volume of the device, ramping the device to a mid-temperature bake, baking the device for a prescribed time, and ramping the temperature of the device down.
In an embodiment, removing the dielectric layer further comprises creating a chemical reaction with the dielectric layer on the inner surface of the device. In an embodiment, removing the dielectric layer further comprises bombarding the dielectric layer with charged particles.
In an embodiment, preventing the development of a new dielectric layer on the inner surface of the device by preventing an interaction between the inner surface of the device and atmospheric gasses further comprises preventing the introduction of atmospheric gasses into the interior volume of the device. In an embodiment, preventing the development of a new dielectric layer on the inner surface of the device by preventing an interaction between the inner surface of the device and atmospheric gasses further comprises adding a capping layer to the inner surface of the device.
In an embodiment, the method comprises repeating the step of removing the dielectric layer from the inner surface of the device.
In an embodiment, the device comprises a superconducting radio frequency cavity. In an embodiment, the superconducting radio frequency cavity is comprised of niobium.
In an embodiment, a method for treating a cavity comprises preparing a superconducting radio frequency (SRF) cavity for removal of a dielectric layer from on an inner surface of the SRF cavity, subjecting the SRF cavity to a heat treatment in order to remove the dielectric layer from the inner surface of the SRF cavity, and preventing the development of a new dielectric layer on the inner surface of the SRF cavity by preventing an interaction between the inner surface of the SRF cavity and atmospheric gasses.
In an embodiment, the superconducting radio frequency cavity is comprised of niobium.
In an embodiment, subjecting the SRF cavity to a heat treatment further comprises evacuating an internal volume of the SRF cavity, ramping the cavity to a mid-temperature bake, baking the SRF cavity for a prescribed time, and ramping the temperature of the SRF cavity down.
In an embodiment, the method comprises preparing the superconducting radio frequency (SRF) cavity for removal of the dielectric layer from on the inner surface of the SRF cavity further comprises electropolishing the SRF cavity, ultrasonically cleaning the SRF cavity, rinsing the SRF cavity with a high pressure rinse, and assembling the SRF cavity to vacuum hardware.
In an embodiment, a system for treating a cavity comprises a superconducting radio frequency (SRF) cavity with an inner volume defined by an inner surface, a vacuum pulling system coupled to the SRF cavity and configured to draw a vacuum in the inner volume of the SRF cavity, and an oven configured to expose the SRF cavity to a heat treatment wherein the heat treatment removes a dielectric layer from the inner surface of the SRF cavity. In an embodiment, the SRF cavity comprises niobium.
In an embodiment, the system further comprises a vacuum connection configured to connect the SRF cavity to the vacuum pulling system. In an embodiment, the system further comprises a gasket formed between the SRF cavity and the vacuum connection. In an embodiment, the system further comprises a liquid cooled collar configured to cool the gasket formed between the SRF cavity and the vacuum connection. In an embodiment, the system further comprises at least one thermocouple configured to measure a temperature of the SRF cavity during the heat treatment.
It will be appreciated that variations of the above-disclosed and other features and functions, or alternatives thereof, may be desirably combined into many other different systems or applications. Also, various presently unforeseen or unanticipated alternatives, modifications, variations, or improvements therein may be subsequently made by those skilled in the art which are also intended to be encompassed by the following claims.
This patent application is a continuation in part of U.S. patent application Ser. No. 17/898,065, titled, “METHODS AND SYSTEMS FOR TREATMENT OF SUPERCONDUCTING MATERIALS TO IMPROVE LOW FIELD PERFORMANCE” which was filed on Aug. 29, 2022. U.S. patent application Ser. No. 17/898,065 is herein incorporated by reference in its entirety. U.S. application Ser. No. 17/898,065 is a divisional of U.S. patent application Ser. No. 16/594,011, titled, “METHODS AND SYSTEMS FOR TREATMENT OF SUPERCONDUCTING MATERIALS TO IMPROVE LOW FIELD PERFORMANCE” which was filed on Oct. 5, 2019. U.S. patent application Ser. No. 16/594,011 is herein incorporated by reference in its entirety. U.S. patent application Ser. No. 17/898,065, U.S. patent application Ser. No. 16/594,011, and this patent application claim the priority and benefit under 35 U.S.C. § 119(e) of U.S. Provisional Patent Application Ser. No. 62/742,328 filed Oct. 6, 2018, entitled “METHODS AND SYSTEMS FOR TREATMENT OF SRF CAVITIES TO MINIMIZE TLS LOSSES.” U.S. Provisional Patent Application Ser. No. 62/742,328 is herein incorporated by reference in its entirety.
The invention described in this patent application was made with Government support under the Fermi Research Alliance, LLC, Contract Number DE-AC02-07CH11359 awarded by the U.S. Department of Energy. The Government has certain rights in the invention.
| Number | Date | Country | |
|---|---|---|---|
| 62742328 | Oct 2018 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 16594011 | Oct 2019 | US |
| Child | 17898065 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 17898065 | Aug 2022 | US |
| Child | 18650902 | US |
