Methods and systems for updating a buffer

Information

  • Patent Grant
  • 8692839
  • Patent Number
    8,692,839
  • Date Filed
    Friday, January 25, 2008
    16 years ago
  • Date Issued
    Tuesday, April 8, 2014
    10 years ago
Abstract
The present invention relates to methods and systems for updating a buffer. In one aspect, the present invention provides a method for updating a buffer, which includes strategically writing to the buffer to enable concurrent read and write to the buffer. The method eliminates the need for double buffering, thereby resulting in implementation cost and space savings compared to conventional buffering approaches. The method also prevents image tearing when, used to update a frame buffer associated with a display, but is not limited to such applications. In another aspect, the present invention provides efficient mechanisms to enable buffer update across a communication link. In one example, the present invention provides a method for relaying timing information across a communication link.
Description
BACKGROUND

1. Field of the Invention


The present invention relates generally to methods and systems for updating a buffer. More particularly, the invention relates to methods and systems for updating a buffer across a communication link.


2. Background of the Invention


In the field of interconnect technologies, demand for ever increasing data rates, especially as related to video presentations, continues to grow,


The Mobile Display Digital Interface (MDDI) is a cost-effective, low power consumption, transfer mechanism that enables very-high-speed data transfer over a short-range communication link between & host and a client. MDDI requires a minimum of just four wires plus power for bi-directional data transfer that delivers a maximum bandwidth of up to 3.2 Gbits per second.


In one application, MDDI increases reliability and decreases power consumption in clamshell phones by significantly reducing the number of wires that run across a handset's hinge to interconnect the digital baseband controller with an LCD display and/or a camera. This reduction of wires also allows handset manufacturers to lower development costs by simplifying clamshell or sliding handset designs.


In controlling an LCD display across an MDDI link, one problem that arises relates to image flickering when the display is refreshed. Typically, what is needed is either a long persistence conversion or a refresh rate thai is higher than what the human eye can perceive. Long persistence conversion results in image smearing when images appear to move. Therefore, it is desirable for the display to have a high refresh rate. A typical problem that occurs, however, is image tearing. The problem is that while the display is being refreshed at a high rate, the frame buffer associated with the display is being filled at a slower rate. As a result, the display image may reflect both updated and old image information within the same frame of tire display.


In one solution, multiple buffers are used and image information is cycled through the multiple buffers to avoid the image tearing problem described above. This includes commonly known “double buffering” approaches. The drawback of such solution, however, is clearly in the increased cost and chip space requirements in implementation.


What is needed therefore are methods and systems to enable buffer update solutions that, solve the above described problems while satisfying the cost and space requirements of MDDI applications.


SUMMARY

The present invention relates to methods and systems for updating a buffer.


In one aspect, the present invention provides a method for updating a buffer, which includes strategically writing to the buffer to enable concurrent read and write to the buffer. The method eliminates the need for double buffering, thereby resulting in implementation cost and space savings compared to conventional buffering approaches, Among other advantages, the method prevents image tearing when used to update a frame buffer associated with a display, but is not limited to such applications.


In another aspect, the present invention provides efficient mechanisms to enable buffer update across a communication link. In one example, the present invention provides a method for relaying timing information across a communication link. The method, however, is not limited to relaying timing information, and may be used in more general contexts as can be understood by persona skilled in die art(s) based on the teachings herein.


Further embodiments, features, and advantages of the present invention, as well as the structure and operation of the various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.





BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which axe incorporated herein and form a part of the specification, illustrate the present invention and, together with the description, further serve to explain die principles of the invention and to enable a person skilled in the pertinent art to make and use the invention.



FIG. 1 is a block diagram that illustrates an example environment using a Mobile Display Digital Interlace (MDDI) interface.



FIG. 2 is a block diagram that illustrates an MDDI link interconnection according to an embodiment of the example of FIG. 1.



FIG. 3 is an example that illustrates the image tearing problem.



FIG. 4 is a process flowchart that illustrates a method for updating a buffer according to the present invention.



FIG. 5 illustrates examples of the method of FIG. 4.



FIGS. 6A, 6B illustrate buffer read/write strategies,



FIG. 7 is a process flowchart that illustrates a method for conveying timing information across a communication link according to the present invention.



FIG. 8 illustrates an example signal timing diagram for initiating MDDI link wakeup to convey timing information,





The present invention will be described with reference to the accompanying drawings. The drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.


DETAILED DESCRIPTION

This specification discloses one or more embodiments that incorporate the features of this invention. The disclosed embodiment(s) merely exemplify the invention. The scope of the invention is not limited to the disclosed embodiment(s); The invention is defined by the claims appended hereto,


The embodiment(s) described, and references in the specification to “one embodiment”, “an embodiment”, “an example embodiment”, etc., indicate that the embodiment(s) described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described,


Embodiments of the invention may be implemented in hardware, firmware, software, or any combination thereof Embodiments of fee invention may also be implemented as instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may include read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical, or other forms of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others. Further, firmware, software, routines, instructions may be described herein as performing certain actions. However, it should be appreciated that such descriptions are merely for convenience and that such actions in fact result from computing devices, processors, controllers, or other devices executing the firmware, software, routines, instructions, etc.


Mobile Display Digital Interface (MDDI)


The Mobile Display Digital interface (MDDI) is a cost-effective, low power consumption, transfer mechanism that enables very-high-speed serial data transfer over a short-range communication link between a host and a client.


In the following, examples of MDDI will be presented with respect to a camera module contained in an upper clamshell of a mobile phone. However, it would be apparent to persons skilled in the relevant art(s) that any module having functionally equivalent features to the camera module could be readily substituted and used in embodiments of this invention.


Further, according to embodiments of the invention, an MDDI host may comprise one of several types of devices that can benefit from using the present invention. For example, the host could be a portable computer in the form of a handheld, laptop, or similar mobile computing device. It could also be a Personal Data Assistant (PDA), a paging device, or one of many wireless telephones or modems. Alternatively, the host could be a portable entertainment or presentation device such as a portable DVD or CD player, or a game playing device. Furthermore, the host can reside as a host device or control element in a variety of other widely used or planned commercial products for which a high speed communication link is desired with a client. For example, a host could be used to transfer data at high rates from a video recording device to a storage based client, for improved response, or to a high resolution larger screen for presentations. An appliance such as a refrigerator that incorporates an onboard inventory or computing system, and/or Bluetooth connections to other household devices, can have improved display capabilities when operating in an internet or Bluetooth connected mode, or have reduced wiring needs for in-the-door displays (a client) and keypads or scanners (client) while the electronic computer or control systems (host) reside elsewhere in the cabinet. In general, those skilled in the an will appreciate the wide variety of modem electronic devices and appliances that may benefit from the use of this interface, as well as the ability to retrofit older devices with higher data rate transport of information utilizing limited numbers of conductors available in either newly added or existing connectors or cables. At the same time, an MDDI client may comprise a variety of devices useful for presenting information to an end user, or presenting information from a user to the host. For example, a micro-display incorporated in goggles or glasses, a projection device built into a hat or helmet, a small screen or even holographic element built into a vehicle, such as in a window or windshield, or various speaker, headphone, or sound systems for presenting high quality sound or music. Other presentation devices include projectors or projection devices used to present information for meetings, or for movies and television images. Another example would be the use of touch pads or sensitive devices, voice recognition input devices, security scanners, and so forth that may be called upon to transfer a significant amount of information from a device or system user with little actual “input” other than touch or sound from tire user. In addition, docking stations for computers and car kits or desk-top kits and holders for wireless telephones may act as interface devices to end users or to other devices and equipment, and employ either clients (output or input devices such as mice) or hosts to assist in the transfer of data, especially where high speed networks are involved. However, those skilled in the art will readily recognize that the present invention is not limited to these devices, there being many other devices on the market, and proposed for use that are intended to provide end users with high quality images and sound, either in terms of storage and transport or in terms of presentation at playback. The present invention is useful in increasing the data throughput between various elements or devices to accommodate the high data rates needed for realizing the desired user experience.



FIG. 1 is a block diagram that illustrates an example environment using an MDDI interface. In the example of FIG. 1, MDDI is used to interconnect modules across the hinge of a clamshell phone 100.


Referring to FIG. 1, a lower clamshell section 102 of clamshell phone 100 includes a Mobile Station Modem (MSM) baseband chip 104. MSM 104 is a digital baseband controller, An upper clamshell section 114 of clamshell phone 100 includes a Liquid Crystal Display (LCD) module 116 and a camera module 118.


Still referring to FIG. 1, an MDDI link 110 connects camera module 118 to MSM 104. Typically, an MDDI link controller is integrated into each of camera module 118 and MSM 104, In the example of FIG. 1, an MDDI Host 122 is integrated into camera module 112, while an MDDI Client 106 resides on the MSM side of the MDDI link 110. Typically, the MDDI host is the master controller of the MDDI link. In the example of FIG. 1, pixel data from camera module 118 are received and formatted into MDDI packets by MDDI Host 122 before being transmitted onto MDDI link 110. MDDI client 106 receives the MDDI packets and re-converts them Into pixel data of the same format as generated by camera module 118. The pixel data, are then sent to an appropriate block in MSM 104 for processing.


Still referring to FIG. 1, an MDDI link 112 connects LCD module 116 to MSM 104. In the example of FIG. 1, MDDI link 112 interconnects an MDDI Host 108, integrated into MSM 104, and an MDDI Client 120 integrated into LCD module 116. In the example of FIG. 1, image data generated by a graphics controller of MSM 104 are received and formatted into MDDI packets by MDDI Host 108 before being transmitted onto MDDI link 112, MDDI client 120 receives the MDDI packets and re-converts them into image data for use by LCD module 116. Typically, image data is buffered using a frame buffer before being used to refresh the LCD display.



FIG. 2 is a block diagram, that illustrates MDDI link interconnection 112 according to the example of FIG. 1, As described above, one of the functions of MDDI link 112 is to transfer image data from MSM 104 to LCD Module 116. A frame interface (not shown in FIG. 2) connects MDDI link controller 120 to modules of LCD Module 116. Similarly, another frame interlace (not shown in FIG. 2) connects MDDI link controller 108 to appropriate modules of MSM 104. Typically, MDDI link controller 108 represents the host controller of the MDDI link, while MDDI link controller 120 represents the client controller of the MDDI. Other implementations, however, may reverse the roles of the two controllers.


MDDI link 112 includes a minimum of four wires, comprising two wires for data signals 202 and 204 and two wires for probe signals 206 and 208, in addition to two wires for power signals 210 and 211. Data signals 202 and 204 are bi-directional Accordingly, data can be transmitted in either direction (from host to client and vice versa) using data signals 202 and 204. Strobe signals 206 and 208 are unidirectional and may only be driven by the host controller of the link. Accordingly, in the example of FIG. 2, only host controller 108 may drive strobe signals 206 and 208.


Method and Systems for Updating a Buffer


As described above, MDDI can be used to connect a baseband processor (MSM 104 in FIG. 2, for example) and a graphics controller (LCD module 116 in FIG. 2, for example). The baseband processor channels image information, typically received from a camera sensor, to the graphics controller, which uses the image information to create a display image. Typically, the graphics controller employs one or more frame buffers to store the image information received from the baseband processor before using it to generate the display image. As described above, image tearing is one problem that occurs. This happens when the image information is being read out of the frame buffer at a rate slower or fester than the rate at which it is being written to the frame buffer. Methods and systems for updating a buffer, which, among other advantages, solve the image tearing problem, will be described herein. It should be noted, however, that methods and systems according to the present invention are not limited to the specific exemplary embodiments in which they will described or to being used in an MDDI environment. Further, methods and systems of the present invention can be employed in various other applications that utilize buffering, and that may benefit from the advantages of the present invention.


Image Tearing



FIG. 3 illustrates two examples of image tearing that can occur while reading from and/or writing to a buffer. The diagram of FIG. 3 shows plots of read and write pointers as functions of buffer position and time. The read pointer represents the position in the buffer that is being read, fire write pointer indicates fee position in the buffer that is being written to. In the example of FIG. 3, the butler position is defined in terms of pixel position in the buffer.


In the first example in FIG. 3, the buffer is being read at a slower rate than it is written to. This is illustrated by the relative slopes of read and write pointer lines 302 and 304, Note that read and write pointer lines 302 and 304 intersect at time t0. Before time t0, pixels in the buffer are being read prior to being updated. After time t0, pixels are being updated prior to he read. Accordingly, within the same frame (from time 0 to time t1), pixels in positions 0 to p0 (which corresponds to the pixel position read at time t0) are read with older image information relative to pixels from position p0 to the last pixel in the buffer, which are read with updated image information. The result is image tearing with a lower portion of the image reflecting newer image information relative to an upper portion of the image.


In the second example in FIG. 3, the buffer is being read at a taster sate than it is written to. This is illustrated by the relative slopes of read and write pointer lines 302 and 306. Read and write pointer lines 302 and 306 intersect at time t2. Before time t2, pixels in the buffer are being updated prior to being read. After time t2, pixels are being read prior to being updated. Accordingly, within the same frame (from time t1 to time t3), pixels in positions 0 to p2 (which corresponds to the pixel position read at time t2) are read with newer image information relative to pixels from position, p2 to the last pixel in the buffer, which are read with old image information. The result is image tearing with an upper portion of the image reflecting newer image information relative to a lower portion of the image.


Method for Updating a Suffer


A method to strategically update a buffer will now be provided. The method prevents image tearing when used to update a frame buffer associated with a display. The method may also be used in other buffering applications based on its apparent advantages as will be described herein.



FIG. 4 is a process flowchart 400 that illustrates a method for updating a buffer according to the present invention. Process flowchart 400 begins in step 410, which includes determining a read line position in the buffer. The read line position indicates a line currently being read from the buffer. Typically, step 410 is achieved by determining the value of a read pointer that points to the read line position in the buffer.


Step 420 includes partitioning the buffer into at least a first section that is safe to update and a second section that must not be updated based on the read line position. It is noted here that partitioning the buffer does not refer here to a physical but to a logical partitioning of the buffer. Further, a logical partition of the buffer is not feed and may change as will be understood from the teachings herein. The first section of the buffer includes lines of the buffer that have been, read within the current buffer reading cycle based on the read line position. The first section also includes lines of the buffer that can be updated based on the read line position. In other words, the first section includes lines whose content has just been read or lines that can be updated prior to the read line position reaching them based on the buffer read speed and the buffer write speed. Lines that cannot be updated prior to the read line position reaching them based on the buffer read speed and die buffer write speed belong to the second section of the buffer. In other words, lines of the second section of the buffer are those for which there is not sufficient time to update before they have to be read. Accordingly, lines of the second section of the buffer must have been updated during the last reading cycle of the buffer.


Step 430 includes updating the buffer by writing data at a line of the first section which follows the second section based on the read line position. Typically, the buffer is updated at a position which is both safe to update as described above and which has already been read during the last reading cycle of the buffer. In one embodiment, step 430 includes writing data at a line of the first section which immediately follows the last line of the second section. Other variations of step 430 may also be possible as will be apparent to a person skilled in the art based on the teachings disclosed herein.


EXAMPLE ILLUSTRATION


FIG. 5 provides examples that illustrate the method described above in FIG. 4. FIG. 5 shows three examples A, B, and C of reading a butler 500. For purposes of illustration only, buffer 500 is shown to include 352 lines of data. A read pointer 510 indicates the read line position in the buffer. Sections labeled with the roman numeral “I” represent lines that belong to the first section of the buffer as described above. Sections labeled with the roman numeral “II” represent lines that belong to the second section of the buffer as described above.


In example A, shaded area “I” represents lines of the first section of the buffer


which have already been read during the current reading cycle of the buffer. In the example, this area includes lines 1 through m-1. Read pointer S10 indicates that line m is currently being read. Accordingly, area “II” In example A represents lines of buffer 500 that cannot be updated based on the current position of read pointer 510. In other words, there is no sufficient time to update lines in area “II” based on the current position of read pointer 510 and the read and write speeds to the buffer. Note that the first section of the buffer also includes an unshaded area “I” below area “II”. This area “I” belongs to the first section as it is safe to update, but should not be updated given that it has not been read during the current reading cycle of the buffer. Updating unshaded area “I” prior to reading it would result in image tearing, as described in FIG. 3, where the upper portion of the image reflects older image information relative to the lower portion of the image.


In example B, the shaded area, represents lines of the buffer which have already been read during the current reading cycle of the buffer. In the example, this area includes lines 1 through 351. Read pointer 510 indicates that line 352 is currently being read. Accordingly, area “II” in example B represents lines that must have been updated given the current read line position. Lines in area “II” cannot be updated based on the current read line position and the read and write speeds to the buffer, and belong to the second section of the buffer based on the description above. Lines in area “I” belong to the first section of the buffer, and are safe to update. To update the buffer, writing can begin in area “I”. Data, can be written at a line in area “I” that immediately follows area “II”. This corresponds to line m in example B.


Example C illustrates a scenario subsequent to the one shown in B. In example C, read pointer 510 has wrapped around and is reading line m of the buffer. Accordingly, lines preceding the read pointer in the buffer belong to the first section of the buffer, and may be updated. Lines in ares “II” must have been updated during the last write cycle to the buffer gives the current read line position. Lines in area “II” cannot be updated, and belong to the second section of the buffer as described above. In other words, lines in area “II” must contain updated information given the read line position, as there is not sufficient time to update them before they have to be read. Shaded area “I” represents lines of the first section of the buffer that are safe to update, but should not be updated given that they have not been read during the last reading cycle of the buffer.


Buffer Read/Write Strategies


Buffer read/write strategies to avoid image tearing or equivalent problems


related to buffer update are described herein. Buffer update strategies according to the present invention further eliminate the need for the commonly adopted “double buffering” technique. Instead, a single buffer is used, which results in both implementation cost and space savings. The present invention is not limited to the exemplary strategies described herein, and variations which, are apparent to persons skilled in the art(s) are also considered to be within the scope of the present invention.


FIGS., 6A and 6B illustrate exemplary buffer read/write strategies according to the present invention. The diagrams of FIGS. 6A and 6B show plots of read pointer 612 and write pointers 614 and 616 as functions of buffer position and time t1, in the examples of FIGS. 6A and 6B, die buffer position is defined in terms of pixel position in the buffer, which may he equivalently replaced with any other measure of buffer position, such as line number, for example.


Referring to FIG. 6A, an exemplary buffer read/write strategy is depicted over two reading cycles of the buffer. In the first reading cycle, from time 0 to time t1, the first half of the buffer is updated, while the entire buffer content is read. In the second reading cycle of the buffer, from time t1 to time t2, the second half of fee buffer is updated, while the entire buffer content is read. Note that the first half of the buffer, during the second reading cycle, contains updated information that were written to the buffer during the first reading cycle. The second half of the buffer, during the second cycle, is updated prior to being read as shown by write pointer 614 preceding read pointer 612 in time over the second reading cycle. Accordingly, over both reading cycles, data read from fee buffer belongs to fee same update cycle of the buffer, and no image tearing occurs.



FIG. 6B illustrates another exemplary buffer read/write strategy over two reading cycles of fee buffer. During the first reading cycle, the first half of the buffer is updated from time t0 to time t1. During the second reading cycle, the second half of the buffer is updated from time t1 to time t2. Note that writing to the buffer starts at a time to during the first cycle such that, during the first cycle, the entire buffer is read with an initial information content and not an updated content due to the writing, process. On the other hand, writing to the buffer ends at a time t2 during the second cycle such that, daring fee second cycle, the entire buffer contains updated information content when it is read. This is shown by write pointer 616 preceding read pointer 612 in time over fee second reading cycle. Accordingly, image tearing will not occur over both reading cycles in the example of FIG. 6B.


Buffer Update Through a Communication Link


Methods and systems for updating a buffer according to the present invention may be used in a variety of applications, in one application, as described above, the buffer update approach may be used to update a frame buffer associated with a display. In another application, the buffer is updated remotely, wherein it is written to by a first processor and is read by a second processor, and wherein the first and second processors communicate through a communication link. For example, the first and second processors represent an MSM baseband processor and an LCD module, respectively, that communicate through an MDDI link, as illustrated in FIG. 2. In certain applications, synchronization between the first and second processors will be required.


Methods and systems related to synchronization to enable buffer update across a communication link will now be provided. As will be understood by a person skilled in the art(s) based, on the teachings herein, certain aspects of the methods and systems that will be presented may be applicable to synchronization problems in general, and are not limited to synchronization for enabling remote buffer update.


In one aspect, synchronization between the first and second processors includes scheduling, a first event at the first processor that is triggered by a second event at the second, processor. This is typically done by writing to a register to enable the triggering of an interrupt that causes the first event at the first processor whenever the second event occurs at the second processor. For example, in a remote buffer update application, where the buffer is updated by the first processor and read by the second processor, the first event may represent the need to start writing to the buffer, while the second event may represent that the read pointer has finished a complete reading cycle of the buffer. The second event may then be triggered at the second processor based on the read line position in die buffet.


In another aspect, methods to convey synchronization information across the communication link are provided. The methods may be employed to relay synchronization information related to buffer update, as described above, for example. FIG. 7 is a process flowchart 700 feat illustrates a method for conveying timing information across a communication link between a first processor and a second processor, when the communication link is in hibernation mode. Process flowchart 700 begins in step 710, which includes scheduling a time event at the first processor to convey timing information to the second processor. The time event may be a periodic event as required by the specific application. For example, in the case of a buffer update application, the time event may be related to the read line position in the buffer.


Step 720 includes, initiating a link wakeup by the first processor at the occurrence of the time event. For example, in the case of a buffer update across an MDDI link, where an MDDI client is located at the LCD module side of the interconnection, the MDDI client may initiate a link wakeup by driving the data signal to a logic one to notify the MDDI host that the buffer should be updated.


Subsequently, step 730 includes detecting the link wakeup at the second processor (for example, an MDDI host on the MSM side of the MDDI interconnection), and using the detected link wakeup timing to synchronize the first and second processors with respect to the timing information that is being conveyed. For example, in the case of a buffer update across an MDDI link, when the MDDI host detects the link wakeup by the MDDI client, it can synchronize itself with the MDDI client with respect to the buffer update start time.


It can be appreciated by a person skilled in fee art based on fee teachings herein that the method described in FIG. 7 may be extended to convey any kind of timing information across a communication link, and is not limited to buffer update synchronization purposes. The advantages of such method are through saving the link and conveying information by simply waking fee link up.



FIG. 8 illustrates an example timing diagram 800 for initiating link wakeup to convey timing information across an MDDI interconnection. For example, the MDDI interconnection may be such as the one described above with reference to FIG. 2 with an MDDI host located at the MSM and an MDDI client located at the LCD module. The MDDI client, accordingly, would initiate a link wakeup to convey buffer update information to fee MDDI host, which, in turn, would start refreshing the buffer located in the LCD module. In fee example of FIG. 8, vsync_wake signal 802 represents a value written to a register at the MDDI host to enable a wakeup at the host based on vsync signal 806, Wakeup at fee host occurs whenever the value of vsync_wake 802 is high. Vsync signal 806 represents a value of a signal “vertical sync”, which occurs at the client and is related to buffer update time, for example, vsync 806 goes high whenever the read pointer has wrapped and is reading from the beginning of the buffer. Link_active signal 804 represents whether or not the data signal of the MDDI interconnection is active or in hibernation. Mddi_client_wakeup signal 808 represents a signal at the client, which responds to vsync 806 to wake up fee client.


In the example of FIG. 8, vsync_wake 802 is set at the host at time A. At time


B, the MDDI link goes into hibernation, mode. At time C, vsync 806 goes high indicating feat fee buffer needs to be refreshed by the host. As a result, mddi_client_wakeup 808 also goes high to wake die client up to initiate the link wakeup. The client initiates the link wakeup by driving the data signal of the interconnection, and the link goes active at time D. Subsequently, vsync_wake 802 and mddi_client_wakeup return to zero, and fee host detects the link wakeup and begins to refresh the buffer at the client.


CONCLUSION

While various embodiments of the present invention have been, described above, it should be understood, that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various changes in form and detail can be made therein without departing from the spirit and scope of the invention. Thus, the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims
  • 1. A method for updating a buffer having a plurality of lines associated with a display to prevent image tearing, comprising: (a) determining a read line position in the buffer, the read line position indicating a line currently being read from the buffer, wherein the buffer is written to by a first processor and is read by a second processor;(b) partitioning the buffer into at least a first section that is safe to update and a second section that must not be updated based on the read line position; and(c) writing data at a line of the first section to update the buffer, wherein the line follows the second section based on the read line position.
  • 2. The method of claim 1, further comprising the step of the first and second processors communicating remotely through a communication link.
  • 3. The method of claim 1, wherein the first processor updates the buffer based on a first event at the first processor that is triggered by a second event at the second processor.
  • 4. The method of claim 3, further comprising: (d) scheduling the first event by writing to a register to enable the triggering of an interrupt that causes the first event based on the second event; and(e) triggering the second event at the second processor based on the read line position of the buffer.
  • 5. The method of claim 3, wherein the first event comprises a link wakeup event when the communication link is in hibernation mode.
  • 6. The method of claim 1, wherein the first and second processors comprise host and client controllers of a Mobile Display Digital Interface (MDDI) link.
  • 7. The method of claim 6, wherein a first controller comprises a Mobile Station Modem (MSM) baseband processor, and wherein a second controller comprises a display controller.
  • 8. The method of claim 1, wherein the buffer comprises a frame buffer used for refreshing a display.
  • 9. A system for updating a buffer having a plurality of lines associated with a display to prevent image tearing, comprising: means for determining a read line position in the buffer, the read line position indicating a line currently being read from the buffer, wherein the buffer is written to by a first processor and is read by a second processor;means for partitioning the buffer into at least a first section that is safe to update and a second section that must not be updated based on the read line position; andmeans for writing data at a line of the first section to update the buffer, wherein the line follows the second section based on the read line position.
  • 10. The system of claim 9, wherein the first and second processors communicate remotely through a communication link.
  • 11. The system of claim 9, wherein the first processor updates the buffer based on a first event at the first processor that is triggered by a second event at the second processor.
  • 12. The system of claim 11, further comprising: means for scheduling the first event by writing to a register to enable the triggering of an interrupt that causes the first event based on the second event; andmeans for triggering the second event at the second processor based on the read line position of the buffer.
  • 13. The system of claim 11, wherein the first event comprises a link wakeup event when the communication link is in hibernation mode.
  • 14. The system of claim 9, wherein the first and second processors comprise host and client controllers of a Mobile Display Digital Interface (MDDI) link.
  • 15. The system of claim 14, wherein the host controller comprises a Mobile Station Modem (MSM) baseband processor, and wherein the client controller comprises a display controller.
  • 16. The system of claim 9, wherein the buffer comprises a frame buffer used for refreshing a display.
US Referenced Citations (403)
Number Name Date Kind
3594304 Seitzer et al. Jul 1971 A
4042783 Gindi Aug 1977 A
4363123 Grover Dec 1982 A
4393444 Weinberg Jul 1983 A
4491943 Iga et al. Jan 1985 A
4660096 Arlan et al. Apr 1987 A
4764805 Rabbani et al. Aug 1988 A
4769761 Downes et al. Sep 1988 A
4812296 Schmelz et al. Mar 1989 A
4821296 Cordell Apr 1989 A
4891805 Fallin Jan 1990 A
5079693 Miller Jan 1992 A
5111455 Negus May 1992 A
5131012 Dravida Jul 1992 A
5138616 Wagner, Jr. et al. Aug 1992 A
5155590 Beyers, II et al. Oct 1992 A
5167035 Mann et al. Nov 1992 A
5224213 Dieffenderfer et al. Jun 1993 A
5227783 Shaw et al. Jul 1993 A
5231636 Rasmussen Jul 1993 A
5331642 Valley et al. Jul 1994 A
5345542 Wye Sep 1994 A
5359595 Weddle et al. Oct 1994 A
5377188 Seki Dec 1994 A
5396636 Gallagher et al. Mar 1995 A
5418452 Pyle May 1995 A
5418952 Morley et al. May 1995 A
5420858 Marshall et al. May 1995 A
5422894 Abe et al. Jun 1995 A
5430486 Fraser et al. Jul 1995 A
5477534 Kusano Dec 1995 A
5483185 Scriber et al. Jan 1996 A
5490247 Tung et al. Feb 1996 A
5502499 Birch et al. Mar 1996 A
5510832 Garcia Apr 1996 A
5513185 Schmidt Apr 1996 A
5519830 Opoczynski May 1996 A
5521907 Ennis, Jr. et al. May 1996 A
5524007 White et al. Jun 1996 A
5530704 Gibbons et al. Jun 1996 A
5535336 Smith et al. Jul 1996 A
5543939 Harvey et al. Aug 1996 A
5546121 Gotanda et al. Aug 1996 A
5550489 Raab Aug 1996 A
5559459 Back et al. Sep 1996 A
5559952 Fujimoto Sep 1996 A
5560022 Dunstan et al. Sep 1996 A
5565957 Goto Oct 1996 A
5575951 Anderson Nov 1996 A
5604450 Borkar et al. Feb 1997 A
5619650 Bach et al. Apr 1997 A
5621664 Phaal Apr 1997 A
5646947 Cooper et al. Jul 1997 A
5664948 Dimitriadis et al. Sep 1997 A
5680404 Gray Oct 1997 A
5726990 Shimada et al. Mar 1998 A
5732352 Gutowski et al. Mar 1998 A
5733131 Park Mar 1998 A
5734118 Ashour et al. Mar 1998 A
5751445 Masunaga May 1998 A
5751951 Osborne et al. May 1998 A
5777999 Hiraki et al. Jul 1998 A
5790551 Chan Aug 1998 A
5798720 Yano et al. Aug 1998 A
5802351 Frampton Sep 1998 A
5815507 Vinggaard et al. Sep 1998 A
5816921 Hosokawa Oct 1998 A
5818255 New et al. Oct 1998 A
5822603 Hansen et al. Oct 1998 A
5844918 Kato Dec 1998 A
5847752 Sebestyen, I Dec 1998 A
5862160 Irvin et al. Jan 1999 A
5867501 Horst et al. Feb 1999 A
5867510 Steele Feb 1999 A
5881262 Abramson et al. Mar 1999 A
5903281 Chen et al. May 1999 A
5935256 Lesmeister Aug 1999 A
5953378 Hotani et al. Sep 1999 A
5958006 Eggleston et al. Sep 1999 A
5963557 Eng Oct 1999 A
5963564 Petersen et al. Oct 1999 A
5963979 Inoue et al. Oct 1999 A
5969750 Hsieh et al. Oct 1999 A
5982362 Crater et al. Nov 1999 A
5983261 Riddle Nov 1999 A
5990852 Szamrej Nov 1999 A
5990902 Park Nov 1999 A
5995512 Pogue, Jr. Nov 1999 A
6002709 Hendrickson Dec 1999 A
6014705 Koenck et al. Jan 2000 A
6047380 Nolan et al. Apr 2000 A
6049837 Youngman Apr 2000 A
6055247 Kubota et al. Apr 2000 A
6064649 Johnston May 2000 A
6078361 Reddy Jun 2000 A
6081513 Roy Jun 2000 A
6091709 Harrison et al. Jul 2000 A
6092231 Sze Jul 2000 A
6097401 Owen et al. Aug 2000 A
6101601 Matthews et al. Aug 2000 A
6118791 Fichou et al. Sep 2000 A
6151067 Suemoto et al. Nov 2000 A
6151320 Shim et al. Nov 2000 A
6154156 Tagato Nov 2000 A
6154466 Iwasaki et al. Nov 2000 A
6185601 Wolff Feb 2001 B1
6192230 Van Bokhorst et al. Feb 2001 B1
6198752 Lee Mar 2001 B1
6199169 Voth et al. Mar 2001 B1
6222677 Budd et al. Apr 2001 B1
6236647 Amalfitano May 2001 B1
6242953 Thomas Jun 2001 B1
6243596 Kikinis Jun 2001 B1
6243761 Mogul et al. Jun 2001 B1
6246876 Hontzeas Jun 2001 B1
6252526 Uyehara Jun 2001 B1
6252888 Fite, Jr. et al. Jun 2001 B1
6256509 Tanaka et al. Jul 2001 B1
6288739 Hales et al. Sep 2001 B1
6297684 Uyehara et al. Oct 2001 B1
6308239 Osakada et al. Oct 2001 B1
6335696 Aoyagi et al. Jan 2002 B1
6359479 Oprescu Mar 2002 B1
6363439 Battles et al. Mar 2002 B1
6393008 Cheng et al. May 2002 B1
6397286 Chatenever et al. May 2002 B1
6400392 Yamaguchi et al. Jun 2002 B1
6400654 Sawamura et al. Jun 2002 B1
6400754 Fleming et al. Jun 2002 B2
6421735 Jung et al. Jul 2002 B1
6429867 Deering Aug 2002 B1
6430196 Baroudi Aug 2002 B1
6430606 Haq Aug 2002 B1
6434187 Beard et al. Aug 2002 B1
6438363 Feder et al. Aug 2002 B1
6457090 Young Sep 2002 B1
6475245 Gersho et al. Nov 2002 B2
6477186 Nakura et al. Nov 2002 B1
6480521 Odenwalder et al. Nov 2002 B1
6483825 Seta Nov 2002 B2
6487217 Baroudi Nov 2002 B1
6493357 Fujisaki Dec 2002 B1
6493713 Kanno Dec 2002 B1
6493824 Novoa et al. Dec 2002 B1
6545979 Poulin Apr 2003 B1
6549538 Beck et al. Apr 2003 B1
6549958 Kuba Apr 2003 B1
6574211 Padovani et al. Jun 2003 B2
6583809 Fujiwara Jun 2003 B1
6594304 Chan Jul 2003 B2
6609167 Bastiani et al. Aug 2003 B1
6611221 Soundarapandian et al. Aug 2003 B1
6611503 Fitzgerald et al. Aug 2003 B1
6618360 Scoville et al. Sep 2003 B1
6621809 Lee et al. Sep 2003 B1
6621851 Agee et al. Sep 2003 B1
6636508 Li et al. Oct 2003 B1
6636922 Bastiani et al. Oct 2003 B1
6662322 Abdelilah et al. Dec 2003 B1
6690201 Simkins et al. Feb 2004 B1
6714233 Chihara et al. Mar 2004 B2
6715088 Togawa Mar 2004 B1
6728263 Joy et al. Apr 2004 B2
6738344 Bunton et al. May 2004 B1
6745364 Bhatt et al. Jun 2004 B2
6754179 Lin Jun 2004 B1
6760722 Raghunandan Jul 2004 B1
6760772 Zou et al. Jul 2004 B2
6760882 Gesbert et al. Jul 2004 B1
6765506 Lu Jul 2004 B1
6771613 O'Toole et al. Aug 2004 B1
6778493 Ishii Aug 2004 B1
6782039 Alamouti et al. Aug 2004 B2
6784941 Su et al. Aug 2004 B1
6791379 Wakayama et al. Sep 2004 B1
6797891 Blair et al. Sep 2004 B1
6804257 Benayoun et al. Oct 2004 B1
6810084 Jun et al. Oct 2004 B1
6813638 Sevanto et al. Nov 2004 B1
6816929 Ueda Nov 2004 B2
6831685 Ueno et al. Dec 2004 B1
6836469 Wu Dec 2004 B1
6850282 Makino et al. Feb 2005 B1
6865240 Kawataka Mar 2005 B1
6865609 Gubbi et al. Mar 2005 B1
6865610 Bolosky et al. Mar 2005 B2
6867668 Dagostino et al. Mar 2005 B1
6882361 Gaylord Apr 2005 B1
6886035 Wolff Apr 2005 B2
6892071 Park et al. May 2005 B2
6894994 Grob et al. May 2005 B1
6895410 Ridge May 2005 B2
6897891 Itsukaichi May 2005 B2
6906762 Witehira Jun 2005 B1
6927746 Lee et al. Aug 2005 B2
6944136 Kim et al. Sep 2005 B2
6947436 Harris et al. Sep 2005 B2
6950428 Horst et al. Sep 2005 B1
6956829 Lee Oct 2005 B2
6973039 Redi et al. Dec 2005 B2
6973062 Han Dec 2005 B1
6975145 Vadi et al. Dec 2005 B1
6990549 Main et al. Jan 2006 B2
6993393 Von Arx et al. Jan 2006 B2
6999432 Zhang et al. Feb 2006 B2
7003796 Humpleman Feb 2006 B1
7010607 Bunton Mar 2006 B1
7012636 Hatanaka Mar 2006 B2
7015838 Groen et al. Mar 2006 B1
7023924 Keller et al. Apr 2006 B1
7030796 Shim et al. Apr 2006 B2
7036066 Weibel et al. Apr 2006 B2
7042914 Zerbe et al. May 2006 B2
7047475 Sharma et al. May 2006 B2
7051218 Gulick et al. May 2006 B1
7062264 Ko et al. Jun 2006 B2
7062579 Tateyama et al. Jun 2006 B2
7068666 Foster et al. Jun 2006 B2
7095435 Hartman et al. Aug 2006 B1
7110420 Bashirullah et al. Sep 2006 B2
7126945 Beach Oct 2006 B2
7138989 Mendelson et al. Nov 2006 B2
7143177 Johnson et al. Nov 2006 B1
7143207 Vogt et al. Nov 2006 B2
7145411 Blair et al. Dec 2006 B1
7151940 Diao Dec 2006 B2
7158536 Ching et al. Jan 2007 B2
7158539 Zhang et al. Jan 2007 B2
7161846 Padaparambil Jan 2007 B2
7165112 Battin et al. Jan 2007 B2
7178042 Sakagami Feb 2007 B2
7180951 Chan Feb 2007 B2
7184408 Denton et al. Feb 2007 B2
7187738 Naven et al. Mar 2007 B2
7191281 Bajikar Mar 2007 B2
7219294 Vogt et al. May 2007 B2
7231402 Dickens Jun 2007 B2
7251231 Gubbi Jul 2007 B2
7257087 Grovenburg Aug 2007 B2
7260087 Bao et al. Aug 2007 B2
7269153 Schultz et al. Sep 2007 B1
7274652 Webster et al. Sep 2007 B1
7278069 Abrosimov et al. Oct 2007 B2
7284181 Venkatramani Oct 2007 B1
7301968 Haran et al. Nov 2007 B2
7310535 MacKenzie et al. Dec 2007 B1
7315265 Wiley et al. Jan 2008 B2
7315520 Xue et al. Jan 2008 B2
7317754 Remy et al. Jan 2008 B1
7327735 Robotham et al. Feb 2008 B2
7336139 Blair et al. Feb 2008 B2
7336667 Allen et al. Feb 2008 B2
7340548 Love et al. Mar 2008 B2
7349973 Saito et al. Mar 2008 B2
7373155 Duan et al. May 2008 B2
7383350 Moore et al. Jun 2008 B1
7383399 Vogt et al. Jun 2008 B2
7392541 Largman et al. Jun 2008 B2
7403487 Foladare et al. Jul 2008 B1
7403511 Liang et al. Jul 2008 B2
7405703 Qi et al. Jul 2008 B2
7412642 Cypher Aug 2008 B2
7430001 Fujii Sep 2008 B2
7447953 Vogt et al. Nov 2008 B2
7451362 Chen et al. Nov 2008 B2
7487917 Kotlarsky et al. Feb 2009 B2
7508760 Akiyama et al. Mar 2009 B2
7515705 Segawa et al. Apr 2009 B2
7526323 Kim et al. Apr 2009 B2
7536598 Largman et al. May 2009 B2
7543326 Moni Jun 2009 B2
7557633 Yu Jul 2009 B2
7574113 Nagahara et al. Aug 2009 B2
7595834 Kawai et al. Sep 2009 B2
7595835 Kosaka et al. Sep 2009 B2
7634607 Honda Dec 2009 B2
7643823 Shamoon et al. Jan 2010 B2
7729720 Suh et al. Jun 2010 B2
7800600 Komatsu et al. Sep 2010 B2
7813451 Binder et al. Oct 2010 B2
7831127 Wilkinson Nov 2010 B2
7835280 Pang et al. Nov 2010 B2
7844296 Yuki Nov 2010 B2
7873343 Gollnick et al. Jan 2011 B2
7876821 Li et al. Jan 2011 B2
7877439 Gallou et al. Jan 2011 B2
7912503 Chang et al. Mar 2011 B2
7945143 Yahata et al. May 2011 B2
7949777 Wallace et al. May 2011 B2
8031130 Tamura Oct 2011 B2
8077634 Maggenti et al. Dec 2011 B2
8325239 Kaplan et al. Dec 2012 B2
20010005385 Ichiguchi et al. Jun 2001 A1
20010012293 Petersen et al. Aug 2001 A1
20010032295 Tsai et al. Oct 2001 A1
20010047450 Gillingham et al. Nov 2001 A1
20010047475 Terasaki Nov 2001 A1
20010053174 Fleming et al. Dec 2001 A1
20020011998 Tamura Jan 2002 A1
20020045448 Park et al. Apr 2002 A1
20020067787 Naven et al. Jun 2002 A1
20020071395 Redi et al. Jun 2002 A1
20020131379 Lee et al. Sep 2002 A1
20020140845 Yoshida et al. Oct 2002 A1
20020146024 Harris et al. Oct 2002 A1
20020188907 Kobayashi Dec 2002 A1
20020193133 Shibutani Dec 2002 A1
20030003943 Bajikar et al. Jan 2003 A1
20030028647 Grosu Feb 2003 A1
20030033417 Zou et al. Feb 2003 A1
20030034955 Gilder et al. Feb 2003 A1
20030035049 Dickens et al. Feb 2003 A1
20030039212 Lloyd et al. Feb 2003 A1
20030061431 Mears et al. Mar 2003 A1
20030081557 Mettala et al. May 2003 A1
20030086443 Beach et al. May 2003 A1
20030091056 Paul et al. May 2003 A1
20030093607 Main et al. May 2003 A1
20030125040 Walton et al. Jul 2003 A1
20030144006 Johansson et al. Jul 2003 A1
20030158979 Tateyama et al. Aug 2003 A1
20030185220 Valenci Oct 2003 A1
20030191809 Mosley et al. Oct 2003 A1
20030194018 Chang Oct 2003 A1
20030235209 Garg et al. Dec 2003 A1
20040008631 Kim Jan 2004 A1
20040024920 Gulick et al. Feb 2004 A1
20040028415 Eiselt Feb 2004 A1
20040049616 Dunstan et al. Mar 2004 A1
20040073697 Saito et al. Apr 2004 A1
20040082383 Muncaster et al. Apr 2004 A1
20040100966 Allen, Jr. et al. May 2004 A1
20040128563 Kaushik et al. Jul 2004 A1
20040130466 Lu et al. Jul 2004 A1
20040140459 Haigh et al. Jul 2004 A1
20040153952 Sharma et al. Aug 2004 A1
20040176065 Liu Sep 2004 A1
20040184450 Omran Sep 2004 A1
20040199652 Zou et al. Oct 2004 A1
20040221315 Kobayashi Nov 2004 A1
20040260823 Tiwari et al. Dec 2004 A1
20050012905 Morinaga Jan 2005 A1
20050020279 Markhovsky et al. Jan 2005 A1
20050021885 Anderson et al. Jan 2005 A1
20050033586 Savell Feb 2005 A1
20050055399 Savchuk Mar 2005 A1
20050088939 Hwang et al. Apr 2005 A1
20050091593 Peltz Apr 2005 A1
20050108611 Vogt et al. May 2005 A1
20050117601 Anderson et al. Jun 2005 A1
20050120079 Anderson et al. Jun 2005 A1
20050120208 Dobson et al. Jun 2005 A1
20050125840 Anderson et al. Jun 2005 A1
20050135390 Anderson et al. Jun 2005 A1
20050138260 Love et al. Jun 2005 A1
20050144225 Anderson et al. Jun 2005 A1
20050154599 Kopra et al. Jul 2005 A1
20050163085 Cromer et al. Jul 2005 A1
20050163116 Anderson et al. Jul 2005 A1
20050165970 Ching et al. Jul 2005 A1
20050184993 Ludwin et al. Aug 2005 A1
20050204057 Anderson et al. Sep 2005 A1
20050213593 Anderson et al. Sep 2005 A1
20050216421 Barry et al. Sep 2005 A1
20050216599 Anderson et al. Sep 2005 A1
20050216623 Dietrich et al. Sep 2005 A1
20050248685 Seo et al. Nov 2005 A1
20050259670 Anderson et al. Nov 2005 A1
20050265333 Coffey et al. Dec 2005 A1
20050271072 Anderson et al. Dec 2005 A1
20050286466 Tagg et al. Dec 2005 A1
20060004968 Vogt et al. Jan 2006 A1
20060034301 Anderson et al. Feb 2006 A1
20060034326 Anderson et al. Feb 2006 A1
20060120433 Baker et al. Jun 2006 A1
20060128399 Duan et al. Jun 2006 A1
20060161691 Katibian et al. Jul 2006 A1
20060164424 Wiley et al. Jul 2006 A1
20060168496 Steele et al. Jul 2006 A1
20060171414 Katibian et al. Aug 2006 A1
20060179164 Katibian et al. Aug 2006 A1
20060179384 Wiley et al. Aug 2006 A1
20060212775 Cypher et al. Sep 2006 A1
20060274031 Yuen et al. Dec 2006 A1
20060288133 Katibian et al. Dec 2006 A1
20070008897 Denton et al. Jan 2007 A1
20070073949 Fredrickson et al. Mar 2007 A1
20070098002 Liu et al. May 2007 A1
20070274434 Arkas et al. Nov 2007 A1
20080036631 Musfeldt Feb 2008 A1
20080088492 Wiley et al. Apr 2008 A1
20080147951 Love Jun 2008 A1
20080282296 Kawai et al. Nov 2008 A1
20090055709 Anderson et al. Feb 2009 A1
20090070479 Anderson et al. Mar 2009 A1
20090290628 Matsumoto Nov 2009 A1
20100128626 Anderson et al. May 2010 A1
20100260055 Anderson et al. Oct 2010 A1
20110013681 Zou et al. Jan 2011 A1
20110022719 Anderson et al. Jan 2011 A1
20110199383 Anderson et al. Aug 2011 A1
20110199931 Anderson et al. Aug 2011 A1
20120008642 Katibian et al. Jan 2012 A1
Foreign Referenced Citations (183)
Number Date Country
88101302 Oct 1988 CN
1234709 Nov 1999 CN
1310400 Aug 2001 CN
1377194 Oct 2002 CN
1467953 Jan 2004 CN
1476268 Feb 2004 CN
0594006 Apr 1994 EP
0872085 Dec 1996 EP
0850522 Jul 1998 EP
0896318 Feb 1999 EP
0969676 Jan 2000 EP
1217602 Jun 2002 EP
1309151 May 2003 EP
1423778 Jun 2004 EP
1478137 Nov 2004 EP
1544743 Jun 2005 EP
1580964 Sep 2005 EP
1630784 Mar 2006 EP
2729528 Jul 1996 FR
2250668 Jun 1992 GB
222657996 Oct 1993 GB
53131709 Nov 1978 JP
62132433 Jun 1987 JP
64008731 Jan 1989 JP
H01129371 May 1989 JP
1314022 Dec 1989 JP
H0465711 Mar 1992 JP
4167715 Jun 1992 JP
4241541 Aug 1992 JP
5199387 Aug 1993 JP
5219141 Aug 1993 JP
5260115 Oct 1993 JP
6037848 Feb 1994 JP
06053973 Feb 1994 JP
06317829 Nov 1994 JP
7115352 May 1995 JP
08037490 Feb 1996 JP
H0854481 Feb 1996 JP
08-274799 Oct 1996 JP
09-006725 Jan 1997 JP
H0923243 Jan 1997 JP
09230837 Sep 1997 JP
09261232 Oct 1997 JP
9270951 Oct 1997 JP
9307457 Nov 1997 JP
10200941 Jul 1998 JP
10234038 Sep 1998 JP
10312370 Nov 1998 JP
11017710 Jan 1999 JP
11032041 Feb 1999 JP
11122234 Apr 1999 JP
11163690 Jun 1999 JP
11225182 Aug 1999 JP
11225372 Aug 1999 JP
11249987 Sep 1999 JP
11282786 Oct 1999 JP
11341363 Dec 1999 JP
11355327 Dec 1999 JP
2000188626 Jul 2000 JP
2000216843 Aug 2000 JP
2000236260 Aug 2000 JP
2000278141 Oct 2000 JP
2000295667 Oct 2000 JP
2000324135 Nov 2000 JP
2000358033 Dec 2000 JP
200144960 Feb 2001 JP
200194542 Apr 2001 JP
2001094524 Apr 2001 JP
2001177746 Jun 2001 JP
2001222474 Aug 2001 JP
2001282714 Oct 2001 JP
2001292146 Oct 2001 JP
2001306428 Nov 2001 JP
2001319745 Nov 2001 JP
2001320280 Nov 2001 JP
2001333130 Nov 2001 JP
2002500855 Jan 2002 JP
2002503065 Jan 2002 JP
2002062990 Feb 2002 JP
2002208844 Jul 2002 JP
2002281007 Sep 2002 JP
2002300229 Oct 2002 JP
2002300299 Oct 2002 JP
2003006143 Jan 2003 JP
2003009035 Jan 2003 JP
2003044184 Feb 2003 JP
2003046595 Feb 2003 JP
2003046596 Feb 2003 JP
2003058271 Feb 2003 JP
2003069544 Mar 2003 JP
2003076654 Mar 2003 JP
2003098583 Apr 2003 JP
2003111135 Apr 2003 JP
2003167680 Jun 2003 JP
2003198550 Jul 2003 JP
2003303068 Oct 2003 JP
2004005683 Jan 2004 JP
2004007356 Jan 2004 JP
2004021613 Jan 2004 JP
2004046324 Feb 2004 JP
2004153620 May 2004 JP
2004246023 Sep 2004 JP
2004297660 Oct 2004 JP
2004531916 Oct 2004 JP
2004309623 Nov 2004 JP
2004363687 Dec 2004 JP
2005107683 Apr 2005 JP
2005536167 Nov 2005 JP
2005539464 Dec 2005 JP
1020060056989 May 1999 KR
199961245 Sep 1999 KR
0222225 Oct 1999 KR
1019990082741 Nov 1999 KR
200039224 Jul 2000 KR
1999-0058829 Jan 2001 KR
20010019734 Mar 2001 KR
20020071226 Sep 2002 KR
2003-0061001 Jul 2003 KR
2004-0014406 Feb 2004 KR
1020047003852 May 2004 KR
2004-69360 Aug 2004 KR
1020060053050 May 2006 KR
2111619 May 1998 RU
2150791 Jun 2000 RU
2337497 Oct 2008 RU
2337497 Oct 2008 RU
459184 Oct 2001 TW
466410 Dec 2001 TW
488133 May 2002 TW
507195 Oct 2002 TW
513636 Dec 2002 TW
515154 Dec 2002 TW
529253 Apr 2003 TW
535372 Jun 2003 TW
540238 Jul 2003 TW
542979 Jul 2003 TW
200302008 Jul 2003 TW
546958 Aug 2003 TW
552792 Sep 2003 TW
200304313 Sep 2003 TW
563305 Nov 2003 TW
569547 Jan 2004 TW
595116 Jun 2004 TW
9210890 Jun 1992 WO
9410779 May 1994 WO
9619053 Jun 1996 WO
9642158 Dec 1996 WO
98-02986 Jan 1998 WO
9802988 Jan 1998 WO
WO9915979 Apr 1999 WO
9923783 May 1999 WO
0130038 Apr 2001 WO
WO0137484 May 2001 WO
WO0138970 May 2001 WO
WO0138982 May 2001 WO
WO0158162 Aug 2001 WO
0249314 Jun 2002 WO
0249314 Jun 2002 WO
WO02098112 Dec 2002 WO
03023587 Mar 2003 WO
03023587 Mar 2003 WO
03040893 May 2003 WO
WO03039081 May 2003 WO
03061240 Jul 2003 WO
WO2004015680 Feb 2004 WO
WO2004110021 Dec 2004 WO
WO2005018191 Feb 2005 WO
2005073955 Aug 2005 WO
2005088939 Sep 2005 WO
2005091593 Sep 2005 WO
2005096594 Oct 2005 WO
2005122509 Dec 2005 WO
WO2006008067 Jan 2006 WO
2006058045 Jun 2006 WO
2006058050 Jun 2006 WO
2006058051 Jun 2006 WO
2006058052 Jun 2006 WO
2006058053 Jun 2006 WO
2006058067 Jun 2006 WO
2006058173 Jun 2006 WO
WO2006058045 Jun 2006 WO
WO2006058051 Jun 2006 WO
WO07051186 May 2007 WO
Non-Patent Literature Citations (41)
Entry
“V4400,” Product Brochure, May 31, 2004.
Plug and Display Standard Video Electronics Standards Association—VESA. Ver. 1, Jun. 11, 1997.
Sevanto, J., “Multimedia messaging service for GPRS and UMTS”, IEEE on WCNC, Sep. 1999, pp. 1422-1426, vol. 3.
International Search Report PCT/US05/042643—Internationai Search Authority—US Oct. 5, 2006.
International Search Report PCT/US05/040402—International Search Authority—US Feb. 20, 2007.
International Search Report PCT/US05/040414—International Search Authority—US May 23, 2007.
International Search Report PCT/US05/0402436—International Search Authority—US Oct. 2, 2006.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 10, Aug. 13, 2003, pp. 1-75.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 10, Aug. 13. 2003, pp. 76-151.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 11, Sep. 10. 2003, pp. 1-75.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 11, Sep. 10, 2003, pp. 76-150.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 13, Oct. 15, 2003, pp. 1-75.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 13, Oct. 15, 2003, pp. 76-154.
VESA Mobiie Display Digital Interface, Proposed Standard, Version 1P, Draft 14, Oct. 29, 2003, pp. 1-75.
VESA Mobile Display Digital Interface. Proposed Standard, Version 1P, Draft 14, Oct. 29, 2003, pp. 76-158.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 15, Nov. 12. 2003, pp. 1-75.
“Transmission and Multiplexing; High Bit Rate Digital Subscriber Line (HDSL) Transmission System on Metallic Local Lines; HDSL Core Specification and Applications for 2 048 Kbit/S Based Access Digital Sections; ETR 152” European Telecommunications Standard, 3rd Ed., Dec. 1996 RTR/TM-06002.
“Transmission and Multiplexing; High Bit Rate Digital Subscriber Line (HDSL) Transmission System on Metallic Local Lines; HDSL Core Specification and Applications for 2 048 Kbit/S Based Access Digital Sections; ETR 152” European Telecommunications Standard.
IEEE STD 1394B;IEEE Standard for High Performance Serial Bus—Amendment 2(Dec. 2002).
VESA Mobile Digital Interface, Proposed Standard, Version 1P, Draft 15, Nov. 12, 2003, pp. 76-160.
Liptak, “Instrument Engineer's Handbook, Third Edition, vol. Three: Process Software and Digital Networks, Section 4.17, Proprietary Networks, pp. 627-637, Boca Raton” CRC Press, Jun. 26, 2002.
VESA Mobile Display Digital Interface, Proposed Standard: Version 1P, Draft 15, Nov. 12, 2003, pp. 76-160.
Video Electronics Standards Association (VESA) “Mobile Display Digital Interface Standard (MDDI),” Jul. 2004.
VESA Mobile Display Digital Interface, Proposed Standard, Version 1P, Draft 15, Nov. 12, 2003, pp. 76-160.
Plug and Display Standard, Video Electronics Standards Association (VESA) San Jose, CA (Jun. 11, 1997).
Video Electronics Standards Association (VESA), “Mobile Display Digital Interface Standard (MDDI)”, Jul. 2004.
Search Report, dated Nov. 8, 2006, for international Application No. PCT/US05/42415, 8 pages.
European Search Report—EP05852048, Search Authority—The Hague Patent Office, Nov. 11-18, 2010.
Hopkins, K. et al.: “Display Power Management,” IP.com Journal; IP.com Inc., West Henrietta, NY (Mar. 1, 1995), XP013103130, ISSN: 1533-0001, vol. 38 No. 3 pp. 425-427.
Masnick, B. et al.: “On Linear Unequal Error Protection Codes,” IEEE Transactions on Information Theory, vol. IT-3, No. 4, (Oct. 1, 1967), pp. 600-607.
STMicroelectronics: “STV0974 Mobile Imaging DSP Rev.3”, Datasheet internet Nov. 30, 2004, XP002619368, Retrieved from the Internet: URL:http://pdf1.alldatasheet.comIdatasheet-pdf/view/112376/Stmicroelectronics/STV0974.html [retrieved on Jan. 27, 2011].
Supplementary European Search Report—EP05849651, Search Authority—The Hague Patent Office, Jan. 31, 2011.
“Universal Serial Bus Specification—Revision 2.0: Chapter 9—USB Device Framework,” Universal Serial Bus Specification, Apr. 27, 2000, pp. 239-274, XP002474828.
VESA: VESA Mobile Display Digital Interface Standard: Version 1. Milpitas, CA (Jul. 23, 2004), pp. 87-171.
http://www.3gpp2.org/public—html/specs/C.S0047-0—v1.0—110403.pdf, 3rd Generation Partnership Project 2, Date Apr. 14, 2003, pp. 1-36.
“Nokia 6255”, Retrieved from the Internet: URL: http://nokiamuseum.com/view.php model=6255 [8retrieved on Feb. 4, 2012].
Taiwan Search Report—TW094141289—TIPO—Mar. 29, 2012.
European Search Report—EP12157614—Search Authority—The Hague—Aug. 1, 2012.
Taiwan Search Report—TW093133101—TIPO—Feb. 2, 2012.
Taiwan Search Report—TW094141284—TIPO—Aug. 21, 2012.
International search report and Written Opinion—PCT/US05/042413, International Search Authority—European Patent Office—Aug. 25, 2008.
Related Publications (1)
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20080129749 A1 Jun 2008 US
Divisions (1)
Number Date Country
Parent 11285399 Nov 2005 US
Child 12020415 US