The present invention relates to server technology, particularly to methods for accessing baseboard management controller.
A server providing the Intelligent Platform Management Interface (IPMI) is equipped with a baseboard management controller (BMC) independent of the central processing unit (CPU). The BMC monitors sensors at multiple locations within the server to get a handle of and automatically report the temperature, power stability, and other operational status of the server. Depending on the implementation, the BMC may be connected with the southbridge, Super I/O (an integrated module of input/output controllers), network interface cards, etc. as the processing core of the IPMI. With the BMC catering to so many connections, which in turn are local hubs on the motherboard, access conflict is bound to occur when signals from different parts of the server reach the BMC at around the same time.
In light of the above, the present invention discloses methods for eliminating conflict or interference while accessing a baseboard management controller (BMC).
In one method provided by this disclosure, a BMC of a server sets a first privilege key based on a key setting command. A basic input/output system (BIOS) of the server then sends the BMC a data reading command having the first privilege key. Based on the data reading command, the BMC sends a BIOS setting to the BIOS.
In another method provided by this disclosure, a BMC of a server sets a first privilege key based on a key setting command. A BIOS of the server then sends the BMC a BIOS setting having the first privilege key. The BIOS setting is stored in a non-volatile memory by the BMC.
In short, by prescribing the first privilege key to the BMC, data can be smoothly exchanged between the BIOS and the BMC without interference from other components of the server trying to access the BMC.
The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only and thus are not limitative of the present invention and wherein:
In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawing.
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The operation of the BIOS 10 involves the CPU and a dedicated read-only memory storing the machine code that the CPU first reads according to its program counter when the server 1 is powered on. The CPU is bestowed with the capabilities of the BIOS 10 by executing this machine code. Generally speaking, the BIOS 10 can be seen as a complete and independent function block. The coupling between the BIOS 10 and the BMC 14 may be, but is not limited to, a LPC (Low Pin Count) bus. A backup setting stored in the non-volatile memory 12 is available to the BIOS 10 through the BMC 14 in the present invention.
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Once the first privilege key is set, in step S207 the BIOS 10 sends a data reading command, based on which the BMC 14 reads from the non-volatile memory 12 and sends to the BIOS 10 a BIOS setting in step S209. Please note that the BMC 14 only performs step S209 when the data reading command sent by the BIOS 10 has the first privilege key. In one embodiment, the BIOS 10 stores the received BIOS setting in a complementary metal-oxide-semiconductor (CMOS) memory chip, replacing whatever BIOS setting was previously kept therein. After a restart of the server 1, the BIOS 10 loads the setting from the CMOS memory chip to become operational.
In one embodiment, any access to the BIOS setting includes taking the setting as a bit string and calculating a verification value thereof so as to verify the correctness and authenticity of the bits. The verification value may be a simple checksum or a hash value, such as the outcome of a function of the CRC (cyclic redundancy check) series. The calculation of verification values may be performed by the BIOS 10, the BMC 14, other circuitry on the motherboard, or the remote management console 2.
In step S213, the BIOS 10 instructs the BMC 14 to remove the first privilege key, which is therefore replaced with a second privilege key set by the BMC 14 in step S217. In one embodiment, step S217 is also executed to automatically restore or set the second privilege key when it is determined in step S215 that time is up for the first one. The countdown is useful in excluding the possibility that the first privilege key is permanently set in the BMC 14 when the BIOS 10 encounters a runtime error (e.g. when the server 1 is abnormally shut down) after step S205 and fails to execute step S213, leaving the BMC 14 inaccessible to the remote management console 2 (see
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To summarize, by prescribing the first and second privilege keys to the BMC, a pecking order is established for at least two signal sources. The BMC only handles access from a single source at a given time, avoiding synchronization issues. Only when the same privilege key is set by the BMC and recorded in the data reading or writing command does the BMC access data based on the command. Most importantly, transmission of the BIOS setting between the BIOS and the BMC is devoid of interference from the remote management console.
Number | Date | Country | Kind |
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201310631655.4 | Nov 2013 | CN | national |
This non-provisional application claims priority under 35 U.S.C. §119(a) on Patent Application No. 201310631655.4 filed in People's Republic of China on Nov. 29, 2013, the entire contents of which are hereby incorporated by reference.