| “Symmetric matrix”, from Wikipedia, the free ancyclopedia, one page.* |
| “Symmetrix Matrix”, mathworld.wolfram.com, one page.* |
| Ji et al., “KSim: A Stable and Efficient RKC Simulator for Capturing On-Chip Inductance Effect,” IEEE, Jan. 30-Feb. 2, 2001, pp. 379-384.* |
| Zheng et al., “Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses,” IEEE, Mar. 4-8, 2002, pp. 1-6.* |
| Beattie et al., “Modeling Magnetic Coupling for On-Chip Interconnect,” IEEE, Jun. 18-22, 2001, pp. 335-340.* |
| Dammers et al., “Virtual Screening: A Step Towards A Sparse Partial Inductance Matri,” IEEE, Nov. 7-11, 1999, pp. 445-452.* |
| Chilo et al., “Magnetic Feld and Current Distributions in a System of Superconductor Microsrip Lines,” IEEE, May 1983, pp. 1193-1195.* |
| Mautz et al., “The Inductance Matrix of a Multiconductor Transmission Line in Multiple Magnetic Media,” IEEE, Aug. 1988, pp. 1293-1295.* |
| Beattie et al., “Equipotential Shells for Efficient Inductance Extraction,” IEEE, Jan. 2001, pp. 70-79.* |
| Beattie et al., “Equipotential Shells for Efficient Partial Inductance Extraction,” IEEE, Dec. 6-9, 1998, pp. 11.61-11.6.4.* |
| Beattie et al. Efficient Inductance Extraction via Windowing. 2001 Design Automation and Test in Europe, Munich, Germany, Mar. 13-16, 2001. |
| Beattie et al. “Electromagnetic Parasitic Extraction via a Multipole Method with Hierarchical Refinement,” Proc. ICCAD 1999, Nov. 1999. |
| Beattie et al. “IC Analyses Including Extracted Inductance Models,” 36th DAC, Jun. 1999. |
| Devgan et al. “How to Effectively Capture On-Chip Inductance Effects: Introducing a New Circuit Element K,” ICCAD 2000, Nov. 2000. |
| Nabors et al. “FastCap: A Multipole Accelerated 3-D Capacitance Extraction Program,” IEE Transactions on Computer-Aided Design. vol. 10, No. 11, Nov. 1991, pp. 1447-1459. |
| Nagel et al. “Computer Analysis of Nonlinear Circuits, Excluding Radiation (CANCER),” IEEE Journal of Solid-State Circuits, vol. SC-6, No. 4, Aug. 1971, pp. 166-182. |
| Rosa, Edward B. “The Self and Mutual Inductances of Linear Conductors,” Bul. Nat. Bureau of Standards. vol. 4, No. 2, 1908, pp. 300-343. |
| Ruehli, A.E. “Inductance Calculations in a Complex Integrated Circuit Environment,” IBM J. Res. Develop. vol. 16, No. 5, Sep. 1972, pp. 470-480. |
| Jackson, J. Classical Electrodynamics, 2nd Ed., Sections 6.8-6.10, 1975, pp. 236-245. |
| Golub et al. Matrix Computations, 3rd Ed., Section 10.2, 1996, pp. 520-531. |
| Kamon et al. FastHenry: A Mulitpole Accelerated 3-D Capacitance Extraction Program, IEEE Trans. CAD, vol. 10, No. 11, Nov. 1991, pp. 1750-1758. |
| Press et al. Numerical Recipes in C, 2nd Ed., Chapters 2.7 and 2.10, 1992, pp. 71-102. |
| Ling et al. “Interconnection Modeling,” Circuit Analysis, Simulation and Design. 1987, pp. 220-231. |