MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) STRUCTURE AND DESIGN STRUCTURES

FIELD OF INVENTION

The invention relates to integrated circuits and, more particularly, to Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and usage, and design structures.

BACKGROUND

Integrated circuit switches used in integrated circuits can be formed from solid state structures (e.g., transistors) or passive wires (MEMS). MEMS switches are typically employed because of their almost ideal isolation, which is a critical requirement for wireless radio applications where they are used for mode switching of power amplifiers (PAs) and their low insertion loss (i.e., resistance). MEMS switches can be used in a variety of applications, primarily analog and mixed signal applications. One such example is cellular telephone chips containing a power amplifier (PA) and circuitry tuned for each broadcast mode. Other examples include personal computers or electronic pads with WiFi or other wireless capability. Integrated switches on the chip would connect the PA to the appropriate circuitry so that one PA per mode is not required.

In operation, increased actuation bias of an electrostatically actuated MEMS switch accelerates switch degradation via dielectric charging which, in turn, effectively alters the pull-in voltage. Conventional modes of manufacture which try to reduce the dielectric charging have known yield problems, e.g., decreasing a MEMS gap, can decrease yield performance.

Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.

SUMMARY

In an aspect of the invention, a method comprises applying a first voltage polarity to an actuator of a Micro-Electro-Mechanical System (MEMS) structure to place the MEMS structure in a predetermined state for a first operating condition. The method further comprises applying a second voltage polarity which is opposite from the first voltage polarity to the actuator of the MEMS structure during a subsequent operating condition.

In an aspect of the invention, a method comprises applying a first voltage polarity to a Micro-Electro-Mechanical System (MEMS) structure. The method further comprises applying a second voltage polarity to a MEMS beam during an OFF state or a subsequent actuated state of the MEMS structure. The first voltage polarity is opposite to the second voltage polarity. The first voltage polarity places the MEMS structure in a data transmission mode. The second voltage polarity is applied after conclusion of the data transmission mode. The second voltage polarity eliminates dielectric charging across the MEMS structure.

In another aspect of the invention, a design structure tangibly embodied in a machine readable storage medium for designing, manufacturing, or testing an integrated circuit is provided. The design structure comprises the structures of the present invention. In further embodiments, a hardware description language (HDL) design structure encoded on a machine-readable data storage medium comprises elements that when processed in a computer-aided design system generates a machine-executable representation of the MEMS capacitive switch, which comprises the structures of the present invention. In still further embodiments, a method in a computer-aided design system is provided for generating a functional design model of the MEMS capacitive switch. The method comprises generating a functional representation of the structural elements of the MEMS capacitive switch.

In embodiments, a method in a computer-aided design system for generating a functional design model of a MEMS structure comprises: generating a functional representation of a MEMS beam moveable between an ON state and an OFF state, the MEMS beam comprising a first set of actuators and a capacitor plate within a dielectric material; and generating a functional representation of a second set of actuators and another capacitor plate, which are separated from the first set of actuators and the capacitor plate by an insulator layer. The representations further comprise at least one of the first set of actuators and the second set of actuators being structured and configured to provide a change in polarity of a first voltage in an ON state and a second voltage after the MEMS structure is in a subsequent OFF state.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

The present invention is described in the detailed description which follows, in reference to the noted plurality of drawings by way of non-limiting examples of exemplary embodiments of the present invention.

FIG. 1 shows a Micro-Electro-Mechanical System (MEMS) structure and methods of manufacture in accordance with aspects of the present invention;

FIG. 2 shows a MEMS structure and methods of manufacture in accordance with additional aspects of the present invention;

FIG. 3
a-3c show various flows of operating parameters contemplated by aspects of the present invention, and which can be implemented in the MEMS structures of FIGS. 1 and 2, amongst other MEMS structures;

FIG. 4 shows a plot of ramp down voltage implementing the operating parameters of FIG. 3c, in accordance with aspects of the present invention;

FIG. 5 shows a graph comparing MEMS structures using different operating voltages;

FIG. 6 shows a graph of hold down lifetime of unipolar operation compared to bipolar operation; and

FIG. 7 is a flow diagram of a design process used in semiconductor design, manufacture, and/or test.

DETAILED DESCRIPTION

The invention relates to integrated circuits and, more particularly, to Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures. More specifically, the present invention relates to MEMS capacitive switches, methods of manufacture and usage and related design structures. Advantageously, the present invention significantly reduces or effectively eliminates dielectric charging across the MEMS structure, e.g., MEMS capacitive switch, thereby increasing hold-down lifetime of the MEMS structure. Also, by implementing the operating parameters of the present invention, noise can be eliminated and the MEMS structure, e.g., MEMS capacitive switch, will still benefit from a long term reduction of dielectric charging.

By way of example, the present invention contemplates using bipolar operation of the MEMS capacitive switches. In embodiments, for example, the polarity of the switch can be switched after each use, e.g., after each phone call or other type of data transmission (e.g., voice or data). Alternatively or in addition, a reverse polarity actuation of opposite polarity can be applied to the MEMS capacitive switches for a short period of time after initial actuation is complete. In still further embodiments, a two step actuation approach can be utilized, where a high voltage is applied to actuate the switch, and a lower voltage is applied, after a delay, to operate the switch (maintain hold down).

More specifically, the present invention relates to methods of operating a MEMS capacitive switch during various operating conditions of a device (e.g., cell phone, personal computer, electronic pad, etc.) by applying specific actuation/hold voltages during certain operating conditions of the device (e.g., ON state for first call, OFF state, ON state for second call, etc.). These different operating conditions improve reliability of the MEMS capacitive switch, without adversely affecting the performance of the device. For example, the present invention differs from conventional operating conditions by, for example, applying different actuation/hold voltages after each use (e.g., applying a bipolar actuation/hold voltage during different ON states of the device), amongst other contemplated operating conditions.

FIG. 1 shows a Micro-Electro-Mechanical System (MEMS) structure and methods of manufacture in accordance with aspects of the present invention. Depending on the particular application and engineering criteria, the MEMS structure of the present invention comes in many different forms. For example, the MEMS structure can be realized in the form of a cantilever structure. An alternative MEMS structure is a bridge, which has both ends fixed to the wafer. It should also be understood by those of skill in the art that the MEMS structure of FIG. 1 (and FIG. 2) is an illustrative example of MEMS capacitance bridge switches which can implement the operating parameters of the present invention. Accordingly, other MEMS structure configurations are also contemplated by the present invention.

It should be further understood by those of skill in the art that the MEMS switches and other passive and active components of the present invention can be manufactured in a number of ways using a number of different tools. In general, though, the methodologies and tools are adopted from integrated circuit (IC) technology to form small structures with dimensions in the micrometer scale with switch dimensions of approximately 5 microns thick, 50 microns wide, and 200 microns long. For example, the structures of the present invention, e.g., MEMS beam, plates, actuators, etc., are built on wafers and are realized in films of materials patterned by photolithographic processes. In particular, the fabrication of the structures uses three basic building blocks: (i) deposition of films of material on a substrate, (ii) applying a patterned mask on top of the films by photolithographic imaging, and (iii) etching the films selectively to the mask.

More specifically, as shown in FIG. 1, the MEMS structure 10 of the present invention includes a substrate 12. In embodiments, the substrate 12 can be any layer of a device, composed of an oxide or other insulator material known to those of skill in the art. As should be understood by those of skill in the art, the substrate 12 can be implemented in either an SOI wafer or BULK implementation, or could be an insulating substrate such as sapphire or silica glass. The constituent materials of the SOI wafer or BULK implementation may be selected based on the desired end use application of the semiconductor device. For example, the insulation layer, e.g., BOX, may be composed of oxide, such as SiO₂. Moreover, the active semiconductor layer can be comprised of various semiconductor materials, such as, for example, Si, SiGe, SiC, SiGeC, etc. The SOI wafer may be fabricated by conventional processes including, but not limited to, oxygen implantation (e.g., SIMOX), wafer bonding, etc.

Still referring to FIG. 1, an interconnect 13 is provided within the substrate 12. The interconnect 13 can be, for example, a tungsten or copper stud formed in a conventionally formed via. For example, the interconnect 13 can be foamed using any conventional lithographic, etching and deposition processes, known to those of skill in the art for forming studs. A wiring layer is formed on the substrate 12 to foam multiple wires, e.g., actuators 16a (fixed electrodes) and a plate structure 16b (for a capacitor switch). An insulator material 14 is formed on the actuators 16a and plate structure 16b and exposed portions of the substrate 12. The insulator material 14 can be, for example, an oxide material (e.g., S_iO₂), which is subjected to a chemical mechanical polishing (CMP) to expose a surface of the actuators 16a and plate structure 16b.

In embodiments, the actuators 16a and a plate structure 16b can be fabricated from a metal or metal alloy using known CMOS fabrication processes (e.g., using an additive or subtractive metal process). In embodiments, the metal or metal alloy can be deposited using conventional deposition processes such as, for example, atomic layer deposition (ALD), metal sputtering, or a chemical vapor deposition (CVD), amongst other deposition methods. For example, a wiring layer can be deposited on the substrate 12 to a depth of about 0.25 microns; although other dimensions are contemplated by the present invention. Thereafter, the wiring layer is patterned to form the actuators 16a (fixed electrodes) and plate structure 16b. The patterning can be performed using conventional lithography and etching processes, known to those of skill in the art. At least one of the actuators 16a is fabricated in contact (direct electrical contact) with the interconnect 13.

In embodiments, the actuators (fixed electrodes) 16a and plate structure 16b can be formed from aluminum; although other wiring materials are also contemplated by the present invention. For example, the actuators 16a and plate structure 16b can be a refractory metal such as Ti, TiN, TaN, Ta, and W, or AlCu, AlCuSi, or Cu, CuMn, amongst other wiring materials. In embodiments, the actuators 16a and plate structure 16b could be cladded with Ti and capped with an antireflective layer TiN, e.g., Ti/Al/Ti/TiN; or cladded in Ta or TaN. The insulator material 14 is formed on the actuators 16a and plate structure 16b and exposed portions of the substrate 12 using conventional deposition processes, e.g., chemical vapor deposition (CVD) or plasma enhanced CVD (PECVD).

A MEMS beam 18 can be fabricated using conventional lithography, deposition and etching processes. In embodiments to fabricate the MEMS beam 18, for example, a sacrificial material (e.g., silicon or other selective material) is formed on the exposed portions of the insulator material 14, actuators 16a and plate structure 16b. In embodiments, an insulator material 20a is deposited on the sacrificial material using conventional deposition processes, e.g., CVD.

The insulator material 20a can be any insulator material such as oxide based materials, which will form a MEMS capacitor dielectric. Also, it should be understood by those of skill in the art that the insulator layer 20a will prevent shorting of the actuators (fixed electrodes) 16a and actuators (suspended electrodes) 22a, when the switch is activated. Also, as described herein, any combination of the actuators (fixed electrodes) 16a and actuators (suspended electrodes) 22a are structured and configured to provide a change in polarity of a first voltage in an ON state and a second voltage after the MEMS structure is in a subsequent OFF state.

Similar to the actuators 16a and plate structure 16b, actuators (suspended electrodes) 22a and an upper plate structure 22b can be formed on the insulator material 20a. The actuators 22a and an upper plate structure 22b can be made from the same or similar materials as the actuators 16a and plate structure 16b using similar or same lithography, deposition and etching processes as described herein. In alternate embodiments, the actuators 22a and upper plate structure 22b (and/or actuators 16a and plate structure 16b) can be TiN, TiN or W, Ru, Pt, Ir, amongst other materials.

The thicknesses of this and other electrodes and/or wires can vary depending on the specific design parameters. For example, Ti/AlCu/Ti/TiN layers could be used with 10 nm, 5000 nm, 10 nm, and 32 nm thickness, respectively, which would foam TiAl₃under and over the AlCu after 400° C. annealing. Alternatively, the actuators 22a and upper plate structure 22b (and/or actuators 16a and plate structure 16b) could be formed from a noble metal, such as Au; or a refractory metal, such as W or Ta; or without a Ti—AlCu interface, e.g., Ti/TiN/AlCu/TiN. Alternatively, the conductors in the beam 18 could be formed with two or more wiring levels, connected by vias as is known in the art.

In any of the embodiments, an insulator layer 20b can then be formed over the actuators 22a and an upper plate structure 22b. In optional embodiments, the insulator layer 20b can embed the actuators 22a and upper plate structure 22b therein, or alternatively, can undergo a CMP process to expose surfaces of the actuators 22a and upper plate structure 22b. In embodiments, the insulator layer 20b can undergo a planarization process prior to the deposition of another sacrificial material on its surface.

After formation of another sacrificial material on the insulator layer 20b, an insulator (oxide) material 24 can be deposited on the sacrificial material to form a lid. In embodiments, the insulator material 24 can be deposited to a thickness of about 5 μm or more, and can be deposited using any conventional CVD process. The insulator material 24 can be planarized, partially planarized or left unplanarized. In embodiments, a vent hole 26 is patterned and opened in the lid 24, exposing a portion of the underlying sacrificial material. The sacrificial layers are vented or stripped by way of the vent hole(s) 26 to form an upper cavity 28a and lower cavity 28b about the MEMS beam 18. In embodiments, the structure, and in particular, the exposed underlying sacrificial material can be cleaned with an HF solution prior to venting to remove the native oxide. In embodiments, the stripping (e.g., venting) can be performed using a XeF₂etchant chemistry through the vent hole(s) 26. The vent hole 26 can be sealed with a material 30, such as a dielectric or metal.

FIG. 2 shows a MEMS structure and methods of manufacture in accordance with additional aspects of the present invention. In particular, in the embodiment shown in FIG. 2, the structure 10′ includes a dielectric material 14a over the actuators 16a and plate structure 16b (for a capacitor switch). As should be understood by those of skill in the art, the dielectric material 14a can be a MEMS capacitor dielectric. Also, as should further be understood by those of skill in the art, the dielectric material 14a can be formed on any combination of the MEMS beam 18 or the insulator material 14. For example, dielectric material 14a can be provided only on the plate structure 16b; whereas, the insulator layer 20a (shown in FIG. 1) can be provided on the actuators 22a (or vice versa). Also, it should be understood by those of skill in the art that the insulator layer 20a or the dielectric material 14a can prevent shorting between the actuators 16a and 22a.

FIGS. 3
a-3c show various flows of operating parameters contemplated by aspects of the present invention, and which can be implemented in the MEMS structures of FIGS. 1 and 2, amongst other MEMS structures. In embodiments, the logic of the MEMS structures or any circuitry of the chip can be programmed to meet these operating parameters, e.g., by applying different actuation voltages as described in any of FIGS. 3a-3c. This can be accomplished by sensing or determining the polarity of the actuation voltage during use, and applying different actuation voltages using any of the operating schemes of the present invention. The operating parameters of the present invention can be implemented in software and/or hardware as would be understood by those of skill in the art such that no further explanation is required. In embodiments, timers known to those of skill in the art can also be implemented during implementation of the operating parameters, as should be understood by those of skill in the art.

More specifically, the present invention provides an event based reversal of the polarity of the actuation voltage of electrostatically actuated MEMS switches. For example, the present invention can reverse actuator polarity between phone calls, data transmissions, or other communications, e.g., between different states or operating conditions, e.g., voice, calls, data transmission etc., any of which can be used interchangeably herein. In this way, it is possible to reverse actuator polarity before or after active (or unplanned) communication between two devices. For example, reversal of the actuator polarity is possible before or after active communication, not predetermined by a protocol between two devices, e.g., handshaking and other regularly occurring exchanges of information used for things like broadcasting an SSID or cellular handover in mobile phone networks.

Referring to FIGS. 3a-3c, in operation of either the MEMS structures of FIG. 1 or FIG. 2, a voltage is applied to one or more of the actuators 16a and 22a to pull-down the MEMS beam 18. The voltage required to pull the MEMS beam 18 (e.g., suspended electrodes 22a) to the fixed electrode (e.g., actuators 16a) by electrostatic force is called pull-in voltage, which is dependent on several parameters including the length of the MEMS beam 18, spacing or gap between the suspended electrodes 22a and fixed electrodes 16a, and spring constant of the MEMS beam 18, which is a function of the materials and their thickness. In any scenario, dielectric charging begins once an electrical potential, i.e., pull-in voltage, is placed across the MEMS actuators 16a, 20a. That is, application of a voltage will result in (i) dielectric charging of the dielectric layer 20a under the fixed electrodes 16a (FIG. 1) and/or (ii) dielectric charging of the dielectric layer 14a over the fixed electrodes 16a (FIG. 2). This dielectric charging will effectively alter the pull-in voltage and, in turn, result in a degradation of the MEMS capacitive switch. In fact, dielectric charging can result in actuation failure.

To significantly increase the pull-down lifetime of the MEMS structures of FIG. 1 and FIG. 2 (or any combination thereof), the present invention contemplates different operating conditions, e.g., pull-down voltage schemes, which significantly reduce or effectively eliminate dielectric charging of the dielectric materials. By way of brief explanation, in the case the MEMS structure of FIG. 1 and FIG. 2 is used for impedance matching of a cellular telephone antenna, it is possible to reap the benefits of bipolar operation while avoiding the noisy side effects by maintaining a single polarity during operation and then reversing it for each consecutive use; that is, each phone call (or other data transmission) will use the opposite polarity of a preceding or subsequent call.

More specifically, in a first mode of operation, the present invention contemplates a bipolar switching scheme, which eliminates a long period of unipolar DC electric fields across the MEMS dielectric. For example, in a telephone application, the voltage is switched from a first polarity (positive) to a second polarity (negative) or vice versa, after each call, data transmission, hand shake, etc. More specifically, referring to FIG. 3a, the present invention contemplates a method for operating a MEMS capacitive switch which comprises: (i) applying an actuation (and hold) voltage having a first polarity (positive) during an entire time period of a first operating condition of a device (ON state for a first phone call or data transfer) (step 300a); and, (ii) after the first operating condition has completed (e.g., after an OFF state), applying an actuation (and hold) voltage having a second polarity (negative) opposite to the first polarity during an entire time period of a second operating condition of the device (e.g., ON state for a second phone call or data transfer) (step 305a). In this way, the use of different polarities will effectively balance unipolar operation.

By way of implementing the operating parameters of FIG. 3a, for example, the MEMS beam actuator plate (actuator 22a) can be biased positively vs. the reference bottom actuator plate (actuator plate 16a). In embodiments, the polarity can be reversed by either: (i) biasing the MEMS beam actuator plate (actuator 22a) negatively vs. the reference bottom actuator plate (actuator plate 16a), e.g., +40 vs. 0 V becomes −40 vs. 0 V, or (ii) switching the potentials between the two terminals (e.g. +40 vs. 0 V becomes 0 vs. +40 V). It is also noted that if both terminals are defined as relative to a third reference, it is possible to repeat (i) by using a third method (iii), with +20 vs. −20 V becoming −20 vs. +20 V, as an example. Also, in embodiments, the first method (i) may require shifting one terminal by twice its potential in the opposite direction; whereas, the second method (ii), may require rerouting the voltage paths between the terminals, exchanging one source for the other. The third method (iii) may require shifting both terminals by twice their potentials in opposite directions.

As an additional approach to significantly increase the pull-down lifetime of the MEMS structures of FIG. 1 and FIG. 2 (or any combination thereof), the present invention contemplates applying a first actuation voltage of a first polarity (positive) during an entire time period of a first operating condition of a device and, after the first operating condition has completed, applying a second actuation voltage having a second polarity (negative) for at least an amount of time to substantially discharge the MEMS capacitor. More specifically, referring to FIG. 3b, the present invention contemplates a method for operating a MEMS capacitive switch which comprises: (i) applying an actuation (and hold) voltage having a first polarity (positive) during an entire time period of a first operating condition of a device (ON state for a first phone call or data transfer) (step 300b); (ii) after the first operating condition has completed, applying an actuation (and hold) voltage having a second polarity (negative) opposite to the first polarity for at least an amount of time to substantially discharge the MEMS capacitor during a second operating condition of the device (OFF state) (step 305b); and, after the second operating condition has completed (OFF state), applying an actuation (and hold) voltage having the first polarity (positive) during an entire time period of a third operating condition of the device (e.g., ON state for a second phone call or data transfer) (step 310b). These steps can be repeated.

As an additional approach to significantly increase the pull-down lifetime of the MEMS structures of FIG. 1 and FIG. 2 (or any combination thereof), the present invention contemplates applying a first actuation voltage to actuate the MEMS structure and a lower operating voltage to maintain an ON state of the device. That is, once pull-in voltage has been achieved, relaxation of the actuation voltage can be provided without releasing the MEMS beam 18 from the closed position. This decrease in voltage will, in turn, decrease the rate of dielectric charging. That is, once the MEMS beam 18 has actuated, the voltage across the actuators can decrease enough to increase the lifetime of the switch, but not so far as to release the MEMS beam 18 from contact with the floor of the cavity, e.g., actuator 16a.

More specifically, referring to FIG. 3c, the present invention contemplates a method for operating a MEMS capacitive switch which comprises: (i) applying an actuation voltage across the MEMS switch, e.g., actuation voltage of 40V (step 300c), and (ii) after a predetermined amount of time, e.g., about 2× switching time, during operation of the MEMS capacitive switch, applying a lower hold down voltage across the MEMS switch, e.g., hold voltage (V_hold) of 25V (step 305c). In embodiments, the switching time can be about 20 μs such that the predetermined time period can be about 40 μs to 50 μs. Advantageously, this operating method does not produce rf noise, and does not require additional structures or changes to the device design.

FIG. 4 shows a plot of capacitance while the potential across the actuators ramps from 0 to +50 to −50 to 0 V, implementing the operating parameters of FIG. 3c in accordance with aspects of the present invention. In the plot of FIG. 4, the Y-axis is in units of picofarads (pF) and the X-axis is in voltages. In this example, it is shown that it is possible to ramp down the voltage to hold down the MEMS beam 18, as described in FIG. 3c. For example, it is possible to ramp down the voltage to about 25V, while still maintaining the MEMS beam 18 in a lowered position, e.g., ON state. Thus, it is possible to reduce the electrostatic field across the actuators once the actuators have been actuated, e.g., during operation, thereby reducing the dielectric charging.

FIG. 5 shows a graph comparing the cycling of MEMS structures using different operating voltages. The actuation voltage for a MEMS is defined as the voltage used to cause the MEMS beam to pull-in and be in a high capacitance state. MEMS cycling comprises applying 0V, actuation voltage, 0V, actuation voltage, etc. such that the actuation voltage is applied for sufficient time for the MEMS beam to actuate. In one example, the actuation voltage is applied for about 40 micro seconds. Cycling lifetime is defined as the number of cycles required to change the delta capacitance, 0V capacitance, or actuation voltage capacitance by a fixed amount or percentage, such as 5%.

More specifically, FIG. 5 shows an increase of cycle lifetime with use of a lower pull-down voltage. For example, line “A” represents an operating voltage of 35V; whereas, line “B” represents an operating voltage of 40V. As thus shown, by applying a smaller voltage, pull-down lifetime can increase by a factor of 1.5× cycles or more. Accordingly, this shows that operating parameters of the MEMS capacitive switch of FIG. 3c, for example, can increase switch lifetime, by applying a lower voltage.

FIG. 6 shows a graph of hold down lifetime of unipolar operation compared to a bipolar operation. More specifically, FIG. 6 shows a cumulative failure rate of a unipolar (U) operation compared to a bipolar (B) operation. As shown, a bipolar operation significantly decreases fail rates over cycle times. This graph can be applicable to the operations shown in FIGS. 3a and 3b, for example.

FIG. 7 is a flow diagram of a design process used in semiconductor design, manufacture, and/or test. FIG. 7 shows a block diagram of an exemplary design flow 900 used for example, in semiconductor IC logic design, simulation, test, layout, and manufacture. Design flow 900 includes processes, machines and/or mechanisms for processing design structures or devices to generate logically or otherwise functionally equivalent representations of the design structures and/or devices described above and shown in FIGS. 1 and 2. The design structures processed and/or generated by design flow 900 may be encoded on machine-readable transmission or storage media to include data and/or instructions that when executed or otherwise processed on a data processing system generate a logically, structurally, mechanically, or otherwise functionally equivalent representation of hardware components, circuits, devices, or systems. Thus, the design structures can be provided in a computer program product comprising a computer readable storage medium having stored/encoded thereon. Machines include, but are not limited to, any machine used in an IC design process, such as designing, manufacturing, or simulating a circuit, component, device, or system. For example, machines may include: lithography machines, machines and/or equipment for generating masks (e.g. e-beam writers), computers or equipment for simulating design structures, any apparatus used in the manufacturing or test process, or any machines for programming functionally equivalent representations of the design structures into any medium (e.g. a machine for programming a programmable gate array).

Design flow 900 may vary depending on the type of representation being designed. For example, a design flow 900 for building an application specific IC (ASIC) may differ from a design flow 900 for designing a standard component or from a design flow 900 for instantiating the design into a programmable array, for example a programmable gate array (PGA) or a field programmable gate array (FPGA) offered by Altera® Inc. or Xilinx® Inc.

FIG. 7 illustrates multiple such design structures including an input design structure 920 that is preferably processed by a design process 910. Design structure 920 may be a logical simulation design structure generated and processed by design process 910 to produce a logically equivalent functional representation of a hardware device. Design structure 920 may also or alternatively comprise data and/or program instructions that when processed by design process 910, generate a functional representation of the physical structure of a hardware device. Whether representing functional and/or structural design features, design structure 920 may be generated using electronic computer-aided design (ECAD) such as implemented by a core developer/designer. When encoded on a machine-readable data transmission, gate array, or storage medium, design structure 920 may be accessed and processed by one or more hardware and/or software modules within design process 910 to simulate or otherwise functionally represent an electronic component, circuit, electronic or logic module, apparatus, device, or system such as those shown in FIGS. 1 and 2. As such, design structure 920 may comprise files or other data structures including human and/or machine-readable source code, compiled structures, and computer-executable code structures that when processed by a design or simulation data processing system, functionally simulate or otherwise represent circuits or other levels of hardware logic design. Such data structures may include hardware-description language (HDL) design entities or other data structures conforming to and/or compatible with lower-level HDL design languages such as Verilog and VHDL, and/or higher level design languages such as C or C++.

Design process 910 preferably employs and incorporates hardware and/or software modules for synthesizing, translating, or otherwise processing a design/simulation functional equivalent of the components, circuits, devices, or logic structures shown in FIGS. 1 and 2 to generate a netlist 980 which may contain design structures such as design structure 920. Netlist 980 may comprise, for example, compiled or otherwise processed data structures representing a list of wires, discrete components, logic gates, control circuits, I/O devices, models, etc. that describes the connections to other elements and circuits in an integrated circuit design. Netlist 980 may be synthesized using an iterative process in which netlist 980 is resynthesized one or more times depending on design specifications and parameters for the device. As with other design structure types described herein, netlist 980 may be recorded on a machine-readable data storage medium or programmed into a programmable gate array. The medium may be a non-volatile storage medium such as a magnetic or optical disk drive, a programmable gate array, a compact flash, or other flash memory. Additionally, or in the alternative, the medium may be a system or cache memory, buffer space, or electrically or optically conductive devices and materials on which data packets may be transmitted and intermediately stored via the Internet, or other networking suitable means.

Design process 910 may include hardware and software modules for processing a variety of input data structure types including netlist 980. Such data structure types may reside, for example, within library elements 930 and include a set of commonly used elements, circuits, and devices, including models, layouts, and symbolic representations, for a given manufacturing technology (e.g., different technology nodes, 32 nm, 45 nm, 90 nm, etc.). The data structure types may further include design specifications 940, characterization data 950, verification data 960, design rules 970, and test data files 985 which may include input test patterns, output test results, and other testing information. Design process 910 may further include, for example, standard mechanical design processes such as stress analysis, thermal analysis, mechanical event simulation, process simulation for operations such as casting, molding, and die press forming, etc. One of ordinary skill in the art of mechanical design can appreciate the extent of possible mechanical design tools and applications used in design process 910 without deviating from the scope and spirit of the invention. Design process 910 may also include modules for performing standard circuit design processes such as timing analysis, verification, design rule checking, place and route operations, etc.

Design process 910 employs and incorporates logic and physical design tools such as HDL compilers and simulation model build tools to process design structure 920 together with some or all of the depicted supporting data structures along with any additional mechanical design or data (if applicable), to generate a second design structure 990.

Design structure 990 resides on a storage medium or programmable gate array in a data format used for the exchange of data of mechanical devices and structures (e.g. information stored in a IGES, DXF, Parasolid XT, JT, DRG, or any other suitable format for storing or rendering such mechanical design structures). Similar to design structure 920, design structure 990 preferably comprises one or more files, data structures, or other computer-encoded data or instructions that reside on transmission or data storage media and that when processed by an ECAD system generate a logically or otherwise functionally equivalent form of one or more of the embodiments of the invention shown in FIGS. 1 and 2. In one embodiment, design structure 990 may comprise a compiled, executable HDL simulation model that functionally simulates the devices shown in FIGS. 1 and 2.

Design structure 990 may also employ a data format used for the exchange of layout data of integrated circuits and/or symbolic data format (e.g. information stored in a GDSII (GDS2), GL1, OASIS, map files, or any other suitable format for storing such design data structures). Design structure 990 may comprise information such as, for example, symbolic data, map files, test data files, design content files, manufacturing data, layout parameters, wires, levels of metal, vias, shapes, data for routing through the manufacturing line, and any other data required by a manufacturer or other designer/developer to produce a device or structure as described above and shown in FIGS. 1 and 2. Design structure 990 may then proceed to a stage 995 where, for example, design structure 990: proceeds to tape-out, is released to manufacturing, is released to a mask house, is sent to another design house, is sent back to the customer, etc.

The method as described above is used in the fabrication of integrated circuit chips. The resulting integrated circuit chips can be distributed by the fabricator in raw wafer form (that is, as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case the chip is mounted in a single chip package (such as a plastic carrier, with leads that are affixed to a motherboard or other higher level carrier) or in a multichip package (such as a ceramic carrier that has either or both surface interconnections or buried interconnections). In any case the chip is then integrated with other chips, discrete circuit elements, and/or other signal processing devices as part of either (a) an intermediate product, such as a motherboard, or (b) an end product. The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input device, and a central processor.

The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) STRUCTURE AND DESIGN STRUCTURES

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