Patent Application
20080079778
Further advantages of exemplary embodiments disclosed herein may become apparent by reference to the detailed description of the embodiments when considered in conjunction with the drawings, which are not to scale, wherein like reference characters designate like or similar elements throughout the several drawings as follows:
As described in more detail below, the exemplary embodiments disclosed herein relate to non-conventional substrates for providing micro-fluid ejection heads. Such non-conventional substrates, unlike conventional silicon substrates, may be provided in large format shapes to provide large arrays of fluid ejection actuators on a single substrate. Such large format shapes are particularly suited to providing page wide printers and other large format fluid ejection devices.
With reference to
In a manner well known in the art, thermal fluid ejection actuators 15, such as heater resistors are formed from a heater resistor layer 17 adjacent to the second glass layer 16 in an actuator region 18 of the substrate 12. Upon activation of the thermal fluid ejection actuators 15 in the actuator region 1, fluid supplied through fluid paths in an associated fluid reservoir body and corresponding fluid flow slots in the substrate 12 is caused to be ejected toward a media through nozzles 19 in a nozzle plate 20 associated with the substrate 12. Each fluid supply slot may be machined or etched in the substrate 12 by conventional techniques such as deep reactive ion etching, chemical etching, sand blasting, laser drilling, sawing, and the like, to provide fluid flow communication from the fluid source to the device surface of the substrate 12. The plurality of fluid ejection actuators 15 are conventionally provided adjacent to one or both sides of the fluid supply slots.
The base material used to provide the non-conventional substrate 12 is desirably a low-cost material such as metal, plastic materials, and alumina or other ceramic material, such as low temperature co-fired ceramic (LTCC), or glass. An exemplary relatively low-cost material is 96% alumina. In the case of very low conductivity substrate materials such as glass and LTCC, the substrate 12 may be modified to include a thermal bus provided as by a trench filled with a thermally conductive material, such as silver, to dissipate heat associated with the operation of the ejection actuators and improve the overall thermal conductivity of the substrate 12 as compared to a corresponding substrate devoid of the thermal bus. The thus modified substrate may then be processed to include a first glass layer 14 and a second glass layer 16. In an exemplary embodiment alumina and other substrate materials having a thermal conductivity of at least about 30 W/m-° C. need not be modified to include the thermal bus prior to processing to include the glass layers 14 and 16.
Turning now to
With reference to
In a next step 32, the substrate 12 is substantially flattened. Flattening may be accomplished by, for example, grinding or lapping to substantially remove the camber. This process, if performed at material removal rates that are conducive to low cost manufacturing (high removal rates), may result in grain tear-out on the surface and actually roughen the surface. For example, in the case of 96% alumina, the flattened surface has been observed to be rougher than the pre-flattened roughness (SR2) of about 1.0 to about 3 μm.
In a next step 34, a glaze material may be applied to provide the first glass layer 14. The glaze material may be made up primarily of silicon glass (SiO2) and applied using conventional techniques. The glaze material may be applied at a thickness (T1) of at least about 40 μm to provide a reduced surface roughness (SR3) of no more than about 300 Å Ry. An exemplary glaze material may include a silicon glass glaze available from Kyocera America, Inc. under the tradename GS-5.
In step 36, the thus applied first glass layer 14 may be thinned down to a thickness (T2), such as by standard polishing processes to render a resulting structure suitable for higher frequency applications. For example, it has been observed that while a thickness (T2) of about 40 μm may be suitable for low firing frequency applications, it may be desireable to thin the first glass layer 14 to a thickness of about 10 μm for higher firing frequency applications. The surface roughness (SR4) after thinning may be about 300 Å Ry.
Meanwhile in step 38, the second glass layer 16 may be applied (a thermal actuator structure may thereafter be deposited in the manufacture of the micro-fluid ejection head 10). For example, a layer of glass, such as boro-phospho-silicate glass (BPSG), may be applied by chemical vapor depositing (CVD), or spin-on-glass (SOG) or phosphorus doped spin-on-glass (PSOG) may be applied at a thickness of from about 1 to about 3 μm, most desirably, in some cases, from about 1.5 to about 2 μm. If the surface is too rough e.g., above about 75 Å Ry, the layer may be reflowed, such as at a temperature of about 800° C. (for BPSG), to produce a surface finish within the desired roughness (SR5) (e.g., of no more than about 75 Å Ry).
With reference to
In a first step 40, the substrate 12 is provided as by a conventional forming/firing process. It has been observed that the substrate 12 yielded, in the case of a 96% alumina material, typically has a surface roughness (SR1) of about 50 μin (1.3 μm) RMS, and a camber (bow) (C) of about 500 μm over a length of about five inches.
In a next step 42, the substrate is substantially flattened. Flattening may be accomplished by, for example, grinding or lapping to substantially remove the camber. This process, if performed at material removal rates that are conducive to low cost manufacturing (high removal rates), may result in grain tear-out on the surface and actually roughen the surface. For example, in the case of 96% alumina, the flattened surface has been observed to be rougher than the pre-flattened roughness (SR2) of about 1.0 to about 3 μm. As will be observed, the steps 40 and 42 may correspond to the process steps 30 and 32 previously described in connection with
In step 44, and deviating from the prior described process, the substrate may be polished to a surface roughness (SR6) of about 0.5 μm Ry, such as by using common polishing methods.
In multistage step 46, the first and second glass layers 14 and 16, which may be boro-phospho-silicate glass layers in an exemplary embodiment, are applied. The application process for the layers 14 and 16 may be accomplished by, for example, applying a low-boron BPSG layer at a thickness at least as thick as the peak roughness to provide the first glass layer 14. If desired, a reflow step can occur prior to the application of the second glass layer 16 described below. For low boron content, an exemplary reflow temperature may be about 1000° C.
Next, a high-boron BPSG layer may be applied to a combined thickness (T3) of about 1.0 to about 3.0 μm to provide the second glass layer 16. The second glass layer 16 may be reflowed at an exemplary temperature of about 800° C. (for high boron formulations) to produce a surface finish within the 75 Å Ry specification. An exemplary reflow method might include the rapid thermal pulse method, described in U.S. Pat. No. 6,261,975, incorporated herein by reference in its entirety. In an exemplary embodiment, the purpose of the two step “low boron/high boron” process is to reduce cycle time, as deposition rates are about twice as high for low boron than high. It has been observed that a reflowed surface roughness (SR7) of 75 Å Ry is common for a reflowed BPSG.
Manufacture of non-conventional substrates according to the embodiments disclosed is believed to yield substrates having suitable thermal conductivity and smoothness properties to achieve predictable and consistent fluid bubble so as to be suitable for providing micro-fluid ejection heads. In accordance with further exemplary embodiments, logic elements and passive devices (e.g., heaters/resistors/wiring) may be created on separate substrates that are interconnected/wired/packaged together to provide a microfluid ejection device, such as an inkjet printhead. Advantageously, this may allow for a more efficient use of expensive semiconductor real estate. For example, passive devices and/or areas which will be etched/grit blasted away (e.g., ink vias) may not be formed on semiconductor substrates. In a further exemplary embodiment, logic functions could be separated into many smaller chips, which may be manufactured more efficiently at higher yields. Meanwhile, the passive devices (e.g., heaters) may be formed on the same monolithic substrate, which may be important for relative positioning and/or coplanarity reasons.
It is contemplated, and will be apparent to those skilled in the art from the preceding description and the accompanying drawings that modifications and/or changes may be made in the embodiments disclosed herein. Accordingly, it is expressly intended that the foregoing description and the accompanying drawings are illustrative of exemplary embodiments only, not limiting thereto, and that the true spirit and scope of the present invention(s) be determined by reference to the appended claims.
