Patent Application
20250125316
The present disclosure generally relates to micro display technology, and more particularly, to a micro light emitting diode (LED) display panel.
Inorganic micro pixel light emitting diodes, also referred to as micro light emitting diodes, micro LEDs, or μ-LEDs, become more important since they are used in various applications including self-emissive micro-displays, visible light communications, and optogenetics. The micro LEDs have higher output performance than conventional LEDs because of better strain relaxation, improved light extraction efficiency, and uniform current spreading. Compared with conventional LEDs, the micro LEDs also exhibit several advantages, such as improved thermal effects, faster response rate, larger working temperature range, higher resolution, wider color gamut, higher contrast, lower power consumption, and operability at higher current density.
A micro LED display panel is manufactured by integrating an array of thousands or even millions of micro LEDs with an integrated circuit (IC) back panel. Each pixel of the micro LED display panel is formed by one or more micro LEDs. The micro LED display panel can be a mono-color or multi-color panel. In particular, for a multi-color LED panel, each pixel may further include multiple sub-pixels formed by multiple micro LEDs, each of which corresponds to a different color. For example, three micro LEDs respectively corresponding to red, green, and blue colors may be superimposed to form one pixel. The different colors can be mixed to produce a broad array of colors.
Generally, to improve light emission efficiency, a metal reflective layer is provided to reflect light upwards. The metal reflective layer is usually made of Ag, Al, etc., and coated with one or more of Cr, Ni, Pt, Ti, or Au.
Embodiments of the present disclosure provide a micro LED display panel. The micro LED display panel includes a mesa array including a plurality of mesa structures; a top transparent conductive layer formed on a top surface of the mesa array; a reflective isolation layer filled in a space between the adjacent mesa structures, a bottom of the reflective isolation layer being lower than a bottom of the mesa structure; and an integrated circuit (IC) backplane formed at a bottom of the reflective isolation layer.
Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying figures. Various features shown in the figures are not drawn to scale.
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the invention. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the invention as recited in the appended claims. Particular aspects of the present disclosure are described in greater detail below. The terms and definitions provided herein control, if in conflict with terms and/or definitions incorporated by reference.
As shown in
Micro LED display panel 100 further includes a group of bottom connecting structures 150. One bottom connecting structure 150 corresponds to one mesa structure 110. Bottom connecting structure 150 is provided at a bottom of mesa structure 110 and configured to bond mesa structure 110 with IC backplane 140. With the group of bottom connecting structures 150, each mesa structure 110 can be controlled independently.
In some embodiments, reflective isolation layer 130 comprises a dielectric distributed Bragg reflection (DBR) structure.
In some embodiments, a thickness of one first layer 210 or a thickness of one second layer 220 can be adjusted according to a wavelength of light emitted by micro LED display panel 100. For example, the thickness of one first layer 210 or the thickness of one second layer 220 is λ/4, wherein λ represents a wavelength of light emitted by micro LED display panel 100. A total thickness of DBR structure 200, e.g., a thickness of reflection isolation layer 130 is in a range of 0.3 μm to 5 μm. By adjusting a thickness of DBR structure 200 according to the wavelength of light emitted by micro LED display panel 100, a reflectivity of DBR structure 200 is increased, for example, more than 99%, thereby improving the light emitting efficiency.
In some embodiments, top transparent conductive layer 120 is selected from one of TCO (transparent conductive oxide) layers, for example, an ITO (Indium Tin Oxide) layer, an AZO (Antimony doped Zinc Oxide) layer, an ATO (Antimony doped Tin Oxide) layer, an FTO (Fluorine doped Tin Oxide) layer, and the like.
In some embodiments, bottom connecting structure 150 is a metal via. A material of the metal via is TiCu or Cu. Bottom connecting structure 150 is connected with a bottom pad 141 of IC backplane 140.
In some embodiments, micro LED display panel 100 further includes a micro lens array 160 corresponding to the mesa array. Micro lens array 160 is formed on top transparent conductive layer 120. A material of micro lens array 160 is selected from one or more of SiO2, Si3N4, or Al2O3.
In some embodiments, micro lens array 160 includes a bottom spacer 161 formed on a top surface of top transparent conductive layer 120, and a plurality of micro lens structures 162 formed on bottom spacer 161. The plurality of micro lens structures 162 correspond to the plurality of mesa structures 110. In some embodiments bottom spacer 161 and the plurality of micro lens structures 162 are an integrated structure, that it, micro lens structure 162 can be etched from micro lens array 160. Materials of bottom spacer 161 and the plurality of micro lens structures 162 are the same. By adjusting a thickness of bottom spacer 161 and a height of micro lens structure 162, light emission efficiency can be further improved. In some embodiments, micro lens structure 162 is semi-spherical, conical, pyramidal, cylindrical, or circular truncated conical. A height H of micro lens structure 162 is in a range of 0.05 μm to 10 μm, and a diameter D of a bottom cross section of micro lens structure 162 is in a range of 0.5 μm to 10 μm.
Referring to
In some embodiments, second type epitaxial layer 113 includes an extrusion portion 113A formed on reflective isolation layer 130 and extending along a top surface of reflective isolation layer 130. Extrusion portion 113A interconnects second type epitaxial layers 113 of adjacent mesa structure 110 of the mesa array. A top surface of second type epitaxial layer 113 is continuously formed on the mesa array. Top transparent conductive layer 120 is continuously formed on the top surface of second type epitaxial layer 113. Therefore, top transparent conductive layer 120 can connect all the mesa structures 110 in micro LED display panel 100 and provide electrical conductivity for mesa structures 110.
Referring back to
In some embodiments, micro LED display panel 100 further include an electrode pad 180 formed on an edge of the mesa array. Electrode pad 180 is connected with top transparent conductive layer 120. In some embodiments, electrode pad 180 is formed on a sidewall surface of top transparent conductive layer 120. A top of electrode pad 180 is higher than a top of top transparent conductive layer 120. In some embodiments, electrode pad 180 and top contact 170 are interconnected, for example, electrode pad 180 and top contact 170 are interconnected to form a mesh, to improve conductive connection performance for top transparent conductive layer 120.
In some embodiments, micro LED display panel 100 further includes a passivation layer 190 formed on a sidewall surface of mesa structure 110. Passivation layer 190 is configured to provide protection for mesa structure 110 during manufacturing. A material of passivation layer 190 is selected from one or more of SiO2, Si3N4, or Al2O3.
In some embodiments, passivation layer 190 is further formed on a bottom surface of extrusion portion 113A. In some embodiments, passivation layer 190 is further formed on a top surface of reflective isolation layer 130. Electrode pad 180 is formed on a top surface of passivation layer 130 and on a sidewall surface of extrusion portion 113A. A top of passivation layer 190 is not higher than a top of an end of top transparent conductive layer 120, which can enhance alignment bond adhesion and improve bond yield.
In some embodiments, micro LED display panel 100 further includes one or more IO (Input/Output) vias 191. The one or more IO vias 191 are formed outside the mesa array and throughout reflective isolation layer 130, for example, at an edge of micro LED display panel 100.
In some embodiments, micro LED display panel 100 further includes one or more top connection pads 192 corresponding to one or more IO vias 191. One top connection pad 192 is formed on a top of one IO via 191. One or more bottom connection pads 193 are provided on a top of IC backplane 140. Bottom connection pad 193 can be used for alignment during bonding process. Micro LED display panel 100 further includes a dielectric layer 194 formed on passivation layer 190 and filled in a gap between top connection pads 192.
In some embodiments, bottom pad 141 can be electrically connected with a bottom of one IO via 191. Therefore, bottom pad 141 can be electrically connected with top connection pad 192 through IO via 191.
In some embodiments, electrode pad 180 and top connection pad 192 can be configured to receive a control signal to control micro LED display panel 100. For example, electrode pad 180 and top connection pad 192 can be connected with an external circuit to receive control signals to control each mesa structure 110 independently.
Referring to
Description of other features of micro LED display panel 300 may be found by referring to similar features described above with reference to
Each micro LED structure 411 herein (e.g., mesa structure 110 in
Different types of micro LED panels can be provided. For example, the resolution of a display panel can range typically from 8×8 to 3840×2160. Common display resolutions include QVGA (Quarter Video Graphics Array) with 320×240 resolution and an aspect ratio of 4:3, XGA (Extended Graphics Array) with 1024×768 resolution and an aspect ratio of 4:3, D (Definition) with 1280×720 resolution and an aspect ratio of 16:9, FHD (Full High Definition) with 1920×1080 resolution and an aspect ratio of 16:9, UHD (Ultra High Definition) with 3840×2160 resolution and an aspect ratio of 16:9, and 4K with 4096×2160 resolution. There can also be a wide variety of pixel sizes, ranging from sub-micron and below to 10 mm and above. The size of the overall display region can also vary widely, ranging from diagonals as small as tens of microns or less up to hundreds of inches or more.
The embodiments may further be described using the following clauses:
It should be noted that the relational terms herein such as “first” and “second” are used only to differentiate an entity or operation from another entity or operation, and do not require or imply any actual relationship or sequence between these entities or operations. Moreover, the words “comprising,” “having,” “containing,” and “including,” and other similar forms are intended to be equivalent in meaning and be open ended in that an item or items following any one of these words is not meant to be an exhaustive listing of such item or items, or meant to be limited to only the listed item or items.
As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a database may include A or B, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.
In the foregoing specification, embodiments have been described with reference to numerous specific details that can vary from implementation to implementation. Certain adaptations and modifications of the described embodiments can be made. Other embodiments can be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims. It is also intended that the sequence of steps shown in figures are only for illustrative purposes and are not intended to be limited to any particular sequence of steps. As such, those skilled in the art can appreciate that these steps can be performed in a different order while implementing the same method.
In the drawings and specification, there have been disclosed exemplary embodiments. However, many variations and modifications can be made to these embodiments. Accordingly, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation.
| Number | Date | Country | Kind |
|---|---|---|---|
| PCT/CN2023/124489 | Oct 2023 | WO | international |
The present disclosure claims the benefits of priority to PCT Application No. PCT/CN2023/124489, filed on Oct. 13, 2023, which is incorporated herein by reference in its entirety.
