Patent Application
20230282767
The present disclosure generally relates to light emitting diode technology field, and more particularly, to a micro light emitting diode (LED), a micro LED panel, and a micro LED chip.
Inorganic micro pixel light emitting diodes, also referred to as micro light emitting diodes, micro LEDs or μ-LEDs, become more and more important since they are used in various areas including self-emissive micro-displays, visible light communications, and optogenetics. The micro LEDs have higher output performance than conventional LEDs because of better strain relaxation, improved light extraction efficiency, and uniform current spreading. Compared with conventional LEDs, the micro LEDs also exhibit several advantages, such as improved thermal effects, fast response rate, larger work temperature range, higher resolution, wider color gamut, higher contrast, lower power consumption, and operability at higher current density.
Conventionally, the inorganic micro LEDs are manufactured by etching III-V group epitaxial layers to form multiple mesas. Most of the light emitting from a sidewall of the mesa has a large emitting angle that is orthogonal to the micro display. However, in an augmented reality (AR) device, emitted light with a large emitting angle is blocked and lost so that the emitting light cannot reach a user's eyes. As a result, the light emitting efficiency is reduced. Thus, there is a need to reduce the loss of the emitting light from the sidewalls of the mesas.
The above discussion is only provided to assist in understanding the technical solutions of the present disclosure, and does not constitute an admission that the above is prior art.
The present disclosure provides an improved micro LED not subject to the aforementioned problems and disadvantages.
Embodiments of present disclosure provide a micro LED. The micro LED includes a light emitting structure; an electrical conductive layer formed on the light emitting structure; and a reflective layer formed on the electrical conductive layer, wherein a top surface of the reflective layer is lower than a top surface of the electrical conductive layer.
Embodiments of the present disclosure also provide a micro LED panel. The micro LED panel includes one or more above described micro LEDs, wherein the reflective layer is formed between adjacent ones of light emitting structures of the two or more micro LEDs.
Embodiments of the present disclosure also provide a micro LED chip. The micro LED chip includes one or more above described micro LED panels.
Additional advantages and features of the present disclosure will be further understood by the following detailed descriptions and the appended drawings.
Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying figures. Various features shown in the figures are not drawn to scale.
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the disclosure. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the invention as recited in the appended claims. Particular aspects of the present disclosure are described in greater detail below. The terms and definitions provided herein control, if in conflict with terms and/or definitions incorporated by reference.
The light emitting structure 110 is formed on the conductive substrate 150. In some embodiments, the light emitting structure 110 includes a PN junction and a quantum well. For example, the light emitting structure 110 includes a PN junction formed by an n-doped semiconductor layer and a p-doped semiconductor layer. The quantum well is formed between the n-doped semiconductor layer and the p-doped semiconductor layer. The light emitting structure 110 is a mesa structure with a flat top surface. In some embodiments, the light emitting structure 110 is a cone structure without a steeple top. The conductive substrate 150 is a circuit substrate, such as an IC (integrated circuit) substrate. The light emitting structure 110 is bonded on the conductive substrate 150 via a metal bonding process. A metal bonding layer 170 is formed between the light emitting structure 110 and the conductive substrate 150. The material of the metal bonding layer 170 can comprise one or more reflective metal materials so as to reflect light from the bottom of the light emitting structure 110 to the top of the light emitting structure 110. With the metal bonding layer 170, there is substantially no emitting light lost from the bottom and light emitting efficiency is improved.
The light emitting structure 110 is covered by the passivation layer 120 with an exposed area A on the top. That is, the passivation layer 120 is formed on the top and sidewall of the light emitting structure 110 except for the exposed area A. The passivation layer 120 is also formed over the conductive substrate 150. In this embodiment, as shown in
The reflective layer 140 is formed on the electrical conductive layer 130. A top surface of the reflective layer 140 is higher than a top surface of the light emitting structure 110 and lower than a top surface of the electrical conductive layer 130. In some embodiments, a top surface of the passivation layer 120 is higher than the top surface of the reflective layer 140. In some embodiments, the material of the reflective layer 140 can be metal or oxide material. In some embodiments, the reflective layer 140 is formed by stacked layers. In some embodiments, the reflective layer 140 is stacked by Ni, Ag, or Au layers. In some embodiments, the thickness of the reflective layer 140 is greater than half thickness of the light emitting structure 110, e.g., H1>½H2, where H1 and H2 are the thicknesses shown in
The micro LED100 further includes a micro lens 160 on the electrical conductive layer 130. The micro lens 160 covers the top surface of the electrical conductive layer 130 and parts of the top surface of the reflective layer 140, that is, a bottom surface of the micro lens 160 is greater than a top surface of the electrical conductive layer 130. The material of the micro lens 160 is selected from silicon oxide, photo resist, etc.
As shown in
The micro LED 100 provided in the present disclosure improves efficiency of light emitting at a small angle via the reflective layer 140. The light emitting from the sidewall of the light emitting structure 110 is initially reflected one or more times by the reflective layer 140, and emitted from the top surface of the light emitting structure 110. Therefore, the loss of the light emitting from the sidewall is reduced, and the light emitting efficiency from the top surface of the light emitting structure 110 is improved. As a result, substantially all the light can be emitted out of the top surface of the light emitting structure 110 without being blocked in devices (e.g., AR devices).
In some embodiments, in the micro LED panel 200, the micro LEDs 100 array can be 640*480, 1280*720 or 1920*1080, etc.
It is noted that the number of micro LEDs100 in the micro LED panel 200 in
The embodiments may further be described using the following clauses:
It should be noted that, the relational terms herein such as “first” and “second” are used only to differentiate an entity or operation from another entity or operation, and do not require or imply any actual relationship or sequence between these entities or operations. Moreover, the words “comprising,” “having,” “containing,” and “including,” and other similar forms are intended to be equivalent in meaning and be open ended in that an item or items following any one of these words is not meant to be an exhaustive listing of such item or items, or meant to be limited to only the listed item or items.
As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a database may include A or B, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless specifically stated otherwise or infeasible, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.
In the foregoing specification, embodiments have been described with reference to numerous specific details that can vary from implementation to implementation. Certain adaptations and modifications of the described embodiments can be made. Other embodiments can be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims. It is also intended that the sequence of steps shown in figures are only for illustrative purposes and are not intended to be limited to any particular sequence of steps. As such, those skilled in the art can appreciate that these steps can be performed in a different order while implementing the same method.
In the drawings and specification, there have been disclosed exemplary embodiments. However, many variations and modifications can be made to these embodiments. Accordingly, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation.
| Number | Date | Country | Kind |
|---|---|---|---|
| PCT/CN2022/079059 | Mar 2022 | WO | international |
The disclosure claims the benefits of priority to PCT Application No. PCT/CN2022/079059, filed on Mar. 3, 2022, which is incorporated herein by reference in its entirety.
