BRIEF DESCRIPTION OF THE DRAWINGS
Other objects, features and advantages of the present invention will become more apparent from the following detailed description made with reference to the accompanying drawings, in which:
FIG. 1 shows a flow chart of a clock signal compensation process in a CPU of a microcomputer in an embodiment of the present disclosure;
FIG. 2 shows a sequence diagram of compensation timing;
FIG. 3 shows a diagram of approximation of relationship between temperature and compensation error;
FIG. 4 shows a flow chart of an EEPROM writing process;
FIG. 5 shows a diagram of approximation of detection voltage and oscillation output cycle;
FIG. 6 shows a block diagram of a microcomputer; and
FIG. 7 shows a block diagram of DPLL circuit that is coupled with a regulator and a CR oscillation circuit.