The invention relates to a microelectronic device for manipulating a sample, comprising an array of field electrodes that can selectively be connected to a voltage supply. Moreover, it relates to the use of such a microelectronic device and to a method for the manipulation of particles in a sample chamber above an array of field electrodes.
The U.S. Pat. No. 6,942,776 B2 discloses a microelectronic device with an array of electrodes on the bottom side and a single planar counter electrode on the top side of a microfluidic chamber. By connecting the electrodes selectively to one of two phase-inverted voltages, potential cages can be created in the sample chamber in which particles can be trapped. The document does however not describe any circuits for driving the field electrodes.
Based on this situation it was an object of the present invention to provide means for manipulating a sample with an array of field electrodes, wherein it is desirable that a simple, cost-effective and space-saving driving of field electrodes is achieved.
This objective is achieved by a microelectronic device according to claim 1, a method according to claim 18, and a use according to claim 19. Preferred embodiments are disclosed in the dependent claims.
According to its first aspect, the invention relates to a microelectronic device for manipulating a sample, wherein the term “manipulation” shall denote any interaction with said sample, for example measuring characteristic quantities of the sample, investigating its properties, processing it mechanically or chemically or the like. The sample will usually be provided in a sample chamber, e.g. an empty cavity or a cavity filled with some substance like a gel that may absorb a sample substance, wherein the cavity may be open, closed, or connected to other cavities by fluid connection channels. The microelectronic device comprises the following components:
With the aforementioned microelectronic device, any desired state of electrode activity, i.e. connection or disconnection of the field electrodes to the first voltage supply, can be programmed into the array by addressing the addressing units and controlling the associated field electrodes as desired. To achieve this functionality, the device requires only local controllable switches that establish and keep the desired (dis-)connection to the first voltage supply after controlling.
According to a preferred embodiment of the microelectronic device, at least one of its field electrodes can selectively be disconnected from any voltage supply. It is therefore possible to operate this field electrode deliberately in a floating state, which offers new opportunities compared to known electrode arrays (e.g. that of U.S. Pat. No. 6,942,776 B2) in which the electrodes are necessarily coupled to one of two (phase-inverted) voltage supplies.
In a further development of the aforementioned embodiment, a region of field electrodes that are disconnected from any voltage supply can the established, wherein said region is surrounded by field electrodes connected to some voltage supply (e.g. to the first voltage supply). The resulting island of one or more floating electrodes can for example be used to create potential cages that can trap particles without the need for an opposing counter electrode.
The microelectronic device preferably comprises a second voltage supply, wherein each field electrode of the array is associated to a second controllable switch for selectively connecting it to said second voltage supply. In this case it is possible to program the array of field electrodes with a pattern of two voltages. Moreover, the first and the second voltage supply may particularly provide phase-inverted alternating voltages. This allows to generate dielectrophoretic forces on particles above the array of field electrodes.
The aforementioned second controllable switch is optionally coupled to a second addressing unit that is associated to the corresponding field electrode and that allows the controlling circuitry to control the second controllable switch if the second addressing unit is selected by the addressing circuitry. Providing the second switch with an addressing unit of its own allows to control it independently from the first switch. Both switches can therefore be opened simultaneously, which usually provides a floating state of the associated field electrode.
In an alternative embodiment, the second controllable switch is coupled to the first addressing unit of the corresponding field electrode, wherein said first addressing unit allows the controlling circuitry to control the second controllable switch if the first addressing unit is selected by the addressing circuitry. This embodiment has the advantage that one addressing unit is shared by two controllable switches, which saves hardware components and therefore space on the microchip, wherein said space can favorably be used to build smaller field electrodes.
In a further variant of the invention, the first controllable switch comprises a first capacitor and/or the second controllable switch (if present) comprises a second capacitor, wherein said capacitors can store switching-state information provided by the controlling circuitry. Capacitors provide a comparatively simple and reliable means for storing e.g. a voltage that indicates the requested state (“closed” or “open”) of an associated switch.
In a further development of the above embodiment, the first controllable switch comprises a first transistor which is connected with its gate to the first capacitor and/or the second controllable switch comprises a second transistor which is connected with its gate to the second capacitor. A voltage that has been stored on the capacitors is thus applied to the gate of the associated transistor and therefore determines if the transistor will be conductive or nonconductive.
In the aforementioned embodiment, the gate of the second transistor may optionally be inverted with respect to the gate of the first transistor. A given potential (positive or negative) will then have opposite effects on the conducting state of the first and second transistor, respectively, which allows to use one single potential for controlling the transistors anti-cyclically.
The first and the second capacitor may optionally be identical, i.e. be realized by the same hardware. The information stored on this capacitor will then be used to determine the switching-state of both the first and the second associated switch. This can favorably be combined with the aforementioned embodiment, as the voltage provided by the single capacitor has opposite effects on the normal and the inverted gate of the first and the second transistor, respectively; this guarantees that they are always in opposite switching states, connecting the field electrode either to the first or to the second voltage supply.
The first and/or the second capacitor may be coupled to a reference voltage with one of its two terminals. Connecting the other terminal to the controlling circuitry will then allow to charge the capacitor with the difference between the reference voltage and a voltage provided by the controlling circuitry.
Alternatively, the first capacitor may be coupled to the second voltage supply with a one terminal, and the second capacitor may be coupled to the first voltage supply with one terminal. In contrast to the aforementioned embodiment, no reference voltage is needed in this case, leading to corresponding savings in hardware components (lines etc.) and space.
The first and the second capacitor may optionally be coupled to each other with their second terminals. As will be explained in more detail with reference to the Figures, this approach is particularly suited in combination with the aforementioned embodiment as a defined potential can then be provided at the second terminals of the capacitors which can for example uniquely drive transistor switches.
In a further development of the invention, the microelectronic device comprises at least one additional switch that can disconnect at least one field electrode from any voltage supply if the addressing unit that is associated to said field electrode is selected by the addressing circuitry. The disconnection of the field electrode from any voltage supply helps to avoid parasitic current flow during the programming procedure.
The controller of the microelectronic device is preferably adapted to drive the array of field electrodes such that particles can be manipulated, trapped and/or moved in a sample chamber above the array of field electrodes. The controller may for example establish (moving) potential cages above the array of field electrodes in which particles can be trapped.
The microelectronic device is preferably realized in CMOS technology or in Large Area Electronics (LAE), particularly LAE using Low Temperature Poly-Silicon (LTPS). The use of an LAE matrix approach, even more preferably an active matrix approach, to contact the field electrodes and/or other components is advantageous as it reduces the number of required input/output contacts to the outside world. Large area electronics, and specifically active matrix technology using for example Thin Film Transistors (TFT), is commonly used in the field of flat panel displays for the drive of many display effects e.g. LCD, OLED and Electrophoretic. The (metal) field electrodes may be additionally deposited on top of a backplane containing the active matrix electronics. In another embodiment, the metal layers used to built the active matrix components (e.g. TFTs, diodes) are also used to make the field electrode layers.
The invention further relates to a method for the manipulation of particles in a sample chamber above an array of field electrodes, wherein the field electrodes are activated in a pattern comprising electrodes on a positive or a negative potential and electrodes on a floating potential.
As was already described in connection with the microelectronic device, the provision of floating electrodes can favorably be used to create novel potential distributions that allow the trapping of particles even without a counter electrode to the array.
The invention further relates to the use of the microelectronic devices described above for molecular diagnostics, biological sample analysis, or chemical sample analysis, food analysis, and/or forensic analysis. Molecular diagnostics may for example be accomplished with the help of magnetic beads or fluorescent particles that are directly or indirectly attached to target molecules.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter. These embodiments will be described by way of example with the help of the accompanying drawings in which:
Like reference numbers in the Figures refer to identical or similar components.
Micro-fluidics is essential for most biotechnology applications when bio-particles require movement from one location to another. Bio-particle manipulation is for example needed in many Lab-On-A-Chip applications, and being able to individually control large numbers of cells over comparatively large areas allows massively parallel operations for speed increases and cost reductions. This can have major benefits in areas such as drug discovery, proteomics, clinical analysis and point-of-care applications.
As many bio-particles (e.g. cells and viruses and some bio-molecules) are uncharged, the use of the standard electrophoretic techniques for particle manipulation requires that charge is added to the particle, which is often undesirable. Dielectrophoretic (DEP) forces can be induced in uncharged particles with non-uniform AC fields and can be positive or negative depending upon the dielectric properties of the particle and the fluid surrounding it. DEP forces are therefore ideally suited for micro-fluidic applications that require bio-particle manipulation like moving, trapping or rotating particles for detection, analysis and diagnostics. Moreover, the AC fields used in DEP tend to prevent the undesirable effects of electrolysis which is a side effect of the DC fields applied for electrophoresis. Therefore even with charged particles (e.g. DNA) DEP is advantageous for particle movement in fluids.
Applying different AC potentials (whose phase is indicated by + and − signs) to the field electrodes 11 allows to create potential cages in the sample chamber 1 in which the particles 2 can be trapped. By moving the activation pattern of the field electrodes as illustrated in the three consecutive stages shown in
While the embodiments shown in
In the following, a suitable driving circuit for operating field electrodes used in the above embodiments will be considered in more detail, starting with a closer view to the principles of dielectrophoretic (DEP) forces.
The DEP force scales as the cubed ratio of particle dimension to electrode spacing where the electrodes cause the non-linear electric field that generates the DEP force. Therefore at unity voltage the particle should be of a similar size to driving electrode spacing to provide a dominating force e.g. greater than forces due to Brownian motion. At higher voltages the spacing can become greater, but every effort should still be made to reduce the electrode spacing to the minimum possible (cf. L. Zheng, S. Ki, P. J. Burke, J. P. Brody: “Towards single molecule manipulation with dielectrophoresis using nanoelectrodes”, Proceedings of the 3rd IEEE conference on Nanotechnology, 1, p. 437 (2003)). To provide massively parallel movement and trapping of particles for analysis and diagnosis, a closely packed array is the most efficient solution.
Four electrodes can trap a particle if they are driven as a quadrupole, i.e. if opposite electrodes have the same and neighboring electrodes have a different AC phase.
As explained above, the size of a particle one wishes to trap is intimately linked to the electrode spacing. One should therefore make the most efficient use of the area available under an electrode 11 to fit the electronics required for driving it, i.e. the electronics under the electrode will limit the minimum size of field electrode and therefore the minimum size of particle that can be trapped. For large particles, the array will be large and one can use the cheapest technology available to do this and push this technology to its limits by reducing the amount of electronics under each electrode to its minimum so that the smallest particles possible can be trapped before one has to move to a finer resolution and more expensive technology. Large Area Electronic (LAE) technologies such as Low Temperature Poly-Silicon (LTPS) can for example be used to implement these schemes over large glass areas at low cost when compared to crystalline silicon CMOS.
In the following, simple circuit solutions are proposed for driving the electrodes of a DEP trap array. This allows the reduction of the electrodes to the lowest possible size in a closely packed array, enabling cost effective solutions through all silicon based technologies.
As indicated by dashed lines, the driving circuitry preferably further comprises a second controllable switch CSW2 which allows to connect the field electrode 11 to a second voltage supply VB. The second switch CSW2 can be controlled by the controlling circuitry COC under the control of a second addressing unit ADU2 that can be selected by the addressing circuitry ADC. As will be seen below, the first and the second addressing units ADU1, ADU2 can optionally be identical. The switches CSW1, CSW2 and the addressing units ADU1, ADU2 are typically placed under the electrode 11.
Several particular embodiments of the general layout of
A VDATA line passes digital data via an addressing transistor T3, which is controlled by an addressing voltage VADDR, to a capacitor C for storage. A high value will select the N-type TFT T2 and cause AC voltage VB to be passed to the electrode 11 and load L, while a low value will cause the P-type TFT T1 to be turned on and to pass AC voltage VA to the electrode 11 and load L. Therefore an array of electrodes 11 can be individually programmed to pass an AC voltage of 0 (+) phase or π(−) phase to the electrode 11 and load L, i.e. DEP traps can be programmed to occur at any desired location within the array of electrodes.
The array of electrodes 11 can be addressed line by line by using the row address voltage VADDR. The addressing phase will be rapid (e.g. all rows are addressed in under 1 ms). Over this period of time the particles will hardly notice the disturbance of the addressing phase. There will then be a drive phase of a longer period.
A slightly more complex case is envisaged in
In order to provide a still more simple circuit for enabling DEP trapping of the smallest particles, the circuit shown in
The voltage V is maintained in the aforementioned case because the charge re-distribution on the capacitors C1, C2 cancels out with two anti-phase sine waves. If C1=C2 charge conservation at the node n causes initial voltage V to become the new voltage V′ according to:
Voltage VA is DC and VA′ is the AC voltage that follows, similarly for VB and VB′:
wherein voltage VM is the midpoint voltage, e.g. 0V, and VR is the amplitude. This yields:
If C1=C2, the DC voltage V is therefore maintained at the node.
The size of C1 and C2 can in principle be zero as one could use the TFT parasitic capacitance of the N and P drive TFTs T1, T2 for C1 and C2. However the parasitic capacitance of the addressing TFT T3 causes asymmetry, so in reality one needs C1 and C2 to be quite a bit larger than this capacitance. Even so these capacitors can be hidden under the electrodes used to supply the AC phases and can therefore be considered as “for free” in terms of area consumption. This makes the circuit of
A further consideration that can be taken into account is that in an array the loads are all interlinked and that this can cause current flow between a line being addressed and lines that are not addressed. To provide good references, the power supply lines must not drop too much voltage. Therefore a simple addition to the circuit is an extra switch T5 to turn off current flow at the addressing time as shown in
In order to realize the embodiments with floating electrodes shown in
Finally it is pointed out that in the present application the term “comprising” does not exclude other elements or steps, that “a” or “an” does not exclude a plurality, and that a single processor or other unit may fulfill the functions of several means. The invention resides in each and every novel characteristic feature and each and every combination of characteristic features. Moreover, reference signs in the claims shall not be construed as limiting their scope.
Number | Date | Country | Kind |
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06118676.3 | Aug 2006 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB07/52739 | 7/10/2007 | WO | 00 | 2/6/2009 |