Not applicable.
Not applicable.
This invention relates to integrated circuit and microelectromechanical systems (MEMS) devices. More particularly, this invention relates to a microfabricated optical apparatus wherein vias are formed completely through the silicon substrates.
Microelectromechanical systems (MEMS) are very small moveable structures made on a substrate using lithographic processing techniques, such as those used to manufacture semiconductor devices. MEMS devices may be moveable actuators, sensors, valves, pistons, or switches, for example, with characteristic dimensions of a few microns to hundreds of microns. One example of a MEMS device is a microfabricated cantilevered beam, which may be used to switch electrical signals. Because of its small size and fragile structure, the movable cantilever may be enclosed in a cavity to protect it and to allow its operation in an evacuated environment. Therefore, upon fabrication of the moveable structure on a wafer, (device wafer) the device wafer may be mated with a lid wafer, in which depressions have been formed to allow clearance for the structure and its movement. To maintain the vacuum over the lifetime of the device, a getter material may also be enclosed in the device cavity upon sealing the lid wafer against the device wafer.
One such device that may be manufactured using MEMS techniques is an microfabricated optical table. Microfabricated optical tables may include very small optical components which may be arranged on the surface of a substrate in a manner analogous to a macroscopic optical components mounted on a full sized optical bench. These microfabricated components may include light sources such as light emitting diodes (LED's), beam shaping structures such as lenses and turning mirrors, and polarization altering devices such as Faraday rotators and optical isolators. After fabrication, these devices may be enclosed with a lid wafer to protect them in an encapsulated device cavity. Some devices, such as infrared detectors and emitters, may require a vacuum or low moisture environment, such that the device cavity may need to be substantially hermetically sealed.
In order to control such a microfabricated elements, electrical access must be provided that allows power and signals to be transmitted to and from the elements. Previously, these signal lines were routed under the bond lines between the lid wafer and the device wafer. Because the enclosed elements may be delicate, the bondlines may be, for example, metal alloy bondlines that are activated at relatively low processing temperatures. However, the presence of the flat metal bondlines directly adjacent to potentially high frequency signal lines may cause unwanted capacitance in the structure, limiting its high speed performance.
Accordingly, encapsulated microfabricated high frequency optical structures have posed an unresolved problem.
A method is described which can be used to make microfabricated optical tables using conductive vias which extend through the thickness of the substrate material.
A feature of this process is that conductive vias may be formed in a relatively insulative surrounding material of the substrate. These vias may supply power and signals to/from the components inside a substantially hermetically sealed device cavity. The signal and power lines may be delivered to the sealed device cavity with a through substrate via (TSV). The TSV may have a bonding pad on one side of the substrate, and a conductive line leading to the device within the device cavity. Accordingly, this architecture avoids the large capacitive losses that may occur with the under-bond routing of these electrical leads.
The encapsulated components may include turning mirrors, optical rotators and isolators, light emitters and optical lenses. Using this architecture, the turning mirror may be a reflective surface formed on a surface of the lid wafer, or it may be a separate component formed on the device wafer surface.
Numerous devices can make use of the systems and methods disclosed herein. In particular, high speed, compact telephone or communications switching equipment may make use of this architecture. RF switches benefit from the reduced capacitive coupling that an insulative substrate can provide. High density vias formed in the insulative substrate increase the density of devices which can be formed on a substrate, thereby reducing cost to manufacture. Other sorts of substrates, for example, metal or semiconducting substrates may make use of an insulating layer to provide isolation between the conductive via and the surrounding substrate. The performance of such devices may also be improved, in terms of insertion loss, distortion and isolation figures of merit.
Accordingly, the microfabricated optical apparatus fabricated on a substrate, may include a light source driven by a signal, wherein the light source generates optical radiation, a beam shaping element, and a turning surface which redirects the beam of light, wherein the signal is delivered to the light source by at least one through silicon via (TSV) which extends through a thickness of the substrate. The systems and methods may include elements of wafer level packaging (WLP), wafer bonding, pick and place mechanisms, MEMS processes, methods, structures and actuators.
The method for fabricating an optical apparatus on a substrate may include forming a device cavity in a lid wafer, forming a through silicon via through the substrate, disposing a light source driven by a waveform which generates optical radiation on the substrate, and coupling the light source electrically to the through silicon via, disposing a beam shaping element on the substrate, disposing a turning surface which redirects the beam of light, and bonding the substrate to the lid wafer to encapsulate the optical apparatus in a substantially hermetic device cavity.
These and other features and advantages are described in, or are apparent from, the following detailed description.
Various exemplary details are described with reference to the following figures, wherein:
The systems and methods described herein may be particularly applicable to microfabricated optical tables, wherein small optical devices are formed on a substrate surface and enclosed with a lid wafer. The optical devices may include light sources such as light emitting diodes (LED's), beam shaping structures such as lenses and turning mirrors, and polarization altering devices such as Faraday rotators and optical isolators. After fabrication, these devices may be enclosed with a lid wafer to protect them in an encapsulated device cavity. Some devices, such as optical detectors and optical or laser emitters, may require a vacuum or low moisture environment, such that the device cavity may need to be substantially hermetically sealed. The signal and power lines may be delivered to the sealed device cavity with a through substrate via (TSV). The TSV may have a bonding pad on one side of the substrate, and a conductive line leading to the device within the device cavity.
Through substrate vias may be particularly convenient for MEMS devices, because they may allow electrical access to the encapsulated devices. Without such through holes, electrical access to the MEMS device may have to be gained by electrical leads routed under the lid wafer which is then substantially hermetically sealed. It may be problematic, however, to achieve a substantially hermetic seal over terrain that includes the electrical leads unless more complex and expensive processing steps are employed. This approach also makes radio-frequency applications of the device limited, as electromagnetic coupling will occur from the metallic bondline residing over the normally oriented leads. “Substantially hermetic” is used herein, should be understood to provide a barrier against moisture penetration, and/or capable of maintaining vacuum to within about the 10 Torr range.
The systems and methods described herein may be particularly applicable to vacuum encapsulated optical tables, such as an LED, shaping lens, rotator/isolator and turning mirror, all enclosed in the device cavity.
The prior art is illustrated in
One of the problems with the device shown in
Suitable materials for the device substrate 70 and lid substrate 60 may be a metal or semiconductor such as silicon, or a ceramic or glass. The device cavity 65 may be etched into the lid wafer 60 using, for example, deep reactive ion etching (DRIE). The depth of the device cavity may be several hundred microns and have sufficient lateral extent to easily cover the components shown in
The laser 10 may be a light emitting laser diode for example, that can be driven by power and signal lines which are delivered to the laser 10 by one or more through silicon vias (TSVs) 40. These vias 40 are formed through the thickness of the device wafer 70. A number of references describe methods for making such through wafer vias 40. In the embodiment shown in
This embodiment may make use of, for example, a single mode, distributed feedback (DFB) edge-emitting laser located within the device cavity, and thereby protected from the environment and moisture by a substantially hermetic seal. The single mode, edge emitting diode may be capable of higher data rates than a multimode vertical cavity surface emitting lasers (VCSELs), such that this embodiment may have both performance and cost advantages. The DFB laser may be modulated directly by a signal or waveform fed to the DFB laser through the through silicon via, or it may be driven by a direct current (DC) electrical signal applied to the TSV. However, it should be understood that the light source 10 may be at least one of a light emitting diode, a laser diode, an edge emitting laser diode, a laser diode, and a vertical cavity surface emitting laser. The electrical access to the TSV 40 may be provided by a bonding pad 80, to which macroscopic electrical connections may be made. In the embodiments shown in
Otherwise, the embodiment shown in
As in the previous embodiments, there is once again a laser light source 10, which produces a beam of light which may be shaped by a ball lens 20, and then rotated by a Faraday rotator 30. The beam of light then impinges on a turning surface 50′ which redirects the light through the substrate, shown as generally downward in
The feature lens 20′ may be formed using grey scale lithography, which makes use of a thick photoresist. “Thick resists” means, that the resist film thickness is much higher than the penetration depth of the exposure light. For standard positive resists and standard exposure wavelengths (g-, h-, i-line), this means a thickness of >5 μm. (Of course, if small wavelengths with a very low penetration depth such as 310 nm are used, even a 1 μm resist film will be “thick” in this context). Under these conditions, the resist film cannot be completely exposed towards the substrate. However, the resist may be bleached in the process as follows: In the beginning of the exposure, light only penetrates the upper 1-2 μm of the resist film. This part of the resist film bleaches, so with the exposure going on, light will be able to penetrate the first 2-3 μm of the film, and so on. As a consequence, the exposed (and developable) resist film thickness goes approx. linear with the exposure dose. The transition exposed/unexposed is sufficiently sharp for reproducible greyscale lithography applications.
When the grayscale exposed resist is used in an etching process such as the one used to make lens 20′, the thin areas of the grayscale resist are removed early on, leading to relatively deeply etched features. The thicker areas of resist persist through the etching step, leading to shallowly etch features. Accordingly, the dome-shaped lens 20′ is produced by having thin portions of the grayscale resist cover the horizontal surface of the substrate, and the thickest areas over the top of the dome of the lens 20′
Grayscale lithography may be used to form a lens 20′ on either the outer surface or the inner surface of the roof of the device cavity lid substrate. A lens 20′ is shown on the outer surface in
As in the previous embodiments, there is once again a laser light source 10, which produces a beam of light which may be shaped by a ball lens 20, and then rotated by a Faraday rotator 30. The beam of light then impinges on a turning surface 50 which redirects the light in a direction normal to the substrate, shown as upward in
The through silicon vias (TSVs) 40 which are shown in each of
Other methods may be used to form the vias, and some may be more appropriate for some substrate materials than others. These alternative methods may be found in, for example, U.S. patent application Ser. No. 11/482,944, U.S. Pat. No. 8,343791, U.S. patent application Ser. No. 14/499,287 and U.S. patent application Ser. No. 13/987,871. Each of these documents in incorporated by reference in their entireties, and each is owned by the owner of the instant invention.
The other optical components may be obtained as discrete devices, and disposed on the fabrication substrate by pick and place machines, similar to those used in printed circuit board manufacture to place components. These discrete optical elements may be held in place by epoxy or glue. The light source 10 may require a conductive bonding material to maintain conductivity with the through silicon via. This conductive bonding material may be, for example, a relatively low temperature gold/tin alloy bond.
As mentioned previously, the lid substrate 60 may have a device cavity 65 etched therein using, for example, deep reactive ion etching (DRIE) or anisotropic etching. Anisotropic etching tends to form sidewalls with a 56 degree slope with respect to vertical, whereas DRIE tends to make very sharp, very vertical features. Anisotropic etching may be used on the embodiment shown in
After fabrication of the lid substrate 60 and placement of the optical elements within the perimeter of the device cavity, the lid substrate 60 may be bonded to the silicon device substrate 70. The bonding material may be, for example, a low temperature metal alloy bond such as gold/indium, which is formed at about 156 centigrade. Additional details as to methods for bonding with a gold and indium alloy may be found in U.S. Pat. No. 7,569,926, incorporated by reference in its entirety.
The embodiments illustrated in
More generally, a method for fabricating an optical apparatus on a substrate, may include forming a device cavity in a lid wafer, forming a through silicon via through the substrate, disposing a light source driven by a waveform which generates optical radiation on the substrate, and coupling the light source electrically to the through silicon via, disposing a beam shaping element on the substrate, disposing a turning surface which redirects the beam of light, and bonding the substrate to the lid wafer to encapsulate the optical apparatus in a substantially hermetic device cavity.
The method may further include etching a blind trench into a front side of the substrate leaving residual substrate material, coating the trench with an insulating material, depositing a conductive material in the blind trench, and removing the residual substrate material from a backside of the substrate to form the via. Even further, the method may include bonding the substrate to the lid wafer with a low temperature metal alloy bond.
The method may also include forming the device cavity with anisotropic etching, leaving inclined sidewalls in the device cavity inclined at angles of about 50 to 60 degrees with respect to a surface of the lid wafer, and depositing a reflective surface onto at least one inclined sidewall of the device cavity.
Finally, the method may include forming a lens in a roof of the device cavity, on an inside or an outside surface.
While various details have been described in conjunction with the exemplary implementations outlined above, various alternatives, modifications, variations, improvements, and/or substantial equivalents, whether known or that are or may be presently unforeseen, may become apparent upon reviewing the foregoing disclosure. Accordingly, the exemplary implementations set forth above, are intended to be illustrative, not limiting.
This U.S. Patent Application is a Continuation based U.S. patent application Ser. No. 14/931,883, filed Nov. 4, 2015, which claims priority to U.S. Provisional Patent Application Ser. No. 62/075,753 filed Nov. 5, 2014. Each of these U.S. Patent Applications is hereby incorporated by reference in their entireties.
Number | Date | Country | |
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62075753 | Nov 2014 | US |
Number | Date | Country | |
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Parent | 14931883 | Nov 2015 | US |
Child | 15408956 | US |