The present disclosure relates generally to microphone assemblies including those with microelectromechanical systems (MEMS) transducers and more specifically to microphone assemblies including circuits.
Microphones having a transducer that convert sound into an electrical signal conditioned or processed by an integrated circuit are commonly integrated with cell phones, personal computers and IoT devices, among other host devices. The electrical signal is communicated with minimal attenuation if the output impedance of the microphone matches the trace impedances of the connection to the host device. However, any output impedance contributed by an integrated circuit may be subject to process and temperature variation. For example, the device-to-device resistance of on-chip series termination resistors may vary by as much as 20%. Also, depending on the application, it may be desirable to integrate the microphone into systems that excerpt different characteristic impedances.
The objects, features and advantages of the present disclosure will become more fully apparent from the following description and appended claims, taken in conjunction with the accompanying drawings. The drawings depict only representative embodiments and are therefore not considered to limit the scope of the disclosure, the description of which includes additional specificity and detail.
The present disclosure describes microphone assemblies and other devices including an output driver circuit having an adjustable series terminated resistance (e.g., contributing to output impedance) at a communication interface of the microphone or other device and methods therefor. The adjustable series terminated resistance allows the output driver circuit to be adjusted or trimmed to meet a specified application requirement. The devices and methods disclosed herein may be used to reduce or eliminate manufacturing process variation and/or to match the output impedance of the microphone to the input impedance of a host device.
In
In general, the first output driver circuit 203 is arranged to send a signal to an external (e.g., host) device, for example, via the host device interface of the microphone assembly described herein. The controller 204 dictates the signal sent via the first output driver circuit 203. The interface protocol circuit 202 dictates the signal format. The controller 204 is configured to adjust an output impedance (e.g., first series terminated resistance) of the first output driver circuit 203 to meet or satisfy a specification requirement as suggested above.
The signal processing circuit 201 may be connected to an output of an electrical transducer or device that is configured to output a signal. In some embodiments, the signal processing circuit 201 may receive the signal and convert the signal from analog to digital using an analog-to-digital (A/D) converter. In other embodiments, the signal processing circuit 201 may include a buffer circuit, filter circuit, or an amplifying circuit or to filter, refine, or amplify the signal.
The interface protocol circuit 202 is connected to an output of the signal processing circuit 201. In some embodiments, the interface protocol circuit 202 and the signal processing circuit 201 may be combined into a single circuit that includes a processor and corresponding circuitry to process incoming signals and generate a corresponding output signal that adheres to a particular data exchange protocol. The interface protocol circuit 202 receives the processed signal from the signal processing circuit 201 and generates a protocol output signal to be sent. The particular protocol or format of the output signal depends generally on the application or use case and is not limiting.
The driver circuit 200 generally comprises a first output driver circuit coupled to the interface protocol circuit and having a corresponding plurality of parallel driver stages, each driver stage comprising a driver and a configurable resistance coupling an output of the driver to a first contact of the host interface, wherein the configurable resistances of the first output driver circuit form a first series terminated resistance. The circuit also comprises generally a controller coupled to the first output driver circuit and configured to adjust the first series terminated resistance by adjusting the configurable resistance of at least one driver stage of the first output driver circuit. In
The controller 204 is coupled to the first output driver circuit 203 and configured to adjust the first series terminated resistance by adjusting the configurable resistance 232 of at least one of the parallel driver stages 230. The controller 204 is connected to the configurable resistances 232, the drivers 231, and the interface protocol circuit 202. The controller 204 controls the drivers 231 to output a signal via the first contact 290 based on a signal received from the interface protocol circuit 202. The controller 204 controls the configurable resistances 232 to match an output impedance (e.g., a series terminated resistance) of the output driver circuit 203 to a specification. The resistance may be configured in a post-production process or it may be performed prior to or after integration in an OEM device.
The configurable resistances 232 of the first output driver circuit together form a first series termination resistance (e.g., output impedance) (ZO). The configurable resistances 232 have adjustable resistances. For example,
An example of the output of one of the configurable resistances 231 is depicted in
In some embodiments, the interface protocol circuit 202 is a low-voltage differential-signaling interface comprising a first output coupled to the first contact 290 and a second output coupled to a second contact 291. In such an embodiment, the microphone assembly 200 also includes a second output driver circuit 208 having a corresponding second plurality of parallel driver stages 281, each of the second driver stages 281 including a driver 282 and a configurable resistance 283 coupling an output of the respective second driver 282 and the second contact 287. The configurable resistances 283 of the second output driver circuit form a second series termination resistance (ZO2). The controller 204 is connected to a second output driver circuit and designed to adjust the second series terminated resistance by adjusting the configurable resistance of at least one driver stage of the second output driver circuit in the manner described herein. The controller 204 adjusts the second series terminated resistance to match an impedance of a device connected to the second contact 287.
The controller 501 includes a processor and a memory, in some implementations. The controller 501 receives or accesses a process error indication 504. The process error indication 504 may be stored in the memory on the controller 501. In some embodiments, the process error indication 504 is determined by a wafer-test machine during a calibration stage after the configurable resistances 522 were manufactured. In some embodiments, the process error indication 504 was determined by the controller 501 during a calibration stage. The calibration stage may have determined the amount of resistance that each configurable resistance 232 was supposed to have in different states vs the actual amount of resistance that each configurable resistance 232 in those different stages. The controller 501 also receives an indication 505 of an input impedance of a corresponding device connected to a first contact 590 is and what the impedance of the series terminated resistance should be set to. The controller 501 then adjusts the resistance of each of the configurable resistances 522 to ensure that the output impedance of the output driver circuit 502 is substantially the same as the received input impedance. The controller uses the process error indication 504 to further adjust the configurable resistances 522 in order to compensate for the process error of the resistors and ensure that the series terminal resistance is closely matched to the received indication 505 of the input impedance.
The foregoing description of illustrative embodiments has been presented for purposes of illustration and of description. It is not intended to be exhaustive or limiting with respect to the precise form disclosed, and modifications and variations are possible in light of the above teachings or may be acquired from practice of the disclosed embodiments. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.
Number | Date | Country | |
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62892509 | Aug 2019 | US |