Patent Application
20240195361
In at least one aspect, the present invention relates to millimeter-wave class EF power amplifiers.
Sensing or communication using the millimeter (mm)-wave band, such as mm-wave 5G systems and radar applications, is drawing increasing research interest. These systems typically employ an array of power amplifiers (PAs), with each PA operating at moderate output power. In this case, the power efficiency of the PA is crucial for better power and thermal management. Due to the high peak-to-average power ratios of spectrum-efficient modulations, the power back-off (PBO) efficiency is becoming increasingly important. The Class E/F switching PA is a favorable candidate at the mm-wave frequency band, as it can incorporate zero-voltage-switching (ZVS) and zero-derivative-voltage switching (ZdVS). Moreover, it reduces the I/V overlap from finite on-resistance by terminating different harmonics, leading to better peak efficiency. However, its efficiency roll-off still follows a typical Class B curve, resulting in relatively poor PBO efficiency.
Recently, a voltage-mode subharmonic switching (SHS) digital PA architecture [1-3] has been demonstrated to improve PBO efficiency by togging PA cells at the subharmonic frequency for the output PBO.
Accordingly, there is a need for improved PBO efficiency to millimeter-wave class EF power amplifiers.
In at least one aspect, a subharmonic switching power amplifier architecture includes a power amplifier core that includes at least one power amplifier that receives an input signal and is operable in a power back-off region. Characteristically, the at least one power amplifier is configured to be toggled at a carrier frequency (Fc) when the power level of the input signal is equal to or higher than a predetermined power level and at a subharmonic component of the carrier frequency when the power level of the input signal is less than the predetermined power level. Characteristically, the power amplifier is configured to be operated by a voltage mode or current mode driver and in the current mode with zero-voltage-switching.
In at least one aspect, a subharmonic switching power amplifier architecture includes a power amplifier core that includes at least one power amplifier that receives an input signal and is operable in a power back-off region. Characteristically, the at least one power amplifier is configured to be toggled at a carrier frequency (Fc) when the power level of the input signal is equal to or higher than a predetermined power level and at a subharmonic component of the carrier frequency when the power level of the input signal is less than the predetermined power level. Characteristically, the power amplifier is configured to be a Class-D power amplifier or a current mode Class-D power amplifier or a Class-E power amplifier or a Class-E/F power amplifier.
In another aspect, subharmonic switching power amplifier architecture optimizes peak and PBO efficiency with concurrent harmonic and subharmonic tuning Class E/F2,2/3 SHS PA for mm-wave operation that: 1) utilizes both harmonic and subharmonic tuning to reduce I/V overlap (i.e., conduction loss) for both peak and PBO operation and 2) allows the PA cells to toggle at a much lower frequency (i.e., subharmonic frequency) in PBO, which facilitates square switching waveform and reduces the loss of high-frequency clock routing. At the circuit level, an on-chip concurrent harmonic and subharmonic tuning matching network simultaneously provides optimal impedance of the fundamental frequency (Fc) and one or more harmonic components provided by N*Fc where N is a positive integer and/or one or more harmonic frequencies that are fractional frequency subharmonics provided by P*Fc/M where P and M are positive frequencies. The on-chip concurrent harmonic and subharmonic tuning matching network has a compact footprint without involving any tunable switches and elements.
In another aspect, an on-chip concurrent tuning matching network includes a subharmonic trap. Characteristically, the on-chip concurrent harmonic and subharmonic tuning matching network is configured to simultaneously provide optimal impedance at a carrier frequency and/or one or more harmonics and/or one or more subharmonics.
In another aspect, the subharmonic trap is a coupled-inductor-based subharmonic trap.
Advantageously, the prototype achieves 40.5% PAE at Psat and 24% PAE at −9 dB PBO. It largely enhanced deep PBO efficiency enhancement at mm-wave frequency bands.
The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description.
For a further understanding of the nature, objects, and advantages of the present disclosure, reference should be made to the following detailed description, read in conjunction with the following drawings, wherein like reference numerals denote like elements and wherein:
Reference will now be made in detail to presently preferred embodiments and methods of the present invention, which constitute the best modes of practicing the invention presently known to the inventors. The Figures are not necessarily to scale. However, it is to be understood that the disclosed embodiments are merely exemplary of the invention that may be embodied in various and alternative forms. Therefore, specific details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for any aspect of the invention and/or as a representative basis for teaching one skilled in the art to variously employ the present invention.
It is also to be understood that this invention is not limited to the specific embodiments and methods described below, as specific components and/or conditions may, of course, vary. Furthermore, the terminology used herein is used only for the purpose of describing particular embodiments of the present invention and is not intended to be limiting in any way.
It must also be noted that, as used in the specification and the appended claims, the singular form “a,” “an,” and “the” comprise plural referents unless the context clearly indicates otherwise. For example, reference to a component in the singular is intended to comprise a plurality of components.
The term “comprising” is synonymous with “including,” “having,” “containing,” or “characterized by.” These terms are inclusive and open-ended and do not exclude additional, unrecited elements or method steps.
The phrase “consisting of” excludes any element, step, or ingredient not specified in the claim. When this phrase appears in a clause of the body of a claim, rather than immediately following the preamble, it limits only the element set forth in that clause; other elements are not excluded from the claim as a whole.
The phrase “consisting essentially of” limits the scope of a claim to the specified materials or steps, plus those that do not materially affect the basic and novel characteristic(s) of the claimed subject matter.
With respect to the terms “comprising,” “consisting of,” and “consisting essentially of,” where one of these three terms is used herein, the presently disclosed and claimed subject matter can include the use of either of the other two terms.
It should also be appreciated that integer ranges explicitly include all intervening integers. For example, the integer range 1-10 explicitly includes 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10. Similarly, the range 1 to 100 includes 1, 2, 3, 4 . . . . 97, 98, 99, 100. Similarly, when any range is called for, intervening numbers that are increments of the difference between the upper limit and the lower limit divided by 10 can be taken as alternative upper or lower limits. For example, if the range is 1.1. to 2.1 the following numbers 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, and 2.0 can be selected as lower or upper limits.
When referring to a numerical quantity, in a refinement, the term “less than” includes a lower non-included limit that is 5 percent of the number indicated after “less than.” A lower non-includes limit means that the numerical quantity being described is greater than the value indicated as a lower non-included limited. For example, “less than 20” includes a lower non-included limit of 1 in a refinement. Therefore, this refinement of “less than 20” includes a range between 1 and 20. In another refinement, the term “less than” includes a lower non-included limit that is, in increasing order of preference, 20 percent, 10 percent, 5 percent, 1 percent, or 0 percent of the number indicated after “less than.”
For any device described herein, linear dimensions and angles can be constructed with plus or minus 50 percent of the values indicated rounded to or truncated to two significant figures of the value provided in the examples. In a refinement, linear dimensions and angles can be constructed with plus or minus 30 percent of the values indicated rounded to or truncated to two significant figures of the value provided in the examples. In another refinement, linear dimensions and angles can be constructed with plus or minus 10 percent of the values indicated rounded to or truncated to two significant figures of the value provided in the examples.
With respect to electrical devices, the term “connected to” means that the electrical components referred to as connected to are in electrical communication. In a refinement, “connected to” means that the electrical components referred to as connected to are directly wired to each other. In another refinement, “connected to” means that the electrical components communicate wirelessly or by a combination of wired and wirelessly connected components. In another refinement, “connected to” means that one or more additional electrical components are interposed between the electrical components referred to as connected to with an electrical signal from an originating component being processed (e.g., filtered, amplified, modulated, rectified, attenuated, summed, subtracted, etc.) before being received to the component connected thereto.
The term “electrical communication” means that an electrical signal is either directly or indirectly sent from an originating electronic device to a receiving electrical device. Indirect electrical communication can involve processing of the electrical signal, including but not limited to, filtering of the signal, amplification of the signal, rectification of the signal, modulation of the signal, attenuation of the signal, adding of the signal with another signal, subtracting the signal from another signal, subtracting another signal from the signal, and the like. Electrical communication can be accomplished with wired components, wirelessly connected components, or a combination thereof.
The term “one or more” means “at least one” and the term “at least one” means “one or more.” The terms “one or more” and “at least one” include “plurality” as a subset.
The term “substantially,” “generally,” or “about” may be used herein to describe disclosed or claimed embodiments. The term “substantially” may modify a value or relative characteristic disclosed or claimed in the present disclosure. In such instances, “substantially” may signify that the value or relative characteristic it modifies is within +0%, 0.1%, 0.5%, 1%, 2%, 3%, 4%, 5% or 10% of the value or relative characteristic.
The term “electrical signal” refers to the electrical output from an electronic device or the electrical input to an electronic device. The electrical signal is characterized by voltage and/or current. The electrical signal can be stationary with respect to time (e.g., a DC signal) or it can vary with respect to time.
The term “electronic component” refers is any physical entity in an electronic device or system used to affect electron states, electron flow, or the electric fields associated with the electrons. Examples of electronic components include, but are not limited to, capacitors, inductors, resistors, thyristors, diodes, transistors, etc. Electronic components can be passive or active.
The term “electronic device” or “system” refers to a physical entity formed from one or more electronic components to perform a predetermined function on an electrical signal.
The term “optimal impedance” means that the matching network provides a load input impedance that is within 30% of the load impedance that provide maximum power transfer.
It should be appreciated that in any figures for electronic devices, a series of electronic components connected by lines (e.g., wires) indicates that such electronic components are in electrical communication with each other. Moreover, when lines directed connect one electronic component to another, these electronic components can be connected to each other as defined above.
Throughout this application, where publications are referenced, the disclosures of these publications in their entireties are hereby incorporated by reference into this application to more fully describe the state of the art to which this invention pertains.
Subharmonic switching power amplifier architecture 10 can further include concurrent harmonic and subharmonic tuning matching network 16 which is in electrical communication with power amplifier core 12. (see,
In a variation, subharmonic switching power amplifier architecture 10 is configured to avoid voltage reverse biasing of the power amplifier drivers for increased reliability.
In another variation, subharmonic switching power amplifier architecture 10 is configured to provide additional attenuation of the subharmonic component caused by the mismatch of phase interleaving.
In still another variation, subharmonic switching power amplifier architecture 10 is configured to provide a concurrent harmonic and subharmonic tuning class E/F2/2/3 PA for mm-wave operation.
In still another variation, subharmonic switching power amplifier architecture 10 is configured to utilize both harmonic and subharmonic tuning to reduce I/V overlap (Conduction loss) for both peak and PBO operation and allows switching PA cells to toggle at a much lower frequency in PBO.
Referring to
Referring to
In a variation, the harmonic tuning concept is extended and combined with SHS operation. First, SHS is applied to the Class E/F PA drivers, such that the drivers can toggle at a much lower frequency (only one-third of the carrier frequency) in the PBO regime. Second, 2Fc/3 tuning is introduced to form a Class E/F2/3-based output matching network, in addition to ZVS and ZdVS, during PBO operation, analogous to the operation principle of Class E/F2. As a result, the overall SHS Class E/F2,2/3 PA structure not only leverages 2Fc tuning to improve the peak power efficiency, but also establishes appropriate terminations at Fc/3 and 2Fc/3, thereby purposefully improving PBO efficiency at the same time.
Referring to
Concurrent harmonic and subharmonic tuning architecture 10 includes amplifier core 12 that has one or more (e.g., a plurality) of switching amplifiers 14. Matching network 16 is in electrical communication with the one or more (e.g., a plurality) of switching amplifiers 14. Characteristically, matching network 16 includes at least one LC tank tuned for each of the carrier frequency, harmonic, or subharmonic being used. In a refinement, matching network 16 includes a pair of LC tanks each tuned to the same carrier frequency, harmonic, or subharmonic. A transformer couples the outputs of the LC tanks to the output. A tap (e.g., a center tap) in the transformer with an inductor in series to a capacitor can also be employed. In the example depicted in
The tuning matching network is a circuit-level enabler for Class E/F2,2/3 operation. The matching network provides optimal impedance at Fc to achieve impedance matching while simultaneously creating high impedance, as seen by common mode at 2Fc, to enable Class E/F2 operation in peak power mode. Meanwhile, high impedance can be seen by differential signals at Fc/3 and low impedance can be seen by common-mode signals at 2Fc/3, thus facilitating the subharmonic switching and tuning technique to alleviate the PBO efficiency without the need for additional tunable elements. Additionally, all of the passives are custom designed to minimize insertion loss, which finally leads to a compact footprint and renders the design conducive to mm-wave applications owing to its minimally parasitic attribute. The magnetic field of the structure with differential excitation at Fc and Fc/3 shows that the Fc/3 component is trapped inside the LC tank while the Fc component propagates to the output combiner (
In an experimental setup, the 65 nm CMOS prototype is bonded directly to the PCB, and the input/output signal is sent to/captured from the chip via a differential probe card.
Additional details are set forth A. Zhang, M. Ayesh, S. Mahapatra and M. S.-W. Chen, “A 24-28 GHz Concurrent Harmonic and Subharmonic Tuning Class E/F2,2/3 Subharmonic Switching Power Amplifier Achieving Peak/PBO Efficiency Enhancement,” 2021 IEEE Custom Integrated Circuits Conference (CICC), 2021, pp. 1-2, doi: 10.1109/CICC51472.2021.9431547 (25-30 Apr. 2021); the entire disclosure of which is hereby incorporated by reference in its entirety.
While exemplary embodiments are described above, it is not intended that these embodiments describe all possible forms of the invention. Rather, the words used in the specification are words of description rather than limitation, and it is understood that various changes may be made without departing from the spirit and scope of the invention. Additionally, the features of various implementing embodiments may be combined to form further embodiments of the invention.
This application claims the benefit of U.S. provisional application Ser. No. 63/179,494 filed Apr. 25, 2021, the disclosure of which is hereby incorporated in its entirety by reference herein.
The invention was made with Government support under Contract No. FA8650-19-1-7996 awarded by the Defense Advanced Research Projects Agency (DARPA). The Government has certain rights to the invention.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/US2022/026193 | 4/25/2022 | WO |
| Number | Date | Country | |
|---|---|---|---|
| 63179494 | Apr 2021 | US |
