The present invention relates to integrated circuit (IC) development, and in particular to ICs which include RF/analog content.
The following meanings for the abbreviations used in this specification apply:
AC alternating current
ADC analog-to-digital converter
DC direct current
IC integrated circuit
MCU micro controller unit
RF radio frequency
RFIC radio frequency integrated circuit
Currently, complex circuit designs—like RF transceivers—comprise various different mixed-mode circuits, for example: RF amplifiers, analog filters, blocks for digital computation, MCUs, power management, etc. Although the functionality is diverse and the variety of different blocks is large, the ICs should be as small as possible to keep the die size and component price small. In addition—or even as a consequence—ICs need to be placed into smaller and smaller packages to be desirable for the customers. When the package is small, however, the number of input/output pins can be rather limited.
However, the need for pins with RF transceivers is strong, for example: receivers and transmitters have several inputs and outputs, a digital interface towards baseband (DigRF) together with several reference clocks also require several pins, and there are test and monitoring pins, supply and ground pins, etc. Yet further, there has to be an adequate number of enable and control pins to support IC operation in different states and to support as many functions and modes as possible. Also, the IC should be able to be configured into several different modes to support as many products/platforms as possible with as few external components as possible.
Most conveniently, the IC can be configured into desired state(s) via (internal) digital control. However, that requires an MCU to be operational thus requiring active clocking, etc. In other words, the IC cannot be configured first since it requires the MCU and clock to activate controlling sequences. However, before the clock is available and the MCU is activated, the IC has to be activated first to generate the reference clock. Using additional enable or control pins to control the IC would solve the problem, but this is not desirable in view of the requirement to keep the die size small.
The number of pins could be increased with packages having less space between the pins. However, if the spacing is too small, the yield can be worsened. Also, more expensive packaging methods could be used but excessive testing time, high price, and poor yield must be avoided.
Exemplary embodiments of the present invention broadly aim at providing digital control to configure an IC into a desired state without adding digital control pins to the IC.
According to a first aspect, an exemplary embodiment provides an apparatus for processing signals, the apparatus being arranged on an IC, the apparatus comprising: at least one analog input port for receiving an input signal from outside of the IC; and a detector arranged to detect an operation state of the apparatus based on the input signal, wherein the detector is arranged to provide at least one digital control/enable signal, the at least one digital control/enable signal being dependent on the operation state of the apparatus, and wherein the detector is arranged to provide the at least one digital control/enable signal to another apparatus arranged on the IC.
According to a second aspect, an exemplary embodiment provides an IC comprising: a first apparatus; and a second apparatus, wherein the first apparatus comprises: at least one analog input port for receiving an input signal from outside of the IC; and a detector arranged to detect an operation state of the first apparatus based on the input signal, and provide at least one digital control/enable signal dependent on the operation state of the apparatus to the second apparatus.
According to a third aspect, an exemplary embodiment provides an IC comprising a foregoing apparatus.
According to a further aspect, an exemplary embodiment provides method of controlling an aforementioned apparatus, the method comprising: connecting the at least one analog input port to a signal source in case the apparatus is to be used, connecting the at least one analog input port to a first DC voltage in case the apparatus is not to be used and the other apparatus is to be used, and connecting the at least one analog input port to a second DC voltage in case the apparatus is not to be used and the other apparatus is to be enabled.
According to an exemplary embodiment, analog inputs of an IC are combined with digital control of the IC.
With such arrangement it is possible to spare pins. An RFIC may include blocks which are in use only in some cases. In other cases the blocks are unused and pins of it can be reused for controlling.
In the following the invention will be described by way of non-limiting exemplary embodiments thereof with reference to the accompanying drawings, of which:
According to an exemplary embodiment of the invention, a non-active analog port of an IC is re-used as a controlling pin.
The block A11 comprises analog input ports Inp_A1, Inm_A1 which may be connected to a signal source S1 or to ground, a driving circuit 11 for receiving signals from the analog input ports Inp_A1, Inm_A1 and processing the signals, and ports PA1-PA5 connected to ports PI1-PI5 of the control block 3.
The block B12 comprises analog input ports Inp_B1, Inm_B1 which may be connected to the signal source S1 or to ground, digital input ports EN_B1, CTRL_B1, a driving circuit 21 for receiving signals from the analog input ports Inp_B1, Inm_B1 and the digital input ports EN_B1, CTRL_B1 and processing the signals, and ports PB1-PB5 connected to ports PI12-P116 of the control block 3.
The control block 3 comprises ports PI1-PI18.
When the IC 10 is configured to state ‘A’ shown in
In state ‘B’ shown in
According to an exemplary embodiment illustrated in
In particular, the digital input ports EN_B1, CTRL_B1 of block B12 in
In other words, according to an exemplary embodiment, an apparatus (first apparatus) for processing signals, e.g. the block A130, arranged on an integrated circuit, e.g. the IC 20, comprises at least one analog input port, e.g. Inp_A1, Inm_A1, which receives an input signal from outside of the integrated circuit, and a detector (not shown in
The at least one analog input port may be connectable to different sources, e.g. the source S1, ground, outside of the integrated circuit in accordance with the operation state of the first apparatus. The detector may detect a signal level from the input signal, and output the at least one digital control/enable signal dependent on the signal level, from at least one output path (e.g. connection of the detector with control path 41, 42) of the detector, within the integrated circuit, to the second apparatus. The detector may convert the input signal to a DC voltage signal, detect a level of the DC voltage signal, and output the at least one digital control/enable signal dependent on the level of the DC voltage signal.
The first apparatus may comprise a driving circuit, e.g. the driving circuit 11, for processing signals input from the signal source. The driving circuit has an input for receiving a voltage signal based on the input signal. The detector may detect a level of the voltage signal, and output the at least one digital control/enable signal dependent on the level of the voltage signal. The voltage signal may be a DC voltage signal and the detector may detect the level of the DC voltage signal. For example, the detector comprises a comparator.
The first apparatus may comprise a first operation state in which the first apparatus is in use and the at least one analog input port is connected to the signal source, which is an AC voltage, and the detector outputs the at least one digital control/enable signal with a value which sets the operation state of the second apparatus to disabled, and a second operation state in which the first apparatus is not in use and the at least one analog input port is connected to a first DC voltage, e.g. a supply voltage of the integrated circuit, and the detector outputs the at least one digital control/enable signal with a value which contributes to setting the operation state of the second apparatus to in use, e.g. to active.
The detector may have a first output path (e.g. connection with control path leg 41) for outputting a digital control signal within the integrated circuit to a digital control path of the second apparatus (e.g. connection of the second apparatus with control path leg 41) and a second output path (e.g. connection with control path leg 42) for outputting a digital enable signal within the integrated circuit to a digital enable path of the second apparatus (e.g. connection of the second apparatus with control path leg 42). The first apparatus may comprise a third operation state in which the at least one analog input port is connected to a second DC voltage, e.g. ground, and the first apparatus is not in use, and the detector outputs the digital control signal and the digital enable signal with values which contribute to setting the operation state of the second apparatus to enabled.
It is to be noted that a connection of the at least one analog input port to a DC voltage, which may be VDD or any voltage of possibly several available voltages, GND or something in between, or even outside these limits in some cases, leads to an operation state, where with different DC voltages different operation states can be set, and a connection of the at least one analog input port to an AC voltage leads to another state.
An implementation example of the invention is depicted in
In
In
In
The output signal (control word) b1 can be connected to the control path 41, 42 shown in
The arrangement shown in
In
In
In
Similar to the arrangement shown in
According to an exemplary embodiment, a method of controlling block A130/block A131 is provided, in which the analog input ports Inp_A1, Inm_A1/IN_A1 are/is connected to a signal source in case block A130/block A131 is to be used, connected to a first DC voltage, e.g. a supply voltage of the block A130/block A131, in case block A130/block A131 is not to be used and block B140 is to be used, and connected to a second DC voltage, e.g. ground, in case block A130/block A131 is not to be used and block B140 is to be enabled. In an alternative embodiment, the logical output values given based on the supply voltage and the ground may be chosen differently.
It is to be understood that the above description is illustrative of the invention and is not to be construed as limiting the invention. Various modifications and applications may occur to those skilled in the art without departing from the true spirit and scope of the invention as defined by the appended claims.
Number | Date | Country | Kind |
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1219522.8 | Oct 2012 | GB | national |
This application claims the benefit under 35 U.S.C. §119(a) and 37 CFR §1.55 to UK patent application no. 1219522.8, filed on Oct. 30, 2012, the entire content of which is incorporated herein by reference.