Patent Grant
12120314
This document is related to video and image coding and decoding technologies.
Digital video accounts for the largest bandwidth use on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, it is expected that the bandwidth demand for digital video usage will continue to grow.
The disclosed techniques may be used by video or image decoder or encoder embodiments to perform coding or decoding of video bitstreams using non-rectangular partitioning such as a triangular partitioning mode.
In one example aspect, a method of visual media processing is disclosed. The method includes determining, for a conversion between a first video block of a visual media data and a bitstream representation of the visual media data, an availability of a second video block of the visual media data using a rule; and performing the conversion based on the determining, wherein the rule is at least based on a coding mode used for coding the first video block into the bitstream representation, wherein the rule specifies disallowing motion information of the second video block from being used in a merge list construction of the first block by treating the second video block as unavailable.
In one example aspect, a method of visual media processing is disclosed. The method includes determining, for a conversion between a first video block of a visual media data and a bitstream representation of the visual media data, an availability of a second video block of the visual media data using a rule; and performing the conversion based on the determining, wherein the rule specifies to use an availability check process on the second video block at one or more positions of the visual media data.
In one example aspect, a method of visual media processing is disclosed. The method includes determining, for a conversion between a current video block of a visual media data and a bitstream representation of the visual media data, two positions used for constructing an intra block copy motion list for the current video block; and performing the conversion based on the intra block copy motion list.
In one example aspect, a method of visual media processing is disclosed. The method includes determining, for a conversion between a current video block of a visual media data and a coded representation of the visual media data, an availability of a neighboring block for deriving one or more weights for a combined intra-inter prediction of the current video block based on a rule; and performing the conversion based on the determining, wherein, the one or more weights include a first weight which is assigned to an inter prediction of the current video block and a second weight which is assigned to an intra prediction of the current video block; wherein the rule excludes use of a comparison of coding modes of the current video block and the neighboring block.
In another example aspect, the above-described methods may be implemented by a video decoder apparatus that comprises a processor.
In another example aspect, the above-described methods may be implemented by a video encoder apparatus that comprises a processor.
In yet another example aspect, these methods may be embodied in the form of processor-executable instructions and stored on a computer-readable program medium.
These, and other, aspects are further described in the present document.
The present document provides various techniques that can be used by a decoder of image or video bitstreams to improve the quality of decompressed or decoded digital video or images. For brevity, the term “video” is used herein to include both a sequence of pictures (traditionally called video) and individual images. Furthermore, a video encoder may also implement these techniques during the process of encoding in order to reconstruct decoded frames used for further encoding.
Section headings are used in the present document for ease of understanding and do not limit the embodiments and techniques to the corresponding sections. As such, embodiments from one section can be combined with embodiments from other sections.
1. Brief Summary
This document is related to video coding technologies. Specifically, it is related to merge coding including triangular prediction mode. It may be applied to the existing video coding standard like HEVC, or the standard (Versatile Video Coding) to be finalized. It may be also applicable to future video coding standards or video codec.
2. Initial Discussion
Video coding standards have evolved primarily through the development of the well-known ITU-T and ISO/IEC standards. The ITU-T produced H.261 and H.263, ISO/IEC produced MPEG-1 and MPEG-4 Visual, and the two organizations jointly produced the H.262/MPEG-2 Video and H.264/MPEG-4 Advanced Video Coding (AVC) and H.265/HEVC [1] standards. Since H.262, the video coding standards are based on the hybrid video coding structure wherein temporal prediction plus transform coding are utilized. To explore the future video coding technologies beyond HEVC, Joint Video Exploration Team (JVET) was founded by VCEG and MPEG jointly in 2015. Since then, many new methods have been adopted by JVET and put into the reference software named Joint Exploration Model (JEM) [3][4]. In April 2018, the Joint Video Expert Team (JVET) between VCEG (Q6/16) and ISO/IEC ITC1 SC29/WG11 (MPEG) was created to work on the VVC standard targeting at 50% bitrate reduction compared to HEVC.
The latest version of VVC draft, i.e., Versatile Video Coding (Draft 5) could be found at: http://phenix.it-sudparis.eu/jvet/doc_end_user/documents/14_Geneva/wg11/JVET-N1001-v7.zip.
The latest reference software of VVC, named VTM, could be found at: https://vcgit.hhi.fraunhofer.de/jvet/VVCSoftware_VTM/tags/VTM-5.0.
2.1 Inter Prediction in HEVC/H.265
For inter-coded coding units (CUs), it may be coded with one prediction unit (PU), 2 PUs according to partition mode. Each inter-predicted PU has motion parameters for one or two reference picture lists. Motion parameters include a motion vector and a reference picture index. Usage of one of the two reference picture lists may also be signalled using inter_pred_idc. Motion vectors may be explicitly coded as deltas relative to predictors.
When a CU is coded with skip mode, one PU is associated with the CU, and there are no significant residual coefficients, no coded motion vector delta or reference picture index. A merge mode is specified whereby the motion parameters for the current PU are obtained from neighbouring PUs, including spatial and temporal candidates. The merge mode can be applied to any inter-predicted PU, not only for skip mode. The alternative to merge mode is the explicit transmission of motion parameters, where motion vector (to be more precise, motion vector differences (MVD) compared to a motion vector predictor), corresponding reference picture index for each reference picture list and reference picture list usage are signalled explicitly per each PU. Such a mode is named Advanced motion vector prediction (AMVP) in this disclosure.
When signalling indicates that one of the two reference picture lists is to be used, the PU is produced from one block of samples. This is referred to as ‘uni-prediction’. Uni-prediction is available both for P-slices and B-slices [2].
When signalling indicates that both of the reference picture lists are to be used, the PU is produced from two blocks of samples. This is referred to as ‘bi-prediction’. Bi-prediction is available for B-slices only.
The following text provides the details on the inter prediction modes specified in HEVC. The description will start with the merge mode.
2.1.1 Reference Picture List
In HEVC, the term inter prediction is used to denote prediction derived from data elements (e.g., sample values or motion vectors) of reference pictures other than the current decoded picture. Like in H.264/AVC, a picture can be predicted from multiple reference pictures. The reference pictures that are used for inter prediction are organized in one or more reference picture lists. The reference index identifies which of the reference pictures in the list should be used for creating the prediction signal.
A single reference picture list, List 0, is used for a P slice and two reference picture lists, List 0 and List 1 are used for B slices. It should be noted reference pictures included in List 0/1 could be from past and future pictures in terms of capturing/display order.
2.1.2 Merge Mode
2.1.2.1 Derivation of Candidates for Merge Mode
When a PU is predicted using merge mode, an index pointing to an entry in the merge candidates list is parsed from the bitstream and used to retrieve the motion information. The construction of this list is specified in the HEVC standard and can be summarized according to the following sequence of steps:
These steps are also schematically depicted in
In the following, the operations associated with the aforementioned steps are detailed.
2.1.2.2 Spatial Candidates Derivation
In the derivation of spatial merge candidates, a maximum of four merge candidates are selected among candidates located in the positions depicted in
2.1.2.3 Temporal Candidates Derivation
In this step, only one candidate is added to the list. Particularly, in the derivation of this temporal merge candidate, a scaled motion vector is derived based on co-located PU in a co-located picture. The scaled motion vector for temporal merge candidate is obtained as illustrated by the dotted line in
2.1.2.4 Co-Located Picture and Co-Located PU
When TMVP is enabled (i.e., slice_temporal_mvp_enabled_flag is equal to 1), the variable ColPic representing the col-located picture is derived as follows:
In the co-located PU (Y) belonging to the reference frame, the position for the temporal candidate is selected between candidates C0 and C1, as depicted in
Related syntax elements are described as follows:
7.3.6.1 General Slice Segment Header Syntax
2.1.2.5 Derivation of MVs for the TMVP Candidate
More specifically, the following steps are performed in order to derive the TMVP candidate:
The derivation process for collocated motion vectors is described in the next sub-section 2.1.2.5.1.
2.1.2.5.1 Derivation Process for Collocated Motion Vectors
For the co-located block, it may be intra or inter coded with uni-prediction or bi-prediction. If it is intra coded, TMVP candidate is set to be unavailable.
If it is uni-prediction from list A, the motion vector of list A is scaled to the target reference picture list X.
If it is bi-prediction and the target reference picture list is X, the motion vector of list A is scaled to the target reference picture list X, and A is determined according to the following rules:
The related working draft in JCTVC-W1005-v4 is described as follows:
8.5.3.2.9 Derivation Process for Collocated Motion Vectors
Inputs to this process are:
Outputs of this process are:
The variable currPic specifies the current picture.
The arrays predFlagL0Col[x][y], mvL0Col[x][y], and refIdxL0Col[x][y] are set equal to PredFlagL0[x][y], MvL0[x][y], and RefIdxL0[x][y], respectively, of the collocated picture specified by ColPic, and the arrays predFlagL1Col[x][y], mvL1Col[x][y], and refIdxL1Col[x][y] are set equal to PredFlagL1[x][y], MvL1[x][y], and RefIdxL1[x][y], respectively, of the collocated picture specified by ColPic.
The variables mvLXCol and availableFlagLXCol are derived as follows:
Definition of NoBackwardPredFlag is:
The variable NoBackwardPredFlag is derived as follows:
Besides spatial and temporal merge candidates, there are two additional types of merge candidates: combined bi-predictive merge candidate and zero merge candidate. Combined bi-predictive merge candidates are generated by utilizing spatial and temporal merge candidates. Combined bi-predictive merge candidate is used for B-Slice only. The combined bi-predictive candidates are generated by combining the first reference picture list motion parameters of an initial candidate with the second reference picture list motion parameters of another. If these two tuples provide different motion hypotheses, they will form a new bi-predictive candidate. As an example,
Zero motion candidates are inserted to fill the remaining entries in the merge candidates list and therefore hit the MaxNumMergeCand capacity. These candidates have zero spatial displacement and a reference picture index which starts from zero and increases every time a new zero motion candidate is added to the list. Finally, no redundancy check is performed on these candidates.
2.1.3 AMVP
AMVP exploits spatio-temporal correlation of motion vector with neighbouring PUs, which is used for explicit transmission of motion parameters. For each reference picture list, a motion vector candidate list is constructed by firstly checking availability of left, above temporally neighbouring PU positions, removing redundant candidates and adding zero vector to make the candidate list to be constant length. Then, the encoder can select the best predictor from the candidate list and transmit the corresponding index indicating the chosen candidate. Similarly with merge index signalling, the index of the best motion vector candidate is encoded using truncated unary. The maximum value to be encoded in this case is 2 (see
2.1.3.1 Derivation of AMVP Candidates
In motion vector prediction, two types of motion vector candidates are considered: spatial motion vector candidate and temporal motion vector candidate. For spatial motion vector candidate derivation, two motion vector candidates are eventually derived based on motion vectors of each PU located in five different positions as depicted in
For temporal motion vector candidate derivation, one motion vector candidate is selected from two candidates, which are derived based on two different co-located positions. After the first list of spatio-temporal candidates is made, duplicated motion vector candidates in the list are removed. If the number of potential candidates is larger than two, motion vector candidates whose reference picture index within the associated reference picture list is larger than 1 are removed from the list. If the number of spatio-temporal motion vector candidates is smaller than two, additional zero motion vector candidates is added to the list.
2.1.3.2 Spatial Motion Vector Candidates
In the derivation of spatial motion vector candidates, a maximum of two candidates are considered among five potential candidates, which are derived from PUs located in positions as depicted in
The no-spatial-scaling cases are checked first followed by the spatial scaling. Spatial scaling is considered when the POC is different between the reference picture of the neighbouring PU and that of the current PU regardless of reference picture list. If all PUs of left candidates are not available or are intra coded, scaling for the above motion vector is allowed to help parallel derivation of left and above MV candidates. Otherwise, spatial scaling is not allowed for the above motion vector.
In a spatial scaling process, the motion vector of the neighbouring PU is scaled in a similar manner as for temporal scaling, as depicted as
2.1.3.3 Temporal Motion Vector Candidates
Apart for the reference picture index derivation, all processes for the derivation of temporal merge candidates are the same as for the derivation of spatial motion vector candidates (see
2.2 Inter Prediction Methods in VVC
There are several new coding tools for inter prediction improvement, such as Adaptive Motion Vector difference Resolution (AMVR) for signaling MVD, Merge with Motion Vector Differences (MMVD), Triangular prediction mode (TPM), Combined intra-inter prediction (CIIP), Advanced TMVP (ATMVP, aka SbTMVP), affine prediction mode, Generalized Bi-Prediction (GBI), Decoder-side Motion Vector Refinement (DMVR) and Bi-directional Optical flow (BIO, a.k.a BDOF).
There are three different merge list construction processes supported in VVC:
Similarly, there are three AMVP lists supported in VVC:
In VVC, a Quad-Tree/Binary Tree/Ternary-Tree (QT/BT/TT) structure is adopted to divide a picture into square or rectangle blocks.
Besides QT/BT/TT, separate tree (a.k.a. Dual coding tree) is also adopted in VVC for I-frames. With separate tree, the coding block structure are signaled separately for the luma and chroma components.
In addition, the CU is set equal to PU and TU, except for blocks coded with a couple of specific coding methods (such as intra sub-partition prediction wherein PU is equal to TU, but smaller than CU, and sub-block transform for inter-coded blocks wherein PU is equal to CU, but TU is smaller than PU).
2.2.2 Affine Prediction Mode
In HEVC, only translation motion model is applied for motion compensation prediction (MCP). While in the real world, there are many kinds of motion, e.g. zoom in/out, rotation, perspective motions and the other irregular motions. In VVC, a simplified affine transform motion compensation prediction is applied with 4-parameter affine model and 6-parameter affine model. As shown
The motion vector field (MVF) of a block is described by the following equations with the 4-parameter affine model (wherein the 4-parameter are defined as the variables a, b, e and f) in equation (1) and 6-parameter affine model (wherein the 4-parameter are defined as the variables a, b, c, d, e and f) in equation (2) respectively:
where (mvh0, mvh0) is motion vector of the top-left corner control point, and (mvh1, mvh1) is motion vector of the top-right corner control point and (mvh2, mvh2) is motion vector of the bottom-left corner control point, all of the three motion vectors are called control point motion vectors (CPMV), (x, y) represents the coordinate of a representative point relative to the top-left sample within current block and (mvh(x,y), mvv(x,y)) is the motion vector derived for a sample located at (x, y). The CP motion vectors may be signaled (like in the affine AMVP mode) or derived on-the-fly (like in the affine merge mode). w and h are the width and height of the current block. In practice, the division is implemented by right-shift with a rounding operation. In VTM, the representative point is defined to be the center position of a sub-block, e.g., when the coordinate of the left-top corner of a sub-block relative to the top-left sample within current block is (xs, ys), the coordinate of the representative point is defined to be (xs+2, ys+2). For each sub-block (i.e., 4×4 in VTM), the representative point is utilized to derive the motion vector for the whole sub-block.
In order to further simplify the motion compensation prediction, sub-block based affine transform prediction is applied. To derive motion vector of each M×N (both M and N are set to 4 in current VVC) sub-block, the motion vector of the center sample of each sub-block, as shown in
After MCP, the high accuracy motion vector of each sub-block is rounded and saved as the same accuracy as the normal motion vector.
2.2.3 MERGE for Whole Block
2.2.3.1 Merge List Construction of Translational Regular Merge Mode
2.2.3.1.1 History-Based Motion Vector Prediction (HMVP)
Different from the merge list design, in VVC, the history-based motion vector prediction (HMVP) method is employed.
In HMVP, the previously coded motion information is stored. The motion information of a previously coded block is defined as an HMVP candidate. Multiple HMVP candidates are stored in a table, named as the HMVP table, and this table is maintained during the encoding/decoding process on-the-fly. The HMVP table is emptied when starting coding/decoding a new tile/LCU row/a slice. Whenever there is an inter-coded block and non-sub-block, non-TPM mode, the associated motion information is added to the last entry of the table as a new HMVP candidate. The overall coding flow is depicted in
2.2.3.1.2 Regular Merge List Construction Process
The construction of the regular merge list (for translational motion) can be summarized according to the following sequence of steps:
HMVP candidates could be used in both AMVP and merge candidate list construction processes.
It is noted that all the spatial/temporal/HMVP candidate shall be coded with non-IBC mode. Otherwise, it is not allowed to be added to the regular merge candidate list.
HMVP table contains up to 5 regular motion candidates and each of them is unique.
2.2.3.1.2.1 Pruning Processes
A candidate is only added to the list if the corresponding candidate used for redundancy check has not the same motion information. Such comparison process is called pruning process.
The pruning process among the spatial candidates is dependent on the usage of TPM for current block.
When current block is coded without TPM mode (e.g., regular merge, MMVD, CIIP), the HEVC pruning process (i.e., five pruning) for the spatial merge candidates is utilized.
2.2.4 Triangular Prediction Mode (TPM)
In VVC, a triangle partition mode is supported for inter prediction. The triangle partition mode is only applied to CUs that are 8×8 or larger and are coded in merge mode but not in MMVD or CIIP mode. For a CU satisfying these conditions, a CU-level flag is signalled to indicate whether the triangle partition mode is applied or not.
When this mode is used, a CU is split evenly into two triangle-shaped partitions, using either the diagonal split or the anti-diagonal split, as depicted in
If the CU-level flag indicates that the current CU is coded using the triangle partition mode, a flag indicating the direction of the triangle partition (diagonal or anti-diagonal), and two merge indices (one for each partition) are further signalled. After predicting each of the triangle partitions, the sample values along the diagonal or anti-diagonal edge are adjusted using a blending processing with adaptive weights. This is the prediction signal for the whole CU and transform and quantization process will be applied to the whole CU as in other prediction modes. Finally, the motion field of a CU predicted using the triangle partition mode is stored in 4×4 units.
The regular merge candidate list is re-used for triangle partition merge prediction with no extra motion vector pruning. For each merge candidate in the regular merge candidate list, one and only one of its L0 or L1 motion vector is used for triangle prediction. In addition, the order of selecting the L0 vs. L1 motion vector is based on its merge index parity. With this scheme, the regular merge list can be directly used.
2.2.4.1 Merge List Construction Process for TPM
Basically, the regular merge list construction process is applied as proposed in JVET-N0340. However, some modifications are added.
Specifically, the followings are applied:
After predicting each triangular prediction unit, an adaptive weighting process is applied to the diagonal edge between the two triangular prediction units to derive the final prediction for the whole CU. Two weighting factor groups are defined as follows:
1st weighting factor group: {⅞, 6/8, 4/8, 2/8, ⅛} and {⅞, 4/8, ⅛} are used for the luminance and the chrominance samples, respectively;
2nd weighting factor group: {⅞, 6/8, ⅝, 4/8, ⅜, 2/8, ⅛} and { 6/8, 4/8, 2/8} are used for the luminance and the chrominance samples, respectively.
Weighting factor group is selected based on the comparison of the motion vectors of two triangular prediction units. The 2nd weighting factor group is used when any one of the following condition is true:
Otherwise, 1st weighting factor group is used. An example is shown in
2.2.4.3 Motion Vector Storage
The motion vectors (Mv1 and Mv2 in
num_bricks_in_slice_minus1
slice_type
slice_cb_qp_offset
slice_cr_qp_offset
7.3.7.5 Coding Unit Syntax
7.3.7.7 Merge Data Syntax
7.4.6.1 General Slice Header Semantics
The value of MaxNumMergeCand shall be in the range of 1 to 6, inclusive.
The value of MaxNumSubblockMergeCand shall be in the range of 0 to 5, inclusive.
7.4.8.5 Coding Unit Semantics
When pred_mode_flag is not present, it is inferred as follows:
The variable CuPredMode[x][y] is derived as follows for x=x0 . . . x0+cbWidth−1 and y=y0 . . . y0+cbHeight−1:
When pred_mode_ibc_flag is not present, it is inferred as follows:
When pred_mode_ibc_flag is equal to 1, the variable CuPredMode[x][y] is set to be equal to MODE_IBC for x=x0 . . . x0+cbWidth−1 and y=y0 . . . y0+cbHeight−1.
When general_merge_flag[x0][y0] is not present, it is inferred as follows:
When mvp_10_flag[x0][y0] is not present, it is inferred to be equal to 0.
When inter_pred_idc[x0][y0] is not present, it is inferred to be equal to PRED_L0.
7.4.8.7 Merge Data Semantics
When regular_merge_flag[x0][y0] is not present, it is inferred as follows:
When mmvd_merge_flag[x0][y0] is not present, it is inferred as follows:
When mmvd_cand_flag[x0][y0] is not present, it is inferred to be equal to 0.
Both components of the merge plus MVD offset MmvdOffset[x0][y0] are derived as follows:
When merge_subblock_idx[x0][y0] is not present, it is inferred to be equal to 0.
When ciip_flag[x0][y0] is not present, it is inferred to be equal to 0.
When ciip_flag[x0][y0] is equal to 1, the variable IntraPredModeY[x][y] with x=xCb . . . xCb+cbWidth−1 and y=yCb . . . yCb+cbHeight−1 is set to be equal to INTRA_PLANAR.
The variable MergeTriangleFlag[x0][y0], which specifies whether triangular shape based motion compensation is used to generate the prediction samples of the current coding unit, when decoding a B slice. is derived as follows:
When merge_triangle_split_dir[x0][y0] is not present, it is inferred to be equal to 0.
When merge_triangle_idx0[x0][y0] is not present, it is inferred to be equal to 0.
When merge_triangle_idx1[x0][y0] is not present, it is inferred to be equal to 0.
When merge_idx[x0][y0] is not present, it is inferred as follows:
The decoding process as provided in the JVET-N0340 is defined as follows:
8.5.2.2 Derivation Process for Luma Motion Vectors for Merge Mode
This process is only invoked when general_merge_flag[xCb][yCb] is equal to 1, where (xCb, yCb) specify the top-left sample of the current luma coding block relative to the top-left luma sample of the current picture.
Inputs to this process are:
Outputs of this process are:
The bi-prediction weight index bcwIdx is set equal to 0.
The motion vectors mvL0[0][0] and mvL1[0][0], the reference indices refIdxL0 and refIdxL1 and the prediction utilization flags predFlagL0[0][0] and predFlagL1[0][0] are derived by the following ordered steps:
8.5.2.3 Derivation Process for Spatial Merging Candidates
Inputs to this process are:
Outputs of this process are as follows, with X being 0 or 1:
For the derivation of availableFlagA1, refIdxLXA1, predFlagLXA1 and mvLXA1 the following applies:
For the derivation of availableFlagB1, refIdxLXB1, predFlagLXB1 and mvLXB1 the following applies:
For the derivation of availableFlagB0, refIdxLXB0, predFlagLXB0 and mvLXB0 the
For the derivation of availableFlagA0, refIdxLXA0, predFlagLXA0 and mvLXA0 the following applies:
For the derivation of availableFlagB2, refIdxLXB2, predFlagLXB2 and mvLXB2 the following applies:
2.2.5 MMVD
In JVET-L0054, ultimate motion vector expression (UMVE, also known as MMVD) is presented. UMVE is used for either skip or merge modes with a proposed motion vector expression method.
UMVE re-uses merge candidate as same as those included in the regular merge candidate list in VVC. Among the merge candidates, a base candidate can be selected, and is further expanded by the proposed motion vector expression method.
UMVE provides a new motion vector difference (MVD) representation method, in which a starting point, a motion magnitude and a motion direction are used to represent a MVD.
This proposed technique uses a merge candidate list as it is. But only candidates which are default merge type (MRG_TYPE_DEFAULT_N) are considered for UMVE's expansion.
Base candidate index defines the starting point. Base candidate index indicates the best candidate among candidates in the list as follows.
If the number of base candidate is equal to 1, Base candidate IDX is not signaled.
Distance index is motion magnitude information. Distance index indicates the pre-defined distance from the starting point information. Pre-defined distance is as follows:
Direction index represents the direction of the MVD relative to the starting point. The direction index can represent of the four directions as shown below.
UMVE flag is signaled right after sending a skip flag or merge flag. If skip or merge flag is true, UMVE flag is parsed. If UMVE flag is equal to 1, UMVE syntaxes are parsed. But, if not 1, AFFINE flag is parsed. If AFFINE flag is equal to 1, that is AFFINE mode, But, if not 1, skip/merge index is parsed for VTM's skip/merge mode.
Additional line buffer due to UMVE candidates is not needed. Because a skip/merge candidate of software is directly used as a base candidate. Using input UMVE index, the supplement of MV is decided right before motion compensation. There is no need to hold long line buffer for this.
In current common test condition, either the first or the second merge candidate in the merge candidate list could be selected as the base candidate.
UMVE is also known as Merge with MV Differences (MMVD).
2.2.6 Combined Intra-Inter Prediction (CIIP)
In JVET-L0100, multi-hypothesis prediction is proposed, wherein combined intra and inter prediction is one way to generate multiple hypotheses.
When the multi-hypothesis prediction is applied to improve intra mode, multi-hypothesis prediction combines one intra prediction and one merge indexed prediction. In a merge CU, one flag is signaled for merge mode to select an intra mode from an intra candidate list when the flag is true. For luma component, the intra candidate list is derived from only one intra prediction mode, i.e., planar mode. The weights applied to the prediction block from intra and inter prediction are determined by the coded mode (intra or non-intra) of two neighboring blocks (A1 and B1).
2.2.7 MERGE for Sub-Block-Based Technologies
It is suggested that all the sub-block related motion candidates are put in a separate merge list in addition to the regular merge list for non-sub block merge candidates.
The sub-block related motion candidates are put in a separate merge list is named as ‘sub-block merge candidate list’.
In one example, the sub-block merge candidate list includes ATMVP candidate and affine merge candidates.
The sub-block merge candidate list is filled with candidates in the following order:
Basic idea of ATMVP is to derive multiple sets of temporal motion vector predictors for one block. Each sub-block is assigned with one set of motion information. When an ATMVP merge candidate is generated, the motion compensation is done in 8×8 level instead of the whole block level.
In current design, ATMVP predicts the motion vectors of the sub-CUs within a CU in two steps which are described in the following two sub-sections 2.2.7.1.1.1 and 2.2.7.1.1.2, respectively.
2.2.7.1.1.1 Derivation of Initialized Motion Vector
Denote the initialized motion vector by tempMv. When block A1 is available and non-intra coded (i.e., coded with inter or IBC mode), the following is applied to derive the initialized motion vector.
A corresponding block (with center position of current block plus the rounded MV, clipped to be in certain ranges in necessary) is identified in the collocated picture signaled at the slice header with the initialized motion vector.
If the block is inter-coded, then go to the 2nd step. Otherwise, the ATMVP candidate is set to be NOT available.
2.2.7.1.1.2 Sub-CU Motion Derivation
The second step is to split the current CU into sub-CUs and obtain the motion information of each sub-CU from the block corresponding to each sub-CU in the collocated picture.
If the corresponding block for a sub-CU is coded with inter mode, the motion information is utilized to derive the final motion information of current sub-CU by invoking the derivation process for collocated MVs which is not different with the process for conventional TMVP process. Basically, if the corresponding block is predicted from the target list X for uni-prediction or bi-prediction, the motion vector is utilized; otherwise, if it is predicted from list Y (Y=1−X) for uni or bi-prediction and NoBackwardPredFlag is equal to 1, MV for list Y is utilized. Otherwise, no motion candidate could be found.
If the block in the collocated picture identified by the initialized MV and location of current sub-CU is intra or IBC coded, or no motion candidate could be found as described aforementioned, the following further apply:
Denote the motion vector used to fetch the motion field in the collocated picture Rcol as MVcol. To minimize the impact due to MV scaling, the MV in the spatial candidate list used to derive MVcol is selected in the following way: if the reference picture of a candidate MV is the collocated picture, this MV is selected and used as MVcol without any scaling. Otherwise, the MV having a reference picture closest to the collocated picture is selected to derive MVcol with scaling.
The related decoding process for collocated motion vectors derivation process in JVET-N1001 is described as follows, with the parts related to ATMVP highlighted in bolded, underlined text:
8.5.2.12 Derivation Process for Collocated Motion Vectors
Inputs to this process are:
Outputs of this process are:
The variable currPic specifies the current picture.
The arrays predFlagL0Col[x][y], mvL0Col[x][y] and refIdxL0Col[x][y] are set equal to PredFlagL0[x][y], MvDmvrL0[x][y] and RefIdxL0[x][y], respectively, of the collocated picture specified by ColPic, and the arrays predFlagL1Col[x][y], mvL1Col[x][y] and refIdxL1Col[x][y] are set equal to PredFlagL1[x][y], MvDmvrL1[x][y] and RefIdxL1[x][y], respectively, of the collocated picture specified by ColPic.
The variables mvLXCol and availableFlagLXCol are derived as follows:
2.2.8 Regular Inter Mode (AMVP)
2.2.8.1 AMVP Motion Candidate List
Similar to the AMVP design in HEVC, up to 2 AMVP candidates may be derived. However, the HMVP candidates may also be added after the TMVP candidate. The HMVP candidates in the HMVP table are traversed in an ascending order of index (i.e., from index equal to 0, the oldest one). Up to 4 HMVP candidates may be checked to find whether its reference picture is the same as the target reference picture (i.e., same POC value).
2.2.8.2 AMVR
In HEVC, motion vector differences (MVDs) (between the motion vector and predicted motion vector of a PU) are signalled in units of quarter luma samples when use_integer_mv_flag is equal to 0 in the slice header. In the VVC, a locally adaptive motion vector resolution (AMVR) is introduced. In the VVC, MVD can be coded in units of quarter luma samples, integer luma samples or four luma samples (i.e., ¼-pel, 1-pel, 4-pel). The MVD resolution is controlled at the coding unit (CU) level, and MVD resolution flags are conditionally signalled for each CU that has at least one non-zero MVD components.
For a CU that has at least one non-zero MVD components, a first flag is signalled to indicate whether quarter luma sample MV precision is used in the CU. When the first flag (equal to 1) indicates that quarter luma sample MV precision is not used, another flag is signalled to indicate whether integer luma sample MV precision or four luma sample MV precision is used.
When the first MVD resolution flag of a CU is zero, or not coded for a CU (meaning all MVDs in the CU are zero), the quarter luma sample MV resolution is used for the CU. When a CU uses integer-luma sample MV precision or four-luma-sample MV precision, the MVPs in the AMVP candidate list for the CU are rounded to the corresponding precision.
2.2.8.3 Symmetric Motion Vector Difference in JVET-N1001-v2
In JVET-N1001-v2, symmetric motion vector difference (SMVD) is applied for motion information coding in bi-prediction.
Firstly, in slice level, variables RefIdxSymL0 and RefIdxSymL1 to indicate the reference picture index of list 0/1 used in SMVD mode, respectively, are derived with the following steps as specified in N1001-v2. When at least one of the two variables are equal to −1, SMVD mode shall be disabled.
2.2.9 Refinement of Motion Information
2.2.9.1 Decoder-Side Motion Vector Refinement (DMVR)
In bi-prediction operation, for the prediction of one block region, two prediction blocks, formed using a motion vector (MV) of list0 and a MV of list1, respectively, are combined to form a single prediction signal. In the decoder-side motion vector refinement (DMVR) method, the two motion vectors of the bi-prediction are further refined.
For DMVR in VVC, MVD mirroring between list 0 and list 1 is assumed as shown in
The motion vector refinement process may iterate twice. In each iteration, at most 6 MVDs (with integer-pel precision) may be checked in two steps, as shown in
In the first iteration, the starting point is the signaled MV, and in the second iteration, the starting point is the signaled MV plus the selected best MVD in the first iteration. DMVR applies only when one reference picture is a preceding picture and the other reference picture is a following picture, and the two reference pictures are with same picture order count distance from the current picture.
To further simplify the process of DMVR, JVET-M0147 proposed several changes to the design in JEM. More specifically, the adopted DMVR design to VTM-4.0 (to be released soon) has the following main features:
When the following conditions are all true, DMVR may be enabled:
The method is summarized below:
Intra block copy (IBC), a.k.a. current picture referencing, has been adopted in HEVC Screen Content Coding extensions (HEVC-SCC) and the current VVC test model (VTM-4.0). IBC extends the concept of motion compensation from inter-frame coding to intra-frame coding. As demonstrated in
Following a BV to find its reference block, the prediction can be generated by copying the reference block. The residual can be got by subtracting the reference pixels from the original signals. Then transform and quantization can be applied as in other coding modes.
However, when a reference block is outside of the picture, or overlaps with the current block, or outside of the reconstructed area, or outside of the valid area restricted by some constrains, part or all pixel values are not defined. Basically, there are two solutions to handle such a problem. One is to disallow such a situation, e.g. in bitstream conformance. The other is to apply padding for those undefined pixel values. The following sub-sessions describe the solutions in detail.
2.3.1 IBC in VVC Test Model (VTM4.0)
In the current VVC test model, i.e. VTM-4.0 design, the whole reference block should be with the current coding tree unit (CTU) and does not overlap with the current block. Thus, there is no need to pad the reference or prediction block. The IBC flag is coded as a prediction mode of the current CU. Thus, there are totally three prediction modes, MODE_INTRA, MODE_INTER and MODE_IBC for each CU.
2.3.1.1 IBC Merge Mode
In IBC merge mode, an index pointing to an entry in the IBC merge candidates list is parsed from the bitstream. The construction of the IBC merge list can be summarized according to the following sequence of steps:
In the derivation of spatial merge candidates, a maximum of four merge candidates are selected among candidates located in the positions depicted in A1, B1, B0, A0 and B2 as depicted in
After insertion of the spatial candidates, if the IBC merge list size is still smaller than the maximum IBC merge list size, IBC candidates from HMVP table may be inserted. Redundancy check are performed when inserting the HMVP candidates.
Finally, pairwise average candidates are inserted into the IBC merge list.
When a reference block identified by a merge candidate is outside of the picture, or overlaps with the current block, or outside of the reconstructed area, or outside of the valid area restricted by some constrains, the merge candidate is called invalid merge candidate.
It is noted that invalid merge candidates may be inserted into the IBC merge list.
2.3.1.2 IBC AMVP Mode
In IBC AMVP mode, an AMVP index point to an entry in the IBC AMVP list is parsed from the bitstream. The construction of the IBC AMVP list can be summarized according to the following sequence of steps:
After insertion of the spatial candidates, if the IBC AMVP list size is still smaller than the maximum IBC AMVP list size, IBC candidates from HMVP table may be inserted.
Finally, zero candidates are inserted into the IBC AMVP list.
2.3.1.3 Chroma IBC Mode
In the current VVC, the motion compensation in the chroma IBC mode is performed at sub block level. The chroma block will be partitioned into several sub blocks. Each sub block determines whether the corresponding luma block has a block vector and the validity if it is present. There is encoder constrain in the current VTM, where the chroma IBC mode will be tested if all sub blocks in the current chroma CU have valid luma block vectors. For example, on a YUV 420 video, the chroma block is N×M and then the collocated luma region is 2N×2M. The sub block size of a chroma block is 2×2. There are several steps to perform the chroma my derivation then the block copy process.
The IBC mode is allowed at the encoder when all sub blocks find a valid bv.
2.3.2 Single BV List for IBC (in VTM5.0)
JVET-N0843 is adopted to the VVC. In the JVET-N0843, the BV predictors for merge mode and AMVP mode in IBC will share a common predictor list, which consist of the following elements:
The number of candidates in the list is controlled by a variable derived from the slice header. For merge mode, up to first 6 entries of this list will be used; for AMVP mode, the first 2 entries of this list will be used. And the list conforms with the shared merge list region requirement (shared the same list within the SMR).
In addition to the above-mentioned BV predictor candidate list, JVET-N0843 also proposed to simplify the pruning operations between HMVP candidates and the existing merge candidates (A1, B1). In the simplification there will be up to 2 pruning operations since it only compares the first HMVP candidate with spatial merge candidate(s).
3. Problems
The current design of merge modes may have the following problems:
The detailed listing below should be considered as examples to explain general concepts. These embodiments should not be interpreted in a narrow way. Furthermore, these techniques can be combined in any manner.
The neighbouring blocks denoted as A0, A1, B0, B1, B2 etc. are shown in
The suggested changes on top of the latest VVC working draft (JVET-N1001_v7) are given as follows. The deleted text is marked with bolded, capitalized text. The newly added parts are highlighted in bolded, underlined text.
5.1 Embodiment #1
This embodiment is to align the pruning process for non-TPM coded block to that for TPM coded blocks i.e., full pruning operations for non-TPM coded blocks.
8.5.2.3 Derivation Process for Spatial Merging Candidates
Inputs to this process are:
Outputs of this process are as follows, with X being 0 or 1:
For the derivation of availableFlagA1, refIdxLXA1, predFlagLXA1 and mvLXA1 the following applies:
For the derivation of availableFlagB1, refIdxLXB1, predFlagLXB1 and mvLXB1 the following applies:
For the derivation of availableFlagB0, refIdxLXB0, predFlagLXB0 and mvLXB0 the following applies:
For the derivation of availableFlagA0, refIdxLXA0, predFlagLXA0 and mvLXA0 the following applies:
For the derivation of availableFlagB2, refIdxLXB2, predFlagLXB2 and mvLXB2 the following applies:
5.2 Embodiment #2
This embodiment is to align the pruning process for TPM coded block to that for non-TPM coded blocks, i.e., limited pruning operations for TPM coded blocks.
8.5.2.3 Derivation Process for Spatial Merging Candidates
Inputs to this process are:
Outputs of this process are as follows, with X being 0 or 1:
For the derivation of availableFlagA1, refIdxLXA1, predFlagLXA1 and mvLXA1 the following applies:
For the derivation of availableFlagB1, refIdxLXB1, predFlagLXB1 and mvLXB1 the following applies:
For the derivation of availableFlagB0, refIdxLXB0, predFlagLXB0 and mvLXB0 the following applies:
For the derivation of availableFlagA0, refIdxLXA0, predFlagLXA0 and mvLXA0 the following applies:
For the derivation of availableFlagB2, refIdxLXB2, predFlagLXB2 and mvLXB2 the following applies:
5.3 Embodiment #3
This embodiment is to align the conditions for invoking the checking of B2.
8.5.2.3 Derivation Process for Spatial Merging Candidates
Inputs to this process are:
Outputs of this process are as follows, with X being 0 or 1:
For the derivation of availableFlagA1, refIdxLXA1, predFlagLXA1 and mvLXA1 the following applies:
For the derivation of availableFlagB1, refIdxLXB1, predFlagLXB1 and mvLXB1 the following applies:
For the derivation of availableFlagB0, refIdxLXB0, predFlagLXB0 and mvLXB0 the following applies:
For the derivation of availableFlagA0, refIdxLXA0, predFlagLXA0 and mvLXA0 the following applies:
For the derivation of availableFlagB2, refIdxLXB2, predFlagLXB2 and mvLXB2 the following applies:
5.4 Embodiment #4
This embodiment is to align the conditions for invoking the checking of B2.
8.5.2.3 Derivation Process for Spatial Merging Candidates
Inputs to this process are:
Outputs of this process are as follows, with X being 0 or 1:
For the derivation of availableFlagA1, refIdxLXA1, predFlagLXA1 and mvLXA1 the following applies:
For the derivation of availableFlagB1, refIdxLXB1, predFlagLXB1 and mvLXB1 the following applies:
For the derivation of availableFlagB0, refIdxLXB0, predFlagLXB0 and mvLXB0 the following applies:
For the derivation of availableFlagA0, refIdxLXA0, predFlagLXA0 and mvLXA0 the following applies:
For the derivation of availableFlagB2, refIdxLXB2, predFlagLXB2 and mvLXB2 the following applies:
5.5 Embodiment #5
This embodiment is to simplify the decision of initialized MV in ATMVP process.
8.5.5.4 Derivation Process for Subblock-Based Temporal Merging Base Motion Data
Inputs to this process are:
Outputs of this process are:
The variable tempMv is set as follows:
The variable currPic specifies the current picture.
When availableFlagA1 is equal to TRUE, the following applies:
The location (xColCb, yColCb) of the collocated block inside ColPic is derived as follows.
The array colPredMode is set equal to the prediction mode array CuPredMode of the collocated picture specified by ColPic.
The motion vectors ctrMvL0 and ctrMvL1, and the prediction list utilization flags ctrPredFlagL0 and ctrPredFlagL1 are derived as follows:
5.6 Embodiment #6
Examples for alignment of derivation process of collocated MVs for sub-block and non-sub-block based methods.
8.5.2.12 Derivation Process for Collocated Motion Vectors
Inputs to this process are:
Outputs of this process are:
The variable currPic specifies the current picture.
The arrays predFlagL0Col[x][y], mvL0Col[x][y] and refIdxL0Col[x][y] are set equal to PredFlagL0[x][y], MvDmvrL0[x][y] and RefIdxL0[x][y], respectively, of the collocated picture specified by ColPic, and the arrays predFlagL1Col[x][y], mvL1Col[x][y] and refIdxL1Col[x][y] are set equal to PredFlagL1[x][y], MvDmvrL1[x][y] and RefIdxL1[x][y], respectively, of the collocated picture specified by ColPic.
The variables mvLXCol and availableFlagLXCol are derived as follows:
Two coordinates are used to derive the candidates, one is to identify neighboring blocks, and the other one is used for availability check of the identified neighboring blocks.
8.6.2.2 Derivation Process for IBC Luma Block Vector Prediction
This process is only invoked when CuPredMode[0][xCb][yCb] is equal to MODE_JBC, where (xCb, yCb) specify the top-left sample of the current luma coding block relative to the top-left luma sample of the current picture.
Inputs to this process are:
Outputs of this process are:
The variables xSmr, ySmr, smrWidth, and smrHeight are derived as follows:
The luma block vector bvL is derived by the following ordered steps:
4.7.1.1 Derivation Process for IBC Spatial Block Vector Candidates
Inputs to this process are:
Outputs of this process are as follows:
For the derivation of availableFlagAi and mvAi the following applies:
For the derivation of availableFlagB1 and bvB1 the following applies:
Inputs to this process are:
Output of this process is the (cbWidth)×(cbHeight) array predSamplesComb of prediction sample values.
The variable bitDepth is derived as follows:
The variable scallFact is derived as follows:
scallFact=(cIdx==0)?0:1. (8-838)
The neighbouring luma locations (xNbA, yNbA) and (xNbB, yNbB) are set equal to (xCb−1, yCb−1+(cbHeight<<scallFact)) and (xCb−1+(cbWidth<<scallFact), yCb−1), respectively.
For X being replaced by either A or B, the variables availableX and isIntraCodedNeighbourX are derived as follows:
The weight w is derived as follows:
When cIdx is equal to 0 and slice_lmcs_enabled_flag is equal to 1, predSamplesInter[x][y] with x=0 . . . cbWidth−1 and y=0 . . . cbHeight−1 are modified as follows:
6.4.4 Derivation Process for Neighbouring Block Availability
Inputs to this process are:
Output of this process is the availability of the neighbouring block covering the location (xNbY, yNbY), denoted as availableN.
The neighbouring block availability availableN is derived as follows:
When all of the following conditions are true, availableN is set equal to FALSE.
Some embodiments may be described using the following clause-based description.
Some example embodiments of techniques described in item 1 of section 4 include:
Some example embodiments of techniques described in item 2 of section 4 include:
Some example embodiments of techniques described in item 3 of section 4 include:
Some example embodiments of techniques described in item 4 of section 4 include:
Some example embodiments of techniques described in item 5 of section 4 include:
Some example embodiments of techniques described in item 6 of section 4 include:
With reference to items 14 to 17 in the previous section, the following clauses describe some technical solutions.
A method of video processing, comprising: determining, for a conversion between a coded representation of a first video block of a video and a second video block, an availability of a second video block during the conversion using an availability check process, wherein the availability check process checks at least at a first position and a second position with respect to the first video block; and performing the conversion based on a result of determining.
The method as above, wherein the first position corresponds to a top-left position.
The method as above, wherein the second position corresponds to a top-left position.
A method of video processing, comprising: determining, for a conversion between a coded representation of a video block of a video and a second video block, a list of intra block copy motion candidates at a first position and a second position with respect to the video block; and performing the conversion based on a result of determining.
The method as above, wherein the first position corresponds to a top left position relative to a shared merge region of the video block.
The method of any of the above clauses, wherein the conversion includes generating the bitstream representation from the current video block.
The method of any of the above clauses, wherein the conversion includes generating samples of the current video block from the bitstream representation.
A video processing apparatus comprising a processor configured to implement a method recited in any one or more of the above clauses.
A computer readable medium having code stored thereon, the code, upon execution, causing a processor to implement a method recited in any one or more of the above clauses.
The system 1900 may include a coding component 1904 that may implement the various coding or encoding methods described in the present document. The coding component 1904 may reduce the average bitrate of video from the input 1902 to the output of the coding component 1904 to produce a coded representation of the video. The coding techniques are therefore sometimes called video compression or video transcoding techniques. The output of the coding component 1904 may be either stored, or transmitted via a communication connected, as represented by the component 1906. The stored or communicated bitstream (or coded) representation of the video received at the input 1902 may be used by the component 1908 for generating pixel values or displayable video that is sent to a display interface 1910. The process of generating user-viewable video from the bitstream representation is sometimes called video decompression. Furthermore, while certain video processing operations are referred to as “coding” operations or tools, it will be appreciated that the coding tools or operations are used at an encoder and corresponding decoding tools or operations that reverse the results of the coding will be performed by a decoder.
Examples of a peripheral bus interface or a display interface may include universal serial bus (USB) or high definition multimedia interface (HDMI) or Displayport, and so on. Examples of storage interfaces include SATA (serial advanced technology attachment), PCI, IDE interface, and the like. The techniques described in the present document may be embodied in various electronic devices such as mobile phones, laptops, smartphones or other devices that are capable of performing digital data processing and/or video display.
Some embodiments of the present document are now presented in clause-based format.
A1. A visual media processing method, comprising:
A2. The method of clause A1, wherein the coding mode used for coding the first video block corresponds to inter coding and a coding mode for coding a second video block of the visual media data corresponds to intra block copy.
A3. The method of clause A1, wherein the coding mode used for coding the first video block corresponds to intra block copy and a coding mode for coding the second video block of the visual media data corresponds to inter coding.
A4. The method of clause A1, wherein performing the check:
B1. A visual media processing method, comprising:
B2. The method of clause B1, wherein the one or more positions corresponds to a top-left position relative to the first video block, and the rule further specifies treating the second video block as unavailable for the conversion in a case that a coding mode of the first video block is not same as a coding mode of the second video block.
B3. The method of clause B1, wherein the one or more positions corresponds to a top-left position relative to a shared merge region, and the rule further specifies not comparing a coding mode of the first video block to a coding mode of the second video block.
B4. The method of clause B3, wherein the rule further specifies checking whether a video region covering the one or more positions is in a same slice and/or tile and/or brick and/or subpicture as the first video block.
C1. A visual media processing method, comprising:
C2. The method of clause C1, wherein the two positions comprise a first position corresponding to a top left position relative to a shared merge region of the current video block.
C3. The method of clause C2, wherein the first position is used to determine an availability of neighboring video block of the current video block.
C4. The method of clause C1, wherein the two positions comprise a second position corresponding to a top left position relative to the current video block.
C5. The method of clause C4, wherein the second position is used to determine an availability of a neighboring video block of the current video block.
D1. A visual media processing method, comprising:
D2. The method of clause D1, wherein the neighboring block is determined to be available in a case that a coding mode of the neighboring block is an intra mode, an intra block copy (IBC) mode, or a palette mode.
D3. The method of any one or more of clauses D1 or D2, wherein the first weight is different from the second weight.
E1. The method of any of clauses A1 to D3, wherein the conversion includes generating the bitstream representation from the current video block.
E2. The method of any of clauses A1 to D3, wherein the conversion includes generating samples of the current video block from the bitstream representation.
E3. A video processing apparatus comprising a processor configured to implement a method recited in any one or more of clauses A1 to D3.
E4. A video encoding apparatus comprising a processor configured to implement a method recited in any one or more of clauses A1 to D3.
E5. A video decoding apparatus comprising a processor configured to implement a method recited in any one or more of clauses A1 to D3.
E6. A computer readable medium having code stored thereon, the code, upon execution, causing a processor to implement a method recited in any one or more of clauses A1 to D3.
E7. A method, system or apparatus described herein.
In the present document, the term “video processing” or “visual media processing” may refer to video encoding, video decoding, video compression or video decompression. For example, video compression algorithms may be applied during conversion from pixel representation of a video to a corresponding bitstream representation or vice versa. The bitstream representation of a current video block may, for example, correspond to bits that are either co-located or spread in different places within the bitstream, as is defined by the syntax. For example, a macroblock may be encoded in terms of transformed and coded error residual values and also using bits in headers and other fields in the bitstream. Furthermore, during conversion, a decoder may parse a bitstream with the knowledge that some fields may be present, or absent, based on the determination, as is described in the above solutions. Similarly, an encoder may determine that certain syntax fields are or are not to be included and generate the coded representation accordingly by including or excluding the syntax fields from the coded representation.
The disclosed and other solutions, examples, embodiments, modules and the functional operations described in this document can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.
A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random-access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and CD ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
While this patent document contains many specifics, these should not be construed as limitations on the scope of any subject matter or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular techniques. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.
| Number | Date | Country | Kind |
|---|---|---|---|
| PCT/CN2019/089970 | Jun 2019 | WO | international |
| PCT/CN2019/104810 | Sep 2019 | WO | international |
This application is a continuation of U.S. application Ser. No. 17/538,947, filed on Nov. 30, 2021, which is a continuation of International Patent Application No. PCT/CN2020/094310, filed on Jun. 4, 2020, which claims the priority to and benefits of International Patent Application No. PCT/CN2019/089970, filed on Jun. 4, 2019, and International Patent Application No. PCT/CN2019/104810, filed on Sep. 7, 2019. All the aforementioned patent applications are hereby incorporated by reference in their entireties.
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| Number | Date | Country | |
|---|---|---|---|
| 20230188729 A1 | Jun 2023 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 17538947 | Nov 2021 | US |
| Child | 18164994 | US | |
| Parent | PCT/CN2020/094310 | Jun 2020 | WO |
| Child | 17538947 | US |
