Patent Application
20130099697
This disclosure relates generally to electronics and more particularly to Light Emitting Diode (LED) backlight and LED lighting.
In modern displays, white LEDs are used to create the white light used to backlight the LCD. It is desirable to have the ability to vary the level of the backlight used. This is desired for both maximizing contrast as well as adjusting the display to the ambient light level. Conventional LED driver circuits accomplish dimming by adjusting the on time (duty cycle) of an LED string, such that the percentage of on time creates an equivalent brightness (or average intensity) at the desired brightness.
Circuit 100 is commonly used because the voltage at the negative terminal of opamp 104 can be made much higher than the offset of opamp 104. Because the duty cycle controls the effective intensity for all intensity levels, the voltage at Vref is constant. Hence, we get good matching of LED string currents even at low intensity levels. A problem with circuit 100, however, is that circuit 100 places a burden on the power supply (Vsupply). Vsupply must respond to fast load changes caused by the fast edges on the duty cycle control of the LED string current. Accordingly, the conventional circuit 100 is accurate at low intensity and provides good matching on multiple LED strings, even at low intensity but creates a burden on Vsupply by requiring faster load response.
Some conventional methods modify Vref directly to set the desired brightness level for the LEDs. For example, if the value of Vref is set at 500 mV for full scale current, the value of Vref would change to 5 mV for 1% brightness. These conventional methods have the disadvantage of being susceptible to offset voltages at low currents. More important than absolute accuracy is the relative accuracy when multiple LED strings are used. Since the offsets of the current source amplifiers will not match, the currents in the LED strings will have poor matching at low current levels. Additionally, the switching transistors of the current sources must still be high voltage devices.
The disclosed multi-channel driver equalizer circuit matches currents in multiple strings of illumination devices at low current levels by using an analog equalizer to sequentially couple the output of a reference amplifier in series with each current source amplifier in a current limit loop of the driver equalizer circuit to correct the offsets of the current source amplifiers, resulting in the matching of string currents on average.
Particular implementations of a multi-channel driver equalizer circuit can provide several advantages, including but not limited to: 1) lowering the transient response burden of the power supply; 2) allowing good matching of string currents on average at low current levels; and 3) allowing the manufacture of low cost driver chips.
The details of one or more disclosed implementations are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages will become apparent from the description, the drawings and the claims.
Each current source includes hold capacitor 206, amplifier 208 (e.g., an operational amplifier), switch 210 and current sense resistor 212. The output of the current source (Vout) is coupled to string 102 (
Switch control 214 can provide commands to switches in switch network 214 to open and close switches 204. Switches 204 can be MOSFET transistors, or other suitable electronic devices. In some implementations, switch control 214 can be a state machine implemented by digital and/or analog circuits or a microprocessor to provide the waveforms of non-overlapping pulses shown in
On phase pB, switches 204-2a, 204-2b close and switches 204-1a, 204-1b open, and reference amplifier 202 sets a local reference voltage (Vref_B) on hold capacitor 206-2, such that the offset seen at the output (Vout_B) of the current source is equivalent to the offset of reference amplifier 202. This process continues sequentially in order for each current source in driver equalizer circuit 200 up to amplifier 208-N (Op_N). At that point, the process repeats and all of the strings are driven to equivalent offsets on average and have equivalent performance.
The process described above provides good matching of string currents event at low currents. If a low offset is needed for good absolute performance, only one opamp, Op_X, needs to be low offset.
In some implementations, each capacitor on the local Vref (Vref_A to Vref_N) will not exactly match. Secondly, the charge injection left by turning off switches 204 (pA to pN) will not exactly match each other. To minimize the individual offsets from charge injection, we can take advantage of the DC/continuous nature of the analog current limit. On each phase (pA to pN), charge injection from switch 204 is left on hold capacitor 206 (at Vref_A to Vref_N). The amount of charge left is dependent on the gate capacitance (Cgs). It is well known that minimizing the charge injection requires using a minimum-size switching transistor and a minimum gate drive. Both of these can be used for this application because of the low frequency nature of the offset correction. A second commonly used technique is to reduce slowly the gate voltage at turn-off of each phase, to provide the falling edge shown in
Using circuit 200 in combination with known offset reduction techniques allows a practical solution for reducing mismatch (and absolute error) to approximately 100 μV. Compared to conventional techniques alone, a multiple of improvement can be obtained of 10 to 50 in both matching and absolute performance. This allows a practical implementation of analog current dimming. For example, a full scale current may have 500 mV across current sense resistor 212. One percent current will have 5 mV of sense signal. With 100 μV of offset, we can maintain 2% accuracy due to offset.
In some implementations, process 300 configures a switch network to couple a reference amplifier to a current source (302). The switch network can be configured by a switch control (e.g., state machine). Offset voltage is transferred from the reference amplifier to a holding capacitor of the current source (304). The reference amplifier can have a lower offset than the current source amplifier. The voltage is allowed to settle on the holding capacitor (306). The process is repeated for N current sources until all of the outputs of the current sources are driven to equivalent offsets on average.
While this document contains many specific implementation details, these should not be construed as limitations on the scope what may be claimed, but rather as descriptions of features that may be specific to particular embodiments. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable sub combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can, in some cases, be excised from the combination, and the claimed combination may be directed to a sub combination or variation of a sub combination.
