The present technology is generally directed to multi-frequency controllers used for inductive heating. In some embodiments, the multi-frequency controllers are configured to precisely regulate temperature of a module by heating particular depths of the module.
Chemical reactions are commonly carried out in a chamber in which molecules are forced to interact to produce a desired chemical product. Precise heating ensures that desired products are produced at desired yields, concentrations, and purities. When the temperature is too high, unwanted chemical reactions may occur. When the temperature is too low, the desired chemical reactions may not occur. The input reactants generally react to produce the desired product within a constrained range of temperatures.
Similarly, some reactive molecules contained within a chamber are sensitive to temperatures, potentially reacting into undesirable products when the temperature is too high or too low.
Current heating and cooling designs are very inefficient because heat has to move from exterior heaters to channels deep within an interior of a chamber. Heat moves from hot outer surfaces to the cooler inner surfaces via conduction along the thin channel walls. This requires that heat on the outside channels be much higher than the desired heat on the inner channels. The range of temperatures may result in inefficient operation, and/or unintended or undesirable chemical decomposition. Maintaining a uniform temperature for the input reactants across an area in the chamber is important for chemical reaction efficiency.
Thus, an efficient system and method for controlling the heating within a chamber is needed.
One inventive aspect is a system for heating a module (e.g., a container, receptacle, storage device, delivery device, reactor, or other module) via a coil to a target temperature using oscillating, pulsed electrical signals associated with unique frequencies and/or capacitance values. Each unique frequency can correspond to heating the module to a particular depth, relative to an outer surface of the module. For example, a first pulsed electrical signal having a first frequency can heat the module to a first depth, and a second pulsed electrical signal having a second frequency can heat the module to a second depth different than the first depth. The system can further include a thermal sensor for measuring a temperature associated with at least one of the module or a fluid associated with the module. Based on the measured temperature, the system can adjust signal delivery parameters of the first and/or second electrical signals.
Another aspect is a method for heating a module via an inductive coil to a target temperature using oscillating, pulsed electrical signals associated with unique frequencies and/or capacitance values. This method includes sending interleaving electrical signals to an inductor coil wrapped around a module. The electrical signals including a first electrical signal having a first duty cycle and a second electrical signal having a second duty cycle. The first electrical signal may cause a first set of capacitors to be electrically connected to the inductor coil and the module to be heated to a first depth relative to an outer surface of the module. The second electrical signal causes a second set of capacitors (different from the first set of capacitors) to be electrically connected to the inductor coil and the module to be heated to a second depth relative to the outer surface, the second depth being different than the first depth. A temperature signal from a thermal sensor, the temperature signal including a temperature of at least one of the module or a fluid entering or exiting the module is received. A signal delivery parameter of at least one of the first or second electrical signals is adjusted based at least in part on the received temperature signal.
These, and other aspects, are disclosed in the present document.
The various embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings. More particular descriptions and equally effective implementations are included in this disclosure.
Identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one implementation may be beneficially utilized in other implementations without specific recitation.
The present technology is generally directed to multi-frequency controllers for inductive heating and associated systems and methods. In some embodiments, systems associated with the present technology are configured to precisely heat a module via a coil (e.g., an inductive coil) to a target temperature using oscillating, pulsed electrical signals associated with unique frequencies and/or capacitance values. Each unique frequency can correspond to heating the module to a particular depth, relative to an outer surface of the module. For example, a first pulsed electrical signal having a first frequency can heat the module to a first depth, and a second pulsed electrical signal having a second frequency can heat the module to a second depth different than the first depth. As such, individual regions extending along a length of the module can be individually heated by each electrical signal, thereby allowing the module, or more particularly a reactor core of the module, to be precisely heated to the target temperature. In particular, the present technology allows the core to be approximately uniformly heated, such that the temperature difference of individual regions across a diameter of the core is less than about 15 degC., less than about 10 degC., or less than about 5 degC. Furthermore, the present technology can also include one or more thermal sensors in communication with a controller that controls heating of the core via the coil. The thermal sensors can collect temperature measurements of the core or fluid entering, passing through, or exiting the core, and can be used as feedback to adjust the electrical signals being sent to the coil. For example, in some embodiments, a duty cycle of the electrical signals can be adjusted depending on whether the measured temperature is above or below the target temperature.
In the following detailed description, reference is made to the accompanying drawings that form specific embodiments by way of illustration in which the disclosed subject matter can be practiced. However, it should be understood that other embodiments may be utilized, and structural changes may be made without departing from the scope of the disclosed subject matter. Any combination of the following features and elements is contemplated to implement and practice the disclosure.
In the description, common or similar features may be designated by common reference numbers. As used herein, “exemplary” may indicate an example, an implementation, or an aspect, and should not be construed as limiting or as indicating a preference or a preferred implementation.
The plurality of capacitors can include one or more base capacitors 121a, 121b (referred to collectively as “base capacitors 121”), a first set of capacitors 123a, 123b (referred to collectively as “first set of capacitors 123”), a second set of capacitors 125a, 125b (referred to collectively as “second set of capacitors 125”), and a third set of capacitors 125a, 125b (referred to collectively as “third set of capacitors 127”). The base set of capacitors 121 can be configured to be always on while the microcontroller 104 is operating to provide at least a minimal amount of current to the coil 102. A portion of the first, second and third sets of capacitors 123, 125, 127 are included in a first bank of capacitors 140 (shown collectively as “DC Blocking Capacitor Bank”), and another portion of the first, second and third set of capacitors are included in a second bank of capacitors 150 (shown collectively as “Tank Capacitor Banks”). Each of the capacitors in the first, second and third sets of capacitors 123, 125, 127 includes a corresponding switch 130a, 130b, 130c, 130d, 130e, 130f (referred to collectively as “switches 130”). The individual switches 130 can be switched on to include the corresponding capacitor in the electrical circuit including the coil 102, or can be switched off to not include the corresponding capacitor in the electrical circuit including the coil 102. The switching of the individual switches 130 is controlled by the microcontroller 104, and can be based, e.g., on the frequency of the electrical signal to be sent to the coil 102. Each of the capacitors 121, 123, 125, 127 includes a particular capacitance value that is or can be added to the electrical circuit including the coil 102. As shown in the illustrated embodiment, the capacitance value is 1 microfarad for each capacitor. In other embodiments, however, these values can be changed depending on the particular application of the system 100.
As shown in the illustrated embodiment, the system 100 can further include one or more thermal sensors 110a, 110b (e.g., temperature measurement devices; referred to collectively as “thermal sensors 110”). The thermal sensors 110 can include a thermocouple, a resistance temperature detector (RTD) and/or a camera (e.g., an infrared thermal imager). The thermal sensors 110 are in electrical communication with the microcontroller, and are positioned adjacent (e.g., directly above, below or to the side of) the module 160. As such, the thermal sensors 110 are positioned to capture an end view of the core of the module 160 and collect temperature measurements of individual regions across a diameter of the core. The measurements can then be stored in memory associated with the microcontroller 124, e.g., as 10-bit words. In some embodiments, the resolution of the infrared imager can be 640×480 pixels. In a preferred embodiment, the resolution is high enough to look at individual channels within the core that are configured to pass a fluid (e.g., the hydrogenated molecule referred to above). The imager can form a virtual image of a temperature profile within the core, and the virtual image can then be quantized and used by the microcontroller 124 to control the amount of heating via the coil 102 by adjusting one or more of the signal delivery parameters of the electrical signals that are sent to the coil. As explained in further detail below with reference to
As shown in the illustrated embodiment, the system 100 can further include another coil (e.g., a second coil) 103. The second coil 103 is positioned upstream of the first coil 102, and is configured to heat the fluid entering the module 160 to the target temperature before the fluid reaches the core of the module 160. The second coil 103 can be in electrical communication with and be controlled by the microcontroller 104. The microcontroller 104 can adjust one or more signal delivery parameters (e.g., frequency, amplitude, duty cycle, etc.) of the electrical signals sent to the second coil 103, based on, e.g., temperature measurements from the thermal sensors 110.
In operation, the system 100 can be configured to heat the individual regions 162, 164, 166 of the module 160 based on signal delivery parameters of the pulsed electrical signals sent to the coil 102. For example, a first electrical signal having a first frequency and a first capacitance value can cause the module 160 to be heated to the first depth 172 for a period of time. The capacitance value can be based, e.g., on the particular capacitors of the first, second and/or third sets of capacitors 123, 125, 127 that are switched on (i.e., tuned) and added to the circuit. As another example, a second electrical signal having a second frequency and a second capacitance value can cause the module 160 to be heated to the second depth 174 for a period of time, and a third electrical signal having a third frequency and a third capacitance value can cause the module 160 to be heated to the third depth 176 for a period of time. By altering the signal delivery parameters of the pulsed electrical signals, and interleaving the electrical signals themselves (e.g., interleaving the first, second and third electrical signal), the different individual regions of the core can be individually targeted and heated. By heating the individual regions by induction, the system 100 can heat the core across its entire diameter (D) such that a temperature difference across the diameter of the core is less than a threshold limit (e.g., 15 degC., 10 degC., 5 degC., etc.). The frequencies and/or capacitance values selected for each electrical signal can be predetermined and tied to heating a particular depth of penetration of the module, relative to an outer surface of the module. For example, the table below shows example frequencies and capacitance values associated with particular depths of heating penetration.
As shown in the table, the frequency of the electrical signal decreases as the depth of penetration increases. For example, the first, outermost region 162 can be heated using a first frequency, 84 kHz, and a combined capacitance value of 8.5 microfarads, the second, intermediate region 164 can be heated using a second frequency, 51 kHz, and a combined capacitance value of 20 microfarads, and the third, innermost region 166 can be heated using a third frequency, 23 kHz, and a combined capacitance value of 96 microfarads. As described above, these signals can be sent to the coil 102 in an oscillating manner (e.g., the first signal with the first frequency and first capacitance value is sent, then the second signal with the second frequency and second capacitance value is sent, and then the third signal with the third frequency and third capacitance value is sent). In other embodiments, the frequencies and/or capacitance values used can vary from those disclosed in the table above, depending on the particular application of the present technology.
As yet another example, the number of capacitors and/or the capacitance value to be sent to the coil 102 for a particular electrical signal may be individually selected, as opposed to being selected as a set of capacitors. For example, as shown in the table below which includes a system with three capacitors, any combination of the capacitors may be chosen. As such, for three capacitors, 8 different combinations of the capacitors can be selected to send a desired amount of capacitance to the coil 102. This ability for the microcontroller to select capacitance values based on the needed depth of heating penetration, allows the module 160 to be heated across its diameter in a relatively uniform manner.
The first and second signals can cause at least a portion of the plurality of capacitors to be switched on. The switching of the individual switches 130 may be done via a separate signal sent by the microcontroller 104 to the individual switch. In some embodiments, each electrical signal (e.g., the first electrical signal, the second electrical signal, etc.) may correspond to switching on a set of capacitors. For example, the first signal may cause the first set of capacitors 123 to be switched on, thereby causing the capacitance values associated with the first set of capacitors 123 to be sent to the coil 102. Similarly, the second signal may cause the second set of capacitors 125 to be switched on, and a third signal may cause the third set of capacitors 127 to be switched on. In other embodiments, each signal may correspond to only one of the two capacitors for each set of capacitors shown in
The method 300 can further include receiving a temperature signal associated with the module 160 (process portion 306). The received temperature signal can include a temperature measurement of the core, such as a temperature of one of the regions 162, 164, 166, and/or a temperature measurement of the fluid, such as the fluid entering, exiting or passing through the module 160. In some embodiments, the temperature measurement can be a temperature profile of the core. For example, the imager referred to above with respect to
The method 300 can further include adjusting a signal delivery parameter of the first electrical signal and/or the second electrical signal, based on the temperature signal received. The signal delivery parameter being adjusted can include duty cycle. For example, based on the received temperature signal, the microcontroller 104 can adjust a duty cycle of the first electrical signal and/or the second electrical signal depending on whether the received temperature signal is above or below a target temperature. If the received temperature signal is above a target temperature, then the temperature of the region of the module or fluid being measured is too high, and the microcontroller 104 may decrease a duty cycle of the first and/or second electrical signal, thereby causing less dwell time (i.e., less heating time) associated with that particular electrical signal. If the received temperature signal is below a target temperature, then the temperature of the region of the module or fluid being measured is too low, and the microcontroller 104 may increase a duty cycle of the first and/or second electrical signal, thereby causing more dwell time (i.e., more heating time) associated with that particular signal.
In operation, the method 300 may operate according to the following example. First, second, and third electrical signals can be sent from the microcontroller 104 to the coil 102 in an oscillating manner, such that the first, second, and third signals are sequentially and iteratively sent. The first electrical signal can cause the first region 162 to be heated, the second electrical signal can cause the second region 164 to be heated, and the third electrical signal can cause the third region 166 to be heated. The depth of penetration for the first, second, and third electrical signals are based at least in part on their signal delivery parameter values, including the frequency, capacitance and/or duty cycle. A lower frequency and a higher capacitance each generally allow for a greater heating depth of penetration. Given the above operation, the electrical signals cause the module 160 to be heated across its diameter to a relatively uniform temperature. This uniform temperature creates optimal conditions for the fluid (e.g., a hydrogenated vaporized carrier molecule) passing through the module to form a desired product (e.g., released gaseous hydrogen molecule(s) and an at least partially dehydrogenated vaporized carrier molecule). Additional details describing the carrier molecule and processing conditions of the carrier molecule are described in U.S. patent application entitled SYSTEMS FOR REMOVING HYDROGEN FROM REGENERABLE LIQUID CARRIERS AND ASSOCIATED METHODS, and filed on May 29, 2018, the disclosure of which is incorporated herein by reference in its entirety. Notably, the release of hydrogen from the hydrogenated vaporized carrier is an endothermic reaction that absorbs heat from the core and thus causes the temperature of the particular region of the core to decrease. The system, therefore, includes devices for measuring temperature of the individual regions, which can determine if a region is below a target temperature and send a temperature signal to the microcontroller 104 indicating such. The microcontroller 104 can respond to the temperature signal and bring the temperature closer toward the target temperature by adjusting one or more of the signal delivery parameters, such as the duty cycle. With each oscillating cycle, temperature measurements of each region can be continually received by the microcontroller 104 and used to ensure the temperature of the core and/or fluid is at or near the target temperature. A similar process to that described above for adjusting the electrical signal sent to the coil 102 can be performed to adjust the electrical signal sent to the second coil 103 to heat the fluid to the target temperature prior to it entering the core of the module 160.
The microcontroller (U1) is a PIC18F2221 with 28 pins. In some embodiments, the microcontroller can require a +5V DC to operate, and can be connected to pin 1 with a 1000 ohm resistor (R1) to protect the microcontroller (U1) from overvoltage, e.g., from the VDD. The microcontroller (U1) uses an external clock source (X1) to control timing of the electrical signals being sent therefrom. The external clock source connects to pin 8 (OSC1) and pin 9 (OSC2). Pin 19 is ground referenced for logic and I/O, and Pin 20 is a +5V DC supply for logic and I/O pins. Between pin 19 and pin 20 are a 1 μF capacitor (C5) and a 4.7 μF capacitor (C6) in parallel. Output pins 21 (RB0) and 22 (RB1) are connected to pin 6 (LI) and pin 5 (HI) of an inverter (U3), respectively, which provide the LOW side signal and the HIGH side signal to the inverter (U3), respectively.
The inverter (U3) is comprised of a MOSFET driver, an 8-pin SOIC (UCC27211A). Input signals for the inverter come in on pin 6 (LI) and pin 5 (HI), and output signals for the inverter feed into to MOSFETs Q1 and Q2 using pin 3 (HO) and pin 8 (LO). Between pin 2 (HB) and pin 4 (HS) is a 0.1 μF capacitor (C9), which can be used as a bootstrap capacitor. On pin 7 is VSS ground, which is shared by the bottom pad of the IC for heat dissipation. Pin 1 is VDD connected to +12V DC. Connected to this trace are capacitors C7 (22 μF) and C8 (0.1 μF) in parallel, which are connected to ground for decoupling purposes. The inverter (U3) takes the HIGH side signal input from the microcontroller (U1) on pin 5 (HI) and outputs on pin 3 (HO) to the Gate of the HIGH side MOSFET Q1. The inverter (U3) takes the LOW side signal input from the microcontroller (U1) on pin 6 (LI) and outputs on pin 8 (LO) to the Gate of the LOW side MOSFET Q2. The inverter (U3) also has an internal circuitry to turn off the MOSFETs Q1 and Q2 when the signal drops, thus preventing them from staying on in an uncontrolled manner. Pin 4 (HS) is connected to an inverter bus to the source of the HIGH side MOSFET Q1.
The MOSFETs Q1 and Q2 are N-type MOSFETs (IPP200N15N3). They are robust enough to withstand high-frequency switching, current demands, and heating coefficient. In a preferred embodiment, the MOSFETs Q1 and Q2 are not on at the same time. Current flows through the MOSFET Q1 through a coil (L1) to ground, and as peak current is reached, the MOSFET Q2 turns on and reverses the current flows. The MOSFET Q1 is connected to the HIGH side output (pin 3) of the MOSFET driver (U3) via the Gate pin. It is referenced to +12V, connected to the Drain pin. The Source pin is connected to the inverter bus. The MOSFET Q2 is connected to the LOW side output (pin 8) of the MOSFET driver (U3) via the Gate pin. It is referenced to ground, connected to the Source pin. The Drain pin is connected to the inverter bus. Zener diodes D2 and D3 are across the Source and Drain pins on the MOSFETS Q1 and Q2 to protect the Gate from overvoltage. The inverter bus is connected to a switchable DC blocking capacitor bank. The DC blocking bank is comprised of two 0.5 μF capacitors (C10 and C11), which is the base capacitance value.
The circuit further includes a Tank circuit, which is comprised of a 4.4 μH working coil (L1) and a switchable Tank capacitor bank. As shown in the illustrated embodiment, the Tank capacitor bank is comprised of four 1 μF capacitors (C18, C19, C20, and C21), which is the base capacitance value for the Tank circuit. This part of the circuit tunes to different frequencies. For example, based in part on the microcontroller (U1), the inverter (U3) can change the frequency and the capacitors can be switched in or out of the DC blocking bank and the Tank bank of capacitors.
The circuit includes optically isolated switch units (U4, U5, U6, U7, U8, and U9), which are used to add or remove capacitance values to the DC blocking and Tank capacitor banks. Optical Isolation can prevent back EMF (Counter Electromotive Force) from damaging the microcontroller (U1). Each optionally isolated switch unit (VOM1271) is comprised of a signal trace that goes from pin 1 to an I/O port on the microcontroller (U1) through a 1000 ohm in-series resistor (R3, R4, R5, R6, R7, and R8). Pin 2 goes to ground, and Pins 3 and 4 go to the anode and cathode side of a Zener diode (D4, D5, D6, D7, D8, and, D9), respectively. Pin 4 also goes to the Gate pin of a MOSFET (Q3, Q4, Q5, Q6, Q7, and Q8). The Source pin of a MOSFET connects to the anode side of a Zener diode, which is connected to ground. When a switch unit is actuated, the Drain will connect an additional bank capacitor (C12, C13, and C14) into the DC blocking bank (010 and C11), or connect an additional bank capacitor (C15, C16, and C17) into the Tank bank (C18, C19, C20 and C21).
The Drain pins of the MOSFETs Q3, Q4, and Q5 are connected to the inverter bus. When they are digitally addressed by the microcontroller (U1) using pins 16 (RC5), 17(RC6), and 18(RC7), additional values of capacitance (C12, C13, and C14, each with 0.5 μF) can be selected to tune the DC blocking capacitor bank (C10 and C11) for the required frequency.
The circuit includes a middle bus, which is on the inside of the DC blocking capacitor bank (C10 and C11) and connects to the inside leg of the Tank bank (C18, C19, C20, and C21) as well as the inside leg of the working coil (L1). The other side of the working coil (L1) goes to the ground return bus.
As shown in the illustrated embodiment, the Drain pins of the MOSFETs Q6, Q7, and Q8 are connected to the middle bus, each through a capacitor that is being added in parallel to the Tank bank (C18, C19, C20, and C21). When they are digitally addressed by the microcontroller (U1) using pins 11 (RC0), 12 (RC1), and 13 (RC2), additional values of capacitance (C15, C16, and C17, each with 1 μF) can be selected to tune the Tank capacitor bank (C18, C19, C20 and C21) for the required frequency. The other side of these capacitors connects to the ground return bus.
The circuit can further include a LED (D1). The anode of the LED (D1) is connected to pin 25 (RB4) of the microcontroller (U1) via a 1000 ohm resistor (R2). The cathode of the LED (D1) is connected to a normally open switch (SW1). The other side of the switch (SW1) is connected to pin 26 (RB5) of the microcontroller (U1).
The circuit can further include a 6 pin connector (J1) for In Circuit Serial Programming (ICSP) of the microcontroller (U1). Pin 1 is for +5V; pin 2 goes to ground; pin 3 goes to pin 28 (RB7) of the microcontroller (U1); pin 4 goes to pin 27 (RB6) of the microcontroller (U1); pin 5 goes to pin 26 (RB5) of the microcontroller (U1); and pin 6 is keyed to insure proper insertion. RB5 is the ICSP programming enable pin; RB6 is the ICSP programming clock pin; and RB7 is the ICSP programming data pin. Pin 23 (RB2) and pin 24 (RB3) are analog inputs connected to thermal sensors.
Additional details of the reactor core and heating thereof are described in U.S. patent application Ser. No. 15/826,590, entitled INDUCTIVELY HEATED MICROCHANNEL REACTOR, and filed on Nov. 29, 2016, the disclosure of which is incorporated herein by reference in its entirety.
From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the scope of the invention. Accordingly, the invention is not limited except as by the appended claims.
The disclosed and other embodiments, modules and the functional operations described in this document can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter affecting a machine-readable propagated signal, or a combination of one or more them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.
A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read-only memory or a random-access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
While this patent document contains many specifics, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular inventions. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
Only a few implementations and examples are described. Other implementations, enhancements, and variations can be made based on what is described and illustrated in this patent document.
The illustrations of embodiments described herein are intended to provide a general understanding of the structure of various embodiments, and they are not intended to serve as a complete description of all the elements and features of components and systems that might make use of the structures described herein. Many other embodiments will be apparent to those of ordinary skill in the art upon reviewing the description provided herein. Other embodiments may be utilized and derived, such that structural and logical substitutions and changes may be made without departing from the scope of this disclosure. The figures herein are merely representational and may not be drawn to scale. Certain proportions thereof may be exaggerated, while others may be minimized. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.
Some embodiments implement functions in two or more specific interconnected hardware modules or devices with related control and data signals communicated between and through the modules, or as portions of an application-specific integrated circuit. Thus, the example system is applicable to software, firmware, and hardware implementations.
The Abstract of the Disclosure is provided to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing Detailed Description, it can be seen that various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby incorporated into the Detailed Description, with each claim standing on its own as a separate embodiment.
While the foregoing is directed to implementations of the present disclosure, other and further implementations of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
The present application claims priority to Provisional Application No. 62/677,649 entitled “MULTI-FREQUENCY CONTROLLERS FOR INDUCTIVE HEATING AND ASSOCIATED SYSTEMS AND METHODS” filed on May 29, 2018, which is incorporated herein by reference in its entirety and made part of the present disclosure. The present application is related to co-pending U.S. Non-Provisional application Ser. No. 15/826,590 filed Nov. 29, 2017, titled “INDUCTIVELY HEATED MICROCHANNEL REACTOR”; U.S. Provisional No. (62/677,612), filed May 29, 2018, titled “MODULAR FUELING STATION”; U.S. Provisional No. (62/677,640), filed May 29, 2018, titled “SYSTEMS FOR REMOVING HYDROGEN FROM REGENERABLE LIQUID CARRIERS AND ASSOCIATED METHODS”; and U.S. Provisional No. (62/677,620), filed May 29, 2018, titled “DUAL BLADDER FUEL TANK”. The disclosures of the referenced patent applications are considered part of the disclosure of the present application and are hereby incorporated by reference herein in their entirety and made part of the present disclosure.
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Entry |
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International Search Report and Written Opinion issued in PCT/US2019/034284 dated Sep. 20, 2019. |
International Search Report and Written Opinion issued in PCT/US2019/034288 dated Sep. 23, 2019. |
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62677649 | May 2018 | US |