Aspects of the present disclosure relate to domain specific languages (DSLs), and more particularly, to multi-level debugging of DSL tasks.
A domain-specific language (DSL) is a computer language that is specialized to a particular application domain. A developer can develop applications to perform various tasks, such as “copy”, “file”, “command” and “ping,” without having knowledge of the underlying programming code required to perform these tasks. Each task can include calls to one or more modules that are used to perform the task. The one or more modules can include script to perform an operation required by the task.
The described embodiments and the advantages thereof may best be understood by reference to the following description taken in conjunction with the accompanying drawings. These drawings in no way limit any changes in form and detail that may be made to the described embodiments by one skilled in the art without departing from the spirit and scope of the described embodiments.
A domain-specific language (DSL) is a computer language that is specialized to a particular application domain. A developer can develop applications to perform various tasks, such as “copy”, “file”, “command” and “ping,” by using basic commands written in the DSL language without having knowledge of the underlying programming code required to perform these tasks. The commands written in the DSL language for a task can include calls to one or more modules that are used to perform the task. The one or more modules can include script to perform an operation required by the task. One or more tasks may be arranged in a data structure, such as an abstract syntax tree, where each task is represented by a node in the abstract syntax tree. The abstract syntax tree may be a tree representation of the abstract syntactic structure of the commands written in the DSL language.
In embodiments, the one or more modules of the task may include script in various programming languages. For example, the one or more modules of the task may include script in JAVA, JavaScript, Perl, Python, etc. The modules used by the DSL task may be located in libraries that are stored at remote servers based on the programming language of the module. For example, modules using the JAVA programming language may be located in a library on a JAVA server, while modules using the Python programming language may be located in a library on a Python server.
During the development of an application using a DSL, a developed may wish to identify and address performance issues (e.g., errors, incorrect outputs, etc.) of one or more tasks of the application. To identify such issues, a developer may execute the one or more tasks of the application using a DSL debugger. The DSL debugger may execute the commands of the task that are written in the DSL language and generate DSL debugging information that may be used to identify performance issues with the task.
However, as previously described, the modules of the task may be written in a programming language that is different than the DSL language. Furthermore, the modules of the task may be located in a library of a remote server based on the programming language of the module. Since the modules of a task are written in a programming language that is different than the DSL language, the DSL debugger is unable to debug the modules of the task. Accordingly, to debug a module of a task, a developer is required to pause the execution of the task using the DSL debugger, locate a module debugger for the module on a remote server, identify input values for the module from the task, enter the input values for the module, execute the module using the module debugger, receive the output values of executing the module using the module debugger, entering the output values into the task and resuming execution of the task using the DSL debugger. This process may be repeated for each module of the task, resulting in a process that is tedious, time consuming and an inefficient use of computing resources of a computing system. Furthermore, by requiring a developer to manually enter input/output values for each module, there is a potential for incorrect values to be entered for a module. The entering of incorrect values into a module may result in additional debugging operations being performed on the module using the correct values, which uses additional computing resources of the computing system.
Aspects of the present disclosure address the above-noted and other deficiencies by using a processing logic to perform a multi-level debugging operation on a task using a DSL language. In embodiments, a task may be executed using a DSL debugger. The task may include one or more modules. Each module may include script in a programming language to perform operations associated with the task. During execution of the task, the processing logic may identify a breakpoint in the task. The breakpoint may serve as an indicator to the processing logic to pause the execution of the task. In embodiments, the breakpoint may correspond to a location of the call to the module in the DSL command.
Upon pausing the execution of the task, the processing logic may identify a module debugger that is associated with the module of the task. In embodiments, the module debugger may be identified based on the programming language of the module. For example, if a module uses Python programming language, the processing logic may identify a Python debugger that is associated with the module. Once a module debugger has been identified, the processing logic may transmit task debugging data to the module debugger. The task debugging data can include input values for the module that are to be used by the module debugger when executing the module.
The processing logic may receive module debugging data that is generated by the module debugger when executing the module. The module debugging data may include output values from executing the module that are to be used by the task. Upon receiving the module debugging data, the processing logic may generate multi-level debugging data that includes the task debugging data generated by executing the task using the DSL debugger and the module debugging data generated by the module debugger. In some embodiments, upon generating the multi-level debugging data, the processing logic may resume executing the task using the DSL debugger. In embodiments, the processing logic may not resume executing the task using the DSL debugger until an input is received.
Accordingly, by identifying a module debugger associated with a module of a task, providing task debugging information to the module debugger and receiving module debugging information, the efficiency and ease of debugging tasks using a DSL is greatly improved. By no longer requiring a developer to identify the appropriate module debugger and manually enter the input/output values of the module debugger, less computing resources may be dedicated to performing debugging operations and the results may be more reliable, improving the performance of the computing system.
As illustrated in
Each component may include hardware such as processing devices (e.g., processors, central processing units (CPUs), memory (e.g., random access memory (RAM), storage devices (e.g., hard-disk drive (HDD), solid-state drive (SSD), etc.), and other hardware devices (e.g., sound card, video card, etc.). The servers 110, 150a-n may comprise any suitable type of computing device or machine that has a programmable processor including, for example, server computers, desktop computers, laptop computers, tablet computers, smartphones, set-top boxes, etc. In some examples, DSL server 110 and module servers 150a-n may comprise a single machine or may include multiple interconnected machines (e.g., multiple servers configured in a cluster). DSL server 110 and module servers 150a-n may be implemented by a common entity/organization or may be implemented by different entities/organizations. For example, DSL server 110 may be operated by a first company/corporation and DSL server 110 and module servers 150a-n may be operated by a second company/corporation. Each server may execute or include an operating system (OS), as discussed in more detail below. The OS of a server may manage the execution of other components (e.g., software, applications, etc.) and/or may manage access to the hardware (e.g., processors, memory, storage devices etc.) of the computing device.
In embodiments, processing device 120 may execute a DSL debugging component 127 and a multi-level debugging component 129. The DSL debugging component may perform debugging operations on one or more tasks utilizing a DSL. The multi-level debugging component 129 may identify one or more modules utilized by the task. The multi-level debugging component 129 may further identify one or more module servers for the one or more modules of the task in view of the one or more programming languages of the one or more modules of the task. Further details regarding multi-level debugging component 129 will be discussed at
Referring to
At block 220, the processing logic identifies a module debugger associated with a module of the task. In embodiments, the processing logic may identify the module debugger in response to identifying a breakpoint in the script of the task. In some embodiments, the processing logic may identify the module debugger in view of the programming language of the module of the task. For example, if the module uses Python programming language, then the processing logic may identify a Python debugger for the module.
At block 230, the processing logic transmits task debugging data associated with the execution of the task using the DSL debugger to the identified module debugger. In embodiments, the task debugging data may include a location of the module, the programming language of the module and input values for the module. For example, the task debugging data may include a location, such as a file path, for the module within a library on the module server. The task debugging data may further include that the programming language of the module is Python as well as input values, such as a name or state of the task.
At block 240, the processing logic receives module debugging data from the identified module debugger. For example, the processing logic may receive a name and path of the module from the identified module or a line number corresponding a location in the task that the debugger is currently executing the script. At block 250, the processing logic generates multi-level debugging data that includes the task debugging data generated by the DSL debugger and the module debugging data received from the module debugger. In embodiments, the multi-level debugging data may be depending on the task and/or modules being used. For example, if the task creates a directory, the multi-level debugging data may include arguments (e.g., names, paths, etc.) used to create the directory. In another example, if the task initiates a service, the multi-level debugging data may include the name of the service and desired status (e.g., running, stopped, etc.).
In some embodiments, upon generating the multi-level debugging data, the processing logic may resume executing the task using the DSL debugger. In embodiments, the processing logic may not resume executing the task using the DSL debugger until an input is received. For example, upon generating the multi-level debugging data, the processing logic may not resume executing the task to allow a developer to resolve issues with the task that are identified in view of the generated multi-level debugging data prior to resuming execution of the task. Once the developer has resolved the issues, the developer may manually resume execution of the task by providing an input to the processing logic.
Referring to
In embodiments, upon determining that the triggering event has occurred, the processing logic may insert a breakpoint into the script of the task. As previously described, the breakpoint may indicate that the processing logic is to pause the execution of the task. In embodiments, the breakpoint may be inserted at a location in the script of the task in view of the occurrence of the triggering event. For example, if a particular step or call to a module causes the occurrence of the triggering event, then the breakpoint may be inserted in the script at that particular step or call to the module.
At block 330, in response to determining that the triggering event has occurred during execution of the task, the processing logic executes the task using a DSL debugger to generate task debugging data. At block 340, the processing logic transmits the generated task debugging data to a module debugger associated with a module of the task. In embodiments, transmitting the generated task debugging data to the module debugger may include identifying a module debugger associated with the module in view of the programming language of the module, as previously described.
At block 350, the processing logic receives module debugging data from the module debugger. At block 360, the processing logic generates multi-level debugging data that includes the task debugging data generated by the DSL debugger and the module debugging data received from the module debugger.
Referring to
DSL server 505 is operatively coupled to module servers 525, 530, 535 via a network (not shown). Each of module servers 525, 530 and 535 may include a library of modules that use a particular programming language. Each of module servers 525, 530 and 535 may further include a module debugger for the particular programming language of that particular server. Referring to
As previously described, the processing device of DSL server 505 may identify one or more module debuggers associated with modules of the task in view of the programming languages of the modules. Since module 515 utilizes programming language A and module 520 utilizes programming language C, the processing device may identify language A debugger 527 of module server 525 and language C debugger 537 of module server 535.
Upon identifying the module debuggers, the processing device may transmit task debugging data to module server 525 for debugging of module 515 by language A debugger 527. In embodiments, task debugging data may include input values for module 515, a location of module 515, input values for module 515 and the programming language (e.g., language A) of module 515. The processing device may also transmit task debugging data to module server 535 for debugging of module 520 by language C debugger 537. In embodiments, task debugging data may include input values for module 520, a location of module 520 and the programming language (e.g., language C) of module 520. After executing module 515 using the language A debugger 527 and the task debugging data, module server 525 may transmit module debugging data for module 515 to DSL server 505. After executing module 520 using the language C debugger 537 and the task debugging data, module server 535 may transmit module debugging data for module 520 to DSL server 505.
The module debugger identification component 622 may determine a programming language of a module utilized by a task. The module debugger identification component 622 may identify a module debugger for the module in view of the determined programming language. The debugging data transmission component 624 may transmit task debugging data to the module debugger identified by the module debugger identification component 622. The debugging data transmission component 624 may receive module debugging data from the module debugger. The debugging data generation component 626 may generate multi-level debugging data in view of the task debugging data and the module debugging data.
The exemplary computer system 700 includes a processing device 702, a main memory 704 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM), a static memory 706 (e.g., flash memory, static random access memory (SRAM), etc.), and a data storage device 718, which communicate with each other via a bus 730. Any of the signals provided over various buses described herein may be time multiplexed with other signals and provided over one or more common buses. Additionally, the interconnection between circuit components or blocks may be shown as buses or as single signal lines. Each of the buses may alternatively be one or more single signal lines and each of the single signal lines may alternatively be buses.
Processing device 702 represents one or more general-purpose processing devices such as a microprocessor, central processing unit, or the like. More particularly, the processing device may be complex instruction set computing (CISC) microprocessor, reduced instruction set computer (RISC) microprocessor, very long instruction word (VLIW) microprocessor, or processor implementing other instruction sets, or processors implementing a combination of instruction sets. Processing device 702 may also be one or more special-purpose processing devices such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), network processor, or the like. The processing device 702 is configured to execute processing logic 726, which may be one example of multi-level debugging component 129 of
The data storage device 718 may include a machine-readable storage medium 728, on which is stored one or more set of instructions 722 (e.g., software) embodying any one or more of the methodologies of functions described herein, including instructions to cause the processing device 702 to execute multi-level debugging component 129. The instructions 722 may also reside, completely or at least partially, within the main memory 704 or within the processing device 702 during execution thereof by the computer system 700; the main memory 704 and the processing device 702 also constituting machine-readable storage media. The instructions 722 may further be transmitted or received over a network 720 via the network interface device 708.
The machine-readable storage medium 728 may also be used to store instructions to perform a method for multi-level task debugging, as described herein. While the machine-readable storage medium 728 is shown in an exemplary embodiment to be a single medium, the term “machine-readable storage medium” should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, or associated caches and servers) that store the one or more sets of instructions. A machine-readable medium includes any mechanism for storing information in a form (e.g., software, processing application) readable by a machine (e.g., a computer). The machine-readable medium may include, but is not limited to, magnetic storage medium (e.g., floppy diskette); optical storage medium (e.g., CD-ROM); magneto-optical storage medium; read-only memory (ROM); random-access memory (RAM); erasable programmable memory (e.g., EPROM and EEPROM); flash memory; or another type of medium suitable for storing electronic instructions.
The preceding description sets forth numerous specific details such as examples of specific systems, components, methods, and so forth, in order to provide a good understanding of several embodiments of the present disclosure. It will be apparent to one skilled in the art, however, that at least some embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known components or methods are not described in detail or are presented in simple block diagram format in order to avoid unnecessarily obscuring the present disclosure. Thus, the specific details set forth are merely exemplary. Particular embodiments may vary from these exemplary details and still be contemplated to be within the scope of the present disclosure.
Additionally, some embodiments may be practiced in distributed computing environments where the machine-readable medium is stored on and or executed by more than one computer system. In addition, the information transferred between computer systems may either be pulled or pushed across the communication medium connecting the computer systems.
Embodiments of the claimed subject matter include, but are not limited to, various operations described herein. These operations may be performed by hardware components, software, firmware, or a combination thereof.
Although the operations of the methods herein are shown and described in a particular order, the order of the operations of each method may be altered so that certain operations may be performed in an inverse order or so that certain operation may be performed, at least in part, concurrently with other operations. In another embodiment, instructions or sub-operations of distinct operations may be in an intermittent or alternating manner.
The above description of illustrated implementations of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific implementations of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. The words “example” or “exemplary” are used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as “example” or “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, use of the words “example” or “exemplary” is intended to present concepts in a concrete fashion. As used in this application, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or”. That is, unless specified otherwise, or clear from context, “X includes A or B” is intended to mean any of the natural inclusive permutations. That is, if X includes A; X includes B; or X includes both A and B, then “X includes A or B” is satisfied under any of the foregoing instances. In addition, the articles “a” and “an” as used in this application and the appended claims should generally be construed to mean “one or more” unless specified otherwise or clear from context to be directed to a singular form. Moreover, use of the term “an embodiment” or “one embodiment” or “an implementation” or “one implementation” throughout is not intended to mean the same embodiment or implementation unless described as such. Furthermore, the terms “first,” “second,” “third,” “fourth,” etc. as used herein are meant as labels to distinguish among different elements and may not necessarily have an ordinal meaning according to their numerical designation.
It will be appreciated that variants of the above-disclosed and other features and functions, or alternatives thereof, may be combined into may other different systems or applications. Various presently unforeseen or unanticipated alternatives, modifications, variations, or improvements therein may be subsequently made by those skilled in the art which are also intended to be encompassed by the following claims. The claims may encompass embodiments in hardware, software, or a combination thereof
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Number | Date | Country | |
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20200167264 A1 | May 2020 | US |