Multi-mode class-D amplifiers

Abstract

Multi-mode class-D amplifiers are disclosed. An example multi-mode class-D amplifier circuit having an analog input and a digital input disclosed herein comprises a single-mode class-D amplifier having an amplifier input, a smoothing filter having a filter input and a filter output, wherein the filter output is electronically coupled to the amplifier input, and a multiplexer electronically coupled to the filter input to select between at least one of the analog input and the digital input of the multi-mode class-D amplifier circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of an example prior art single-mode class-D amplifier circuit.

FIGS. 2A-2B illustrate example performance degradations associated with applying a digital input signal to the example prior art single-mode class-D amplifier circuit of FIG. 1.

FIG. 3 is a block diagram of an example multi-mode class-D amplifier capable of amplifying an analog input signal or a digital input signal.

FIG. 4 is a block diagram of a first example multi-mode class-D amplifier circuit to implement the example multi-mode class-D amplifier of FIG. 3.

FIG. 5 illustrates example total harmonic distortion performance characteristics for the first example multi-mode class-D amplifier circuit of FIG. 4 as a function of selected circuit parameters.

FIG. 6 is a block diagram of a second example multi-mode class-D amplifier circuit to implement the example multi-mode class-D amplifier of FIG. 3.

FIG. 7 is a block diagram of a pulse width modulator circuit that may be used to generate the digital input signal for the example multi-mode class-D amplifier of FIG. 3.

FIG. 8 is a block diagram of a pulse code modulator circuit that may be used to generate the digital input signal for the example multi-mode class-D amplifier of FIG. 3.

FIG. 9 is a block diagram of an example integrated audio codec based on the example multi-mode class-D amplifier of FIG. 3

FIG. 10 is a flowchart representative of an example process to implement the example multi-mode class-D amplifier of FIG. 3 and/or the example integrated audio codec of FIG. 9.

FIG. 11 is a flowchart representative of an example process to obtain the digital input signal to be processed by the example process of FIG. 10.

FIGS. 12A-12B illustrates example performance characteristics exhibited by the second example multi-mode class-D amplifier circuit 600 of FIG. 6 that may be used to implement the example multi-mode class-D amplifier of FIG. 3.

FIG. 13 is a block diagram of an example computer that may be used to implement the example processes of FIGS. 10 and/or 11 to implement the example multi-mode class-D amplifier of FIG. 3 and/or the example integrated audio codec of FIG. 9.

Claims

1. A multi-mode class-D amplifier circuit having an analog input and a digital input, the multi-mode class-D amplifier circuit comprising: a single-mode class-D amplifier having an amplifier input;a smoothing filter having a filter input and a filter output, wherein the filter output is electronically coupled to the amplifier input; anda multiplexer electronically coupled to the filter input to select between at least one of the analog input and the digital input of the multi-mode class-D amplifier circuit.

2. A multi-mode class-D amplifier circuit as defined in claim 1 wherein the single-mode class-D amplifier is configured to draw power directly from a battery power source powering the multi-mode class-D amplifier circuit.

3. A multi-mode class-D amplifier circuit as defined in claim 1 wherein the single-mode class-D amplifier comprises: a pulse width modulation generator to generate a pulse width modulated signal; anda power output stage configured to amplify the pulse width modulated signal.

4. A multi-mode class-D amplifier circuit as defined in claim 1 wherein the single-mode class-D amplifier comprises an integration stage coupled to the analog amplifier input and configured to implement a feedback loop based on an amplifier output of the single-mode class-D amplifier.

5. A multi-mode class-D amplifier circuit as defined in claim 1 wherein the smoothing filter comprises a two-pole low-pass filter.

6. A multi-mode class-D amplifier circuit as defined in claim 5 wherein the two-pole low-pass filter is configured to suppress a digital carrier frequency associated with the digital circuit input of the multi-mode class-D amplifier circuit.

7. A multi-mode class-D amplifier circuit as defined in claim 1 wherein the smoothing filter comprises: a programmable gain amplifier; anda passive network electronically coupled to the programmable gain amplifier.

8. A multi-mode class-D amplifier circuit as defined in claim 1 wherein the single-mode class-D amplifier comprises an analog ramp generator and the smoothing filter is configured to reduce at least one of a frequency mismatch or a phase mismatch between an analog ramp frequency corresponding to the analog ramp generator and a digital carrier frequency corresponding to the digital circuit input.

9. A multi-mode class-D amplifier circuit as defined in claim 1 wherein the digital input is configured to accept at least one of a natural pulse width modulated input signal, a uniform pulse width modulated input signal or pulse code modulated input symbols.

10. A multi-mode class-D amplifier circuit as defined in claim 9 wherein the single-mode class-D amplifier comprises an analog ramp generator having an analog ramp frequency asynchronous to a digital carrier frequency associated with the at least one of the natural pulse width modulated input signal, the uniform pulse width modulated input signal or the pulse code modulated input symbols.

11. An integrated audio codec comprising: a multi-mode class-D amplifier circuit, wherein the multi-mode class-D amplifier circuit comprises: a single-mode class-D amplifier;a smoothing filter electronically coupled to the single-mode class-D amplifier; anda multiplexer electronically coupled to the smoothing filter to select between at least one of an analog audio source and a digital audio source in the integrated audio codec;an analog audio codec input to provide the analog audio source for the multi-mode class-D amplifier circuit; anda digital audio codec input to provide the digital audio source for the multi-mode class-D amplifier circuit, wherein the digital audio codec input is configured to accept at least one of pulse code modulated symbols or a pulse width modulated signal.

12. An integrated audio codec as defined in claim 11 wherein the digital audio codec input is configured to accept pulse code modulated symbols and further comprising a sigma delta modulator to convert the pulse code modulated symbols to a multi-level output signal.

13. An integrated audio codec as defined in claim 12 further comprising: a sinc filter to filter the multi-level output signal; anda digital-to-analog converter to process the filtered multi-level output signal.

14. An integrated audio codec as defined in claim 11 wherein the digital audio codec input is configured to accept the pulse width modulated signal and wherein the pulse width modulated signal is generated by a pulse width modulation generator external to the integrated audio codec.

15. A method to amplify an analog signal and a digital signal, the method comprising: selecting between at least one of the analog signal and the digital signal;applying the selected one of the analog signal and the digital signal to a smoothing filter to generate a filtered signal; andgenerating a pulse width modulated signal based on the filtered signal.

16. A method as defined in claim 15 wherein the smoothing filter comprises a two-pole low pass filter.

17. A method as defined in claim 15 wherein the smoothing filter comprises: a programmable gain amplifier; anda passive network electronically coupled to the programmable gain amplifier.

18. A method as defined in claim 15 wherein the digital signal corresponds to at least one of a natural pulse width modulated input signal, a uniform pulse width modulated input signal or pulse code modulated input symbols.

19. A method as defined in claim 18 wherein generating the pulse width modulated signal comprises generating an analog ramp signal having an analog ramp frequency asynchronous to a digital carrier frequency associated with the at least one of the natural pulse width modulated input signal, the uniform pulse width modulated input signal or the pulse code modulated input symbols.

20. An article of manufacture storing machine readable instructions which, when executed, cause a machine to: select between at least one of an analog signal and a digital signal;apply the selected one of the analog signal and the digital signal to a smoothing filter to generate a filtered signal; andgenerate a pulse width modulated signal based on the filtered signal.