Joshi, Robindra B. et al., “WP 4.2: A 100 MHz, 5MBaud QAM Decision-Feedback Equalizer for Digital Television Applications,”1994 IEEE International Solid-State Circuits Conference, ISSCC94/Session 4/Video and Communication Signal Processors/Paper WP 4.2, pp. 68-69. |
Martin, James et al., “Local Area Networks Architectures and Implementations,” Second Edition, 1994, pp. 167-170, 204, Prentice Hall, Englewood Cliffs, New Jersey. |
Razavi, Behzad, “Monolithic Phase-Locked Loops and Clock Recovery Circuits,” 1996, pp. 2-7, Tutorial, IEEE Press, New York, New York. |
Anderson, John B., “Digital Transmission Engineering, 1999,” pp. 193-199, Synchronization—Chapter 4,, IEEE Press, Prentice Hall, New Jersey. |
Gardner, Floyd M., “Interpolation in Digital Modems-Part 1: Fundamentals,” IEEE Transactions on Communications, Mar. 1993, pp. 501-507, vol. 41, No. 3, IEEE. |
Harris, Fred, “On the Relationship Between Multirate Polyphase FIR Filters and Windowed , Overlapped, FFT Processing,” Proceedings of the Twenty-Third Asilomar Conference on Signals, Systems and Computers, Oct. 30-Nov. 1, 1989, pp. 485-488, Maple Press. |
Harris, Fred, et al., “Modified Polyphase Filter Structure for Computing Interpolated Data As Successive Differential Corrections,” Proceedings of the 1991 International Symposium on Circuits and Systems, Jun. 11-14, 1991, pp. 2753-2756, Singapore. |
Crochiere, Ronald E., et al., “Multirate Digital Signal Processing,” 1983, Prentice-Hall, Englewood Cliffs, New Jersey. |