Patent Application
20060131961
The present invention relates to a multi-output power supply circuit having multiple outputs including outputs that can be step-up/down controlled with respect to an input DC voltage.
As a multi-output power supply circuit, to which power is supplied from an input DC power supply and from which multiple power supply voltages are output to various electronic circuits, a multi-output power supply circuit that outputs constant output voltages even in the case that an input DC voltage changes in the range from a voltage higher than each output voltage to a voltage lower than the output voltage has been developed in recent years. This kind of conventional multi-output power supply circuit is disclosed in Japanese Official Gazette of Unexamined Patent Publication No. Hei 8-205528, for example.
As shown in
In the first step-up circuit 200, one terminal of the second choke coil 201 is connected to the first capacitor 1.04, and the other terminal of the second choke coil 201 is connected to the drain of the N-channel second FET 202. The source of the second FET 202 is grounded. The anode of the second diode 203 is connected to the connection point of the second choke coil 201 and the second FET 202. One electrode of the second capacitor 204 is connected to the cathode of the second diode 203, and the other electrode of the second capacitor 204 is grounded. The second capacitor 204 outputs an output DC voltage Vo2. The second control circuit 205 carries out control to open/close the second FET 202 by applying a pulse voltage to the gate of the second FET 202 to maintain the output DC voltage Vo2 at a desired voltage.
The second step-up circuit 300 is connected in parallel with the first step-up circuit 200 and configured so as to be similar to the first step-up circuit 200. In the second step-up circuit 300, the output V1 of the voltage limiting circuit 100 is input, and an output DC voltage Vo3 is output from the third capacitor 304. The third control circuit 305 carries out control to open/close the third FET 302 by applying a pulse voltage to the gate of the third FET 302 to maintain the output DC voltage Vo3 at a desired voltage.
The operation of the conventional multi-output power supply circuit shown in
V1=Vi×D1 (1)
In other words, as the duty ratio D1 is made larger, the voltage V1 becomes higher. Conversely, as the duty ratio D1 is made smaller, the voltage V1 becomes lower. The first control circuit 105 adjusts the duty ratio D1 in response to the change in the input DC voltage Vi and the change in load so that the voltage V1 becomes equal to the limit voltage Vlim having been set beforehand.
Next, in the case that the input DC voltage Vi is equal to or less than the limit voltage Vlim, the duty ratio D1 is 100side %, the first FET 101 is closed at all times, and a voltage nearly equal to the input DC voltage Vi is generated across the first capacitor 104.
The output V1 of the voltage limiting circuit 100 is the input voltage of the first step-up circuit 200. In the first step-up circuit 200, the second FET 202 is opened/closed by the drive signal from the second control circuit 205. In the period during which the second FET 202 is closed, the input DC voltage Vi is applied to the second choke coil 201. In the period during which the second FET 202 is open, the second diode 203 is turned ON by the counter-electromotive force of the second choke coil 201, and the second capacitor 204 is charged. When it is herein assumed that a duty ratio D2 is the ratio of the time of the closed state of the second FET 202 with respect to the repetition cycle of the drive signal supplied to the second FET 202, the output DC voltage Vo2 generated across the second capacitor 204 is represented by the relationship given by Expression (2) described below.
Vo2=V1/(1−D2) (2)
In other words, the output DC voltage Vo2 is higher than the voltage V1 across the first capacitor 104. As the duty ratio D2 is made larger, the output DC voltage Vo2 becomes higher. Conversely, as the duty ratio D2 is made smaller, the output DC voltage Vo2 becomes lower. The second control circuit 205 adjusts the duty ratio D2 in response to the change in the input/output conditions, whereby the first step-up circuit 200 operates so that the output DC voltage Vo2 becomes the desired voltage.
Similarly, the third control circuit 305 opens/closes the third FET 302 to adjust its duty ratio D3, whereby the second step-up circuit 300 operates so that the output DC voltage Vo3 becomes the desired voltage.
Multi-output power supply circuits are used as power supplies that are built in various kinds of electronic apparatuses. Hence, making such multi-output power supply circuits smaller in size and higher in efficiency is a very important issue in this field. In the configuration of the conventional multi-output power supply circuit described above, the voltage limiting circuit 100, to which the input DC voltage Vi is input and from which the DC voltage V1 being equal to or less than the input DC voltage Vi is output, is a step-down circuit, and this step-down circuit is connected in series with the step-up circuits. For this reason, the conventional multi-output power supply circuit has a problem of being difficult to settle the issue of downsizing because of the use of numerous components and also has a problem of being unable to generate the input DC voltage Vi having a desired voltage at high power conversion efficiency.
The present invention is intended to solve the conventional problems described above and to provide a multi-output power supply circuit capable of carrying out desired step-up/down control for an input DC voltage and capable of generating constant outputs at high power conversion efficiency using a simple configuration having a limited number of components.
For the purpose of attaining the objects described above, a multi-output power supply circuit in accordance with a first aspect of the present invention comprises:
a switching circuit having a series circuit of a high-side switch and a low-side switch, connected in parallel with an input DC power supply, and a step-down control circuit for alternately opening/closing the high-side switch and the low-side switch, and
multiple step-up circuits each connected to the connection point of the high-side switch and the low-side switch.
The multi-output power supply circuit in accordance with the first aspect of the present invention, configured as described above, can carry out desired step-up/down control for an input DC voltage and can generate constant outputs at high power conversion efficiency using a simple configuration having a limited number of components.
A multi-output power supply circuit in accordance with a second aspect of the present invention is characterized in that the step-up circuit in accordance with the first aspect comprises:
an inductor, one terminal of which is connected to the connection point of the high-side switch and the low-side switch,
a step-up switch and a step-up rectifier connected to the other terminal of the inductor,
smoothing means, connected to the step-up rectifier, for outputting an output DC voltage, and
a step-up control circuit for controlling the ON/OFF operation of the step-up switch so as to control the output DC voltage. The multi-output power supply circuit in accordance with the second aspect of the present invention, configured as described above, can securely carry out step-up/down control for the input DC voltage using a simple configuration.
A multi-output power supply circuit in accordance with a third aspect of the present invention is characterized in that the step-down control circuit and the step-up control circuit in accordance with the first aspect are configured so as to drive the high-side switch and the low-side switch, and the step-up switch, respectively, at the same switching frequency. The multi-output power supply circuit in accordance with the third aspect of the present invention, configured as described above, can carry out desired step-up/down control and can securely generate constant outputs using a simple configuration.
A multi-output power supply circuit in accordance with a fourth aspect of the present invention is characterized in that the step-down control circuit in accordance with the first aspect is configured that the ratio of the ON time with respect to the switching cycle of the high-side switch is set so as to be equal to or less than the ratio of the minimum value of the output DC voltages output from the multiple step-up circuits with respect to the input voltage output from the input DC power supply. The multi-output power supply circuit in accordance with the fourth aspect of the present invention, configured as described above, can carry out desired step-up/down control using a simple configuration.
A multi-output power supply circuit in accordance with a fifth aspect of the present invention comprises:
a switching circuit having a series circuit of a high-side switch and a low-side switch, connected in parallel with an input DC power supply, and a step-down control circuit for alternately opening/closing the high-side switch and the low-side switch,
a smoothing circuit, connected to the connection point of the high-side switch and the low-side switch, for outputting a first output DC voltage, and
at least one step-up circuit connected to the connection point of the high-side switch and the low-side switch.
The multi-output power supply circuit in accordance with the fifth aspect of the present invention, configured as described above, can carry out desired step-down control and step-up/down control and can securely generate desired multiple constant outputs using a simple configuration.
A multi-output power supply circuit in accordance with a sixth aspect of the present invention is characterized in that the step-up circuit in accordance with the fifth aspect comprises:
an inductor, one terminal of which is connected to the connection point of the high-side switch and the low-side switch,
a step-up switch and a step-up rectifier connected to the other terminal of the inductor,
smoothing means, connected to the step-up rectifier, for outputting an output DC voltage, and
a step-up control circuit for controlling the ON/OFF operation of the step-up switch so as to control the output DC voltage. The multi-output power supply circuit in accordance with the sixth aspect of the present invention, configured as described above, can carry out desired step-up/down control using a simple configuration.
A multi-output power supply circuit in accordance with a seventh aspect of the present invention is characterized in that the smoothing circuit in accordance with the fifth aspect comprises an inductor, one terminal of which is connected to the connection point of the high-side switch and the low-side switch, and a capacitor connected to the other terminal of the inductor so as to output the first output DC voltage from across the capacitor. The multi-output power supply circuit in accordance with the seventh aspect of the present invention, configured as described above, can carry out desired step-down control using a simple configuration.
A multi-output power supply circuit in accordance with an eighth aspect of the present invention is characterized in that the step-down control circuit in accordance with the fifth aspect controls the ON/OFF operation of the high-side switch and the low-side switch so as to control the first output DC voltage. The multi-output power supply circuit in accordance with the eighth aspect of the present invention, configured as described above, can carry out desired step-up/down control for the input DC voltage using a simple configuration.
A multi-output power supply circuit in accordance with a ninth aspect of the present invention is characterized in that the step-down control circuit and the step-up control circuit in accordance with the sixth aspect are configured so as to drive the high-side switch and the low-side switch, and the step-up switch, respectively, at the same switching frequency. The multi-output power supply circuit in accordance with the ninth aspect of the present invention, configured as described above, can carry out desired step-up/down control for the input DC voltage using a simple configuration.
The multi-output power supply circuit in accordance with the present invention can obtain desired multiple outputs that can be step-up/down controlled with respect to an input DC voltage using a limited number of components.
Furthermore, the multi-output power supply circuit in accordance with the present invention can obtain a desired output that can be step-down controlled and at least one desired output that can be step-up/down controlled with respect to an input DC voltage.
While the novel features of the invention are set forth particularly in the appended claims, the invention, both as to organization and content, will be better understood and appreciated, along with other objects and features thereof, from the following detailed description taken in conjunction with the drawings.
It will be recognized that some or all of the figures are schematic representations for purposes of illustration and do not necessarily depict the actual relative sizes or locations of the elements shown.
Preferred embodiments of a multi-output power supply circuit in accordance with the present invention will be described below referring to the accompanying drawings.
As shown in
The switching circuit 10 comprises a high-side switch 11, a low-side switch 12 and a step-down control circuit 13. The high-side switch 11 is formed of a P-channel FET, the source of which is connected to the input DC power supply 1. The low-side switch 12 is formed of an N-channel FET, the drain of which is connected to the drain of the high-side switch 11 and the source of which is grounded. The step-down control circuit 13 carries out control to alternately open/close the high-side switch 11 and the low-side switch 12 in response to a predetermined switching cycle T and a predetermined pulse width by applying a pulse voltage to the gates of the high-side switch 11 and the low-side switch 12. The connection point of the high-side switch 11 and the low-side switch 12 is the output terminal of the switching circuit 10.
In the first step-up circuit 20, one terminal of an inductor 21 is connected to the output terminal of the switching circuit 10. A step-up switch 22 is formed of an N-channel FET, the drain of which is connected to the other terminal of the inductor 21 and the source of which is grounded. The anode of a step-up rectifier 23 is connected to the connection point of the inductor 21 and the step-up switch 22. A smoothing means 24 is formed of a capacitor, one electrode of which is connected to the cathode of the step-up rectifier 23 and the other electrode of which is grounded. An output DC voltage Vo2 is output from the smoothing means 24. A step-up control circuit 25 carries out control to open/close the step-up switch 22 by applying a pulse voltage to the gate of the step-up switch 22 to maintain the output DC voltage Vo2 at a desired constant voltage. As described above, the first step-up circuit 20 comprises the inductor 21, the step-up switch 22, the step-up rectifier 23, the smoothing means 24 and the step-up control circuit 25.
Like the first step-up circuit 20, the second step-up circuit 30 comprises a inductor 31, a step-up switch 32, a step-up rectifier 33, a smoothing means 34 and a step-up control circuit 35. The second step-up circuit 30 is connected in parallel with the first step-up circuit 20. The output of the switching circuit 10 is input to the second step-up circuit 30, and an output DC voltage Vo3 is output from the smoothing means 34.
First, as shown in (a) of
Next, as shown in (b) of
In the first embodiment, it is assumed that the timing of opening the step-up switch 22 after a predetermined time (Ton) has passed after the closing of the high-side switch 11 of the switching circuit 10 and of closing the step-up switch 22 using the step-up control circuit 25 is set to maintain the output DC voltage Vo2 at a desired constant voltage. The ratio of the ON time during which the step-up switch 22 is closed with respect to the switching cycle T is referred to as a duty ratio D2.
Within the switching cycle T, in time Ton during which both the high-side switch 11 and the step-up switch 22 are closed, the input DC voltage Vi is applied to the inductor 21. At this time, the current of the inductor 21 increases as indicated in (c) of
Vi×Ton+(Vi−Vo2)×T1=Vo2×Toff (3)
In the first embodiment, the times T, T1, Ton and Toff have relationships represented by Expressions (4) and (5).
Ton+T1=D1×T (4)
Toff+T1=(1−D2)×T (5)
Hence, an input/output relationship expression described below is obtained.
Vo2=Vi×D1/(1−D2) (6)
As understood from the input/output relationship expression, Expression (6) described above, as the duty ratios D1 and D2 are made larger, the output DC voltage Vo2 becomes higher. Conversely, as the duty ratios are made smaller, the output DC voltage Vo2 becomes lower. The step-down control circuit 13 fixes the duty ratio D1, and the step-up control circuit 25 adjusts the duty ratio D2 in response to the change in the input/output conditions. As a result, the first step-up circuit 20 operates so that the output DC voltage Vo2 becomes equal to the desired constant voltage.
Similarly, when it is assumed that the duty ratio at which the step-up control circuit 35 opens/closes the step-up switch 32 is D3, an input/output relationship expression, Expression (7) described below, is obtained with respect to the output DC voltage Vo3 of the second step-up circuit 30.
Vo3=Vi×D1/(1−D3) (7)
Hence, as the duty ratios D1 and D3 are made larger, the output DC voltage Vo3 becomes higher. Conversely, as the duty ratios are made smaller, the output DC voltage Vo3 becomes lower. The step-up control circuit 35 adjusts the duty ratio D3 in response to the change in the input/output conditions. As a result, the second step-up circuit 30 makes adjustment so that the output DC voltage Vo3 becomes equal to the desired constant voltage.
In the first embodiment, a case of having two outputs (Vo2 and Vo3) has been described. However, the number of outputs can be increased by adding circuits having configurations similar to those of the first step-up circuit 20 and the second step-up circuit 30. In operation principle, it does not matter how many outputs are used.
As described above, the multi-output power supply circuit in accordance with the first embodiment of the present invention is configured that the number of the inductors and the number of capacitors are each reduced by one in comparison with the conventional configuration shown in
The multi-output power supply circuit in accordance with the first embodiment is configured that the step-up control circuit 25 adjusts the duty ratio D2 of the step-up switch 22 and that the step-up control circuit 35 adjusts the duty ratio D3 of the step-up switch 32, thereby controlling the output DC voltages Vo2 and Vo3, respectively. However, the output DC voltages are limited by the input DC voltage Vi and the duty ratio D1. For example, even if the step-up control circuit 25 sets the duty ratio D2 at zero, the output DC voltage Vo2 is represented by Vo2=Vi×D1 according to the input/output relationship expression described above, and this becomes the lower limit value of the output DC voltage Vo2. The above description is similarly applicable to the output DC voltage Vo3. In other words, in the step-down control circuit 13, when the input DC voltage Vi has its maximum value Vimax, it is necessary to set the duty ratio D1 so that the Vimax×D1 becomes equal to or less than the minimum value of the desired output DC voltages.
Furthermore, in the first embodiment, it is assumed that the timing of opening the step-up switches 22 and 32 after a predetermined time (Ton) has passed after the closing of the high-side switch 11 of the switching circuit 10 and of closing the step-up switches 22 and 32 using the step-up control circuits 25 and 35 is set to maintain the output DC voltages Vo2 and Vo3 at the desired constant voltages.
In
On the other hand, the error between the output DC voltage Vo2 and the reference voltage of a voltage supply 257 is compared and amplified using an error amplifier 256. The error voltage output from the error amplifier 256 is compared with the voltage of a capacitor 259 using a comparator 258. The capacitor 259 is charged by a constant current using a current supply 260 and discharged to zero voltage using an N-channel FET 261 that is opened/closed by the inverted output of the RS latch 255. The output of the comparator 258 is connected to the reset terminal of the RS latch 255. In other words, when the step-up switch 22 is closed, the FET 261 is opened, and the capacitor 259 is charged from the zero voltage by the constant current. When its voltage reaches the error voltage, the output of the comparator 258 becomes the H level, and the RS latch 255 is reset. When the RS latch 255 is reset, the step-up switch 22 is opened, and the FET 261 is closed, thereby discharging the capacitor 259 to zero voltage.
As described above, the period of the closed state of the step-up switch 22 is a period from the predetermined time having passed after the voltage of the capacitor 251 has exceeded the reference voltage of the voltage supply 254 after the closing of the high-side switch 11 of the switching circuit 10 to the time when the voltage of the capacitor 259 has reached the error voltage. When the output DC voltage Vo2 becomes higher than the desired value, the error voltage lowers, the ON time during which the step-up switch 22 is closed is made shorter, and the output DC voltage Vo2 is lowered. Conversely, when the output DC voltage Vo2 becomes lower than the desired value, the error voltage rises, and the ON time of the step-up switch 22 is made longer, and the output DC voltage Vo2 is raised. In this way, the output DC voltage Vo2 is controlled so as to become constant and have the desired value.
The present invention is not limited to the control method described referring to
The configuration of the drive circuit 131 of the step-down control circuit 13A shown in
The potential at the source of the FET 138, that is, the voltage applied to the resistor 139, is equal to αVi. When it is assumed that the resistance value of the resistor 139 is r, the current flowing through the FET 138 is represented by αVi/r. Hence, this current serves as a charging current supplied to the capacitor 142 using the current mirror formed of the FET 140 and the FET 141. On the other hand, using the FET 145 that is opened/closed by the inverted signal of the drive signal, the capacitor 142 is short-circuited and discharged in the OFF period during which the high-side switch 11 is open. When the RS latch 133 is reset by the clock signal and the high-side switch 11 is closed, the FET 145 is opened, the capacitor 142 is charged by the current αVi/r. When the voltage of the capacitor 142 is raised and exceeds the reference voltage of the voltage supply 144, the output of the comparator 143 is inverted to the H level. As a result, the RS latch 133 is set, the drive signal has the H level, and the high-side switch 11 is opened. Therefore, when it is assumed that the capacitance of the capacitor 142 is C and that the reference voltage of the voltage supply 144 is E, the ON period during which the high-side switch 11 is closed is represented by C·E·r/(αVi). Hence, the duty ratio D1 is inversely proportional to the input DC voltage Vi.
Like the first embodiment described above, the second embodiment is described so as to be configured that the step-down control circuit 13A fixes the duty ratio D1 and that the high-side switch 11 and the low-side switch 12 are controlled so as to be opened/closed. However, by adjusting the duty ratio D1 so that Vi×D1 becomes constant, in other words, by adjusting the duty ratio D1 so that it is inversely proportional to the input DC voltage Vi, the step-down control circuit 13A can approximately stabilize Vi×D1 to a predetermined value being equal to or less than the minimum value of the desired output DC voltages in response to the change in the input DC voltage Vi.
The operation of the multi-output power supply circuit in accordance with the third embodiment will be described below.
First, since the high-side switch 11 and the low-side switch 12 are opened/closed alternately, the output terminal voltage V10 of the switching circuit 10 has a rectangular-wave voltage, the amplitude of which is the input DC voltage Vi. This rectangular-wave voltage is averaged using the smoothing circuit 14 and is output as the first output DC voltage Vo1. When it is assumed that the ratio of the ON time during which the high-side switch 11 is closed with respect to the switching cycle T is herein referred to as a duty ratio D1, the first output DC voltage Vo1 is represented by Expression (8) described below.
Vo1=Vi×D1 (8)
In other words, the switching circuit 10 and the smoothing circuit 14 constitute a step-down circuit.
Next, the second output DC voltage Vo2 that is output via the first step-up circuit 20 is represented by Expression (9) described below using the duty ratio D2 of the step-up switch 22.
Vo2=Vi×D1/(1−D2) (9)
In addition, the third output DC voltage Vo3 that is output via the second step-up circuit 30 is represented by Expression (10) described below using the duty ratio D3 of the step-up switch 32.
Vo3=Vi×D1/(1−D3) (10)
Hence, the second output DC voltage Vo2 and the third output DC voltage Vo3 are respectively similar to the output DC voltage Vo2 and the third output DC voltage Vo3 in the first embodiment described above. Since Vo1=Vi×D1, the output DC voltages Vo2 and Vo3 are represented by Expressions (11) and (12) described below, respectively.
Vo2=Vo1/(1−D2) (11)
Vo3=Vo1/(1−D3) (12)
As described above, the multi-output power supply circuit in accordance with the third embodiment of the present invention can control one step-down output and at least one step-up/down output.
The multi-output power supply circuit in accordance with the present invention is highly versatile and useful for a power supply having multiple outputs including outputs that can be step-up/down controlled with respect to an input DC voltage.
Although the present invention has been described with respect to its preferred embodiments in some detail, the disclosed contents of the preferred embodiments may change in the details of the structure thereof, and any changes in the combination and sequence of the component may be attained without departing from the scope and spirit of the claimed invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2004-336543 | Nov 2004 | JP | national |
