1985 IEEE International Solid-State Circuits Conference, SESSION III: Special Application Memories, "A 2K.times.9 Dual Port Memory", Barber et al., Feb. 1985, pp. 44-45 and 302. |
1990 Symposium on VLSI Circuits, "Pipelined, Time-Sharing Access Technique for a Highly Integrated Multi-Port Memory", Tsuneo Matsumura et al, NTT LSI Laboratories, Feb. 1990, pp. 107-108. |
IEEE Journal of Solid State Circuits, Endo et al. vol. 26, No. 4, Apr. 1991, "Pipelined, Time-Sharing Access Technique for an Integrated Multiport Memory", pp. 549-554. |
IEEE Journal of Solid-State Circuits, vol. 28, No. 3, Mar. 1993, "A 180-MHz 0.8-.mu.m BiCMOS Modular Memory Family of DRAM and Multiport SRAM", Allan L. Silburt et al, pp. 222-232. |
Fujitsu Sci. Tech. J., 24, 4, pp. 293-300 (Dec. 1988), "Self-Timed RAM: STRAM", C. Ohno. |