BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1A is a block diagram of a system that includes multiple nodes connected by links.
FIG. 1B is a block diagram of a single node.
FIG. 1C is a flowchart of a transmit process performed at a node.
FIG. 2 is a diagram of the structure of a hardware-level data packet.
FIG. 3 is a timing diagram of packet transmission between nodes.
FIG. 4 is a timing diagram of an error recovery scenario.
FIG. 5 is a timing diagram of an error recovery scenario.
FIG. 6 is a flowchart of a process performed at a node.
FIG. 7 is a diagram of the structure of a message.
FIG. 8 is a diagram of the structure of a message.