Claims
- 1. A device, comprising a radiation detector which includes:
an emitter contact layer; a multi-quantum-well structure having a first side in contact with said emitter contact layer and an opposing second side, said multi-quantum-well structure formed of alternating quantum well layers and barrier layers, each barrier layer being of a thickness that allows for a spatial overlap of wavefunctions of adjacent quantum wells to permit a tunneling therethrough from one quantum well to an adjacent quantum well; a blocking barrier layer in contact with said second side of said multi-quantum-well structure and having a thickness that substantially prohibits a tunneling therethrough; and a collector contact layer in contact with said blocking barrier layer.
- 2. The device as in claim 1, wherein each quantum well layer includes GaAs, and each of said barrier layers and said blocking barrier layer includes AlxGa1-xAs (0<x<1).
- 3. The device as in claim 2, wherein said emitter and said collector contact layers are formed of GaAs doped to be conductive.
- 4. The device as in claim 1, further comprising a cryogenic chamber that encloses said radiation detector and maintains a chamber temperature between 20K and 50K during operation of said radiation detector.
- 5. The device as in claim 1, wherein said multi-quantum-well structure has a structure to support a bound state and a quasibound state within a conduction band.
- 6. The device as in claim 1, wherein said multi-quantum-well structure has a structure to support a bound state and a quasibound state within a valence band.
- 7. The device as in claim 1, further comprising a CMOS readout circuit coupled to said collector contact layer to receive a signal caused by radiation absorbed by said multi-quantum-well structure.
- 8. A method, comprising:
configuring a multi-quantum-well structure with barrier layers that allow for carriers to tunnel through from one quantum well to an adjacent quantum well; coupling two ohmic contact layers electrically to said multi-quantum-well structure and using said layer to supply a voltage to generate an electrical signal when said multi-quantum-well structure absorbs radiation; and forming a blocking barrier layer between said multi-quantum-well structure and one of said ohmic contact layers that prevents carriers from tunneling through said blocking barrier layer to reach said one ohmic contact layer.
- 9. The method as in claim 8, further comprising causing said multi-quantum-well structure to operate under a cryogenic temperature to suppress a thermal contribution to a dark current.
- 10. The method as in claim 9, wherein the cryogenic temperature is above a temperature below which a CMOS circuit operates improperly due to impurity trapping of carriers in silicon.
- 11. The method as in claim 10, wherein the cryogenic temperature is above 20K.
- 12. A method, comprising:
providing a multi-quantum-well structure to allow for carrier tunneling through a barrier layer from one quantum well to an adjacent quantum well to provide carriers for optical absorption; and preventing any carrier tunneling from the multi-quantum-well structure to a contact layer that receives carriers from the multi-quantum-well structure to reduce a dark current.
- 13. The method as in claim 12, further comprising:
coupling a CMOS circuit to the multi-quantum-well structure to read an output; and maintaining a temperature of the multi-quantum-well structure and the CMOS circuit at a cryogenic to suppress a thermal contribution to the dark current.
- 14. The method as in claim 13, wherein the cryogenic temperature is above 20K.
LOW-BACKGROUND APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional Application No. 60/235,536 filed Sep. 26, 2000.
Provisional Applications (1)
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Number |
Date |
Country |
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60235536 |
Sep 2000 |
US |