This application is a non-provisional application of commonly-assigned U.S. Provisional Application Ser. No. 61/158,165, filed Mar. 6, 2009, entitled MULTI-STAGE POWER SUPPLY FOR A LOAD CONTROL DEVICE HAVING A LOW-POWER MODE, the entire disclosure of which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a power supply for a load control device, specifically, a multi-stage power supply for an electronic dimming ballast or light-emitting diode driver, where the power supply is able to operate in a low-power mode in which the power supply has a decreased power consumption.
2. Description of the Related Art
Typical load control devices are operable to control the amount of power delivered to an electrical load, such as a lighting load or a motor load, from an alternating-current (AC) power source. One example of a typical load control device is a standard dimmer switch, which comprises a bidirectional semiconductor switch, such as a triac, coupled in series between the power source and the load. The semiconductor switch is controlled to be conductive and non-conductive for portions of a half-cycle of the AC power source to thus control the amount of power delivered to the load. A “smart” dimmer switch comprises a microprocessor (or similar controller) for controlling the semiconductor switch and a power supply for powering the microprocessor. In addition, the dimmer switch may comprise, for example, a memory, a communication circuit, and a plurality of light-emitting diodes (LEDs) that are all powered by the power supply.
Another example of a typical load control device is an electronic dimming ballast, which is operable to control the intensity of a gas discharge lamp, such as a fluorescent lamp. Electronic dimming ballasts typically comprise an inverter circuit having one or more semiconductor switches, such as field-effect transistors (FETs) that are controllably rendered conductive to control the intensity of the lamp. The semiconductor switches of the inverter circuit are often controlled by integrated circuit or a microprocessor. Thus, a typical electronic dimming ballast also comprises a power supply for powering the integrated circuit or microprocessor.
By decreasing the amount of power delivered to an electrical load, a load control device is operable to reduce the amount of power consumed by the load and thus save energy. However, the internal circuitry of the load control device (e.g., the microprocessor and other low-voltage circuitry) also consumes power, and may even consume energy when the electrical load is off (i.e., the load control device operates as a “vampire” load). Thus, it is desirable to reduce the amount of power consumed by a load control device, and particularly, the amount of standby power consumed by the load control device when the electrical load is not powered.
According to an embodiment of the present invention, a load control device for controlling the amount of power delivered from a power source to an electrical load comprises a load control circuit, a controller, and a multi-stage power supply that can operate in a low-power mode in which the power supply has a decreased power consumption. The load control circuit is adapted to be coupled between the source and the load for controlling the power delivered to the load. The controller is operatively coupled to the load control circuit and is operable to control the load control circuit to turn the electrical load off. The multi-stage power supply comprises a first efficient power supply operable to generate a first DC supply voltage having a normal magnitude in a normal mode of operation, and a second inefficient power supply operable to receive the first DC supply voltage and to generate a second DC supply voltage for powering the controller. The controller is coupled to the multi-stage power supply for controlling the multi-stage power supply to the low-power mode when the electrical load is off, such that the magnitude of the first DC supply voltage decreases to a decreased magnitude that is less than the normal magnitude and greater than the magnitude of the second DC supply voltage. The inefficient power supply continues to generate the second DC supply voltage in the low-power mode when the electrical load is off and the magnitude of the first DC supply voltage has decreased to the decreased magnitude.
According to another embodiment of the present invention, a multi-stage power supply for a load control device for controlling the amount of power delivered to an electrical load comprises: (1) a first efficient power supply operable to generate a first DC supply voltage having a normal magnitude in a normal mode of operation; (2) a second inefficient power supply operable to receive the first DC supply voltage and to generate a second DC supply voltage for powering the controller; and (3) a low-power mode adjustment circuit coupled to the efficient power supply for controlling the efficient power supply when the electrical load is off, such that the magnitude of the first DC supply voltage decreases to a decreased magnitude that is less than the normal magnitude and greater than the magnitude of the second DC supply voltage in the low-power mode, and the inefficient power supply continues to generate the second DC supply voltage in the low-power mode.
Other features and advantages of the present invention will become apparent from the following description of the invention that refers to the accompanying drawings.
The invention will now be described in greater detail in the following detailed description with reference to the drawings in which:
The foregoing summary, as well as the following detailed description of the preferred embodiments, is better understood when read in conjunction with the appended drawings. For the purposes of illustrating the invention, there is shown in the drawings an embodiment that is presently preferred, in which like numerals represent similar parts throughout the several views of the drawings, it being understood, however, that the invention is not limited to the specific methods and instrumentalities disclosed.
The back end circuit 220 includes an inverter circuit 250 for converting the DC bus voltage VBUS to a high-frequency AC voltage. The inverter circuit 250 comprises one or more semiconductor switches, for example, two FETs (not shown), and a ballast control integrated circuit (not shown) for controlling the FETs. The ballast control integrated circuit is operable to selectively render the FETs conductive to control the intensity of the lamp 105. The ballast control integrated circuit may comprise, for example, part number NCP5111 manufactured by On Semiconductor. The back end circuit 220 further comprises an output circuit 260 comprising a resonant tank circuit for coupling the high-frequency AC voltage generated by the inverter circuit 250 to the filaments of the lamp 105.
A controller 270 is coupled to the inverter circuit 250 for control of the switching of the FETs to thus turn the lamp 105 on and off and to control (i.e., dim) the intensity of the lamp 105 between a minimum intensity (e.g., 1%) and a maximum intensity (e.g., 100%). The controller 270 may comprise, for example, a microcontroller, a programmable logic device (PLD), a microprocessor, an application specific integrated circuit (ASIC), or any suitable type of controller or control circuit. A communication circuit 272 is coupled to the controller 270 and allows the ballast 110 to communication (i.e., transmit and receive digital messages) with the other ballasts on the digital ballast communication link 120. The ballast 110 may further comprise an input circuit 274 coupled to the controller 270, such that the controller may be responsive to the inputs received from the occupancy sensor 140, the IR receiver 142, and the keypad 144. Examples of ballasts are described in greater detail in commonly-assigned U.S. patent Ser. No. 11/352,962, filed Feb. 13, 2006, entitled ELECTRONIC BALLAST HAVING ADAPTIVE FREQUENCY SHIFTING; U.S. patent Ser. No. 11/801,860, filed May 11, 2007, entitled ELECTRONIC BALLAST HAVING A BOOST CONVERTER WITH AN IMPROVED RANGE OF OUTPUT POWER; and U.S. patent application Ser. No. 11/787,934, filed Apr. 18, 2007, entitled COMMUNICATION CIRCUIT FOR A DIGITAL ELECTRONIC DIMMING BALLAST, the entire disclosures of which are hereby incorporated by reference.
The ballast 110 further comprises a multi-stage power supply 280 having a low-power mode when the lamp 105 is off. The power supply 280 comprises two stages: a first efficient power supply (e.g., a switching power supply 282) and a second inefficient power supply (e.g., a linear power supply 284). The switching power supply 282 receives the DC bus voltage VBUS and generates a first DC supply voltage VCC1 (e.g., having a normal magnitude VNORM of approximately 15 V). Alternatively, the switching power supply 282 could receive the rectified voltage generated by the EMI filter and rectifier circuit 230 of the front end circuit 210. The PFC integrated circuit of the boost converter 240 and the ballast control integrated circuit of the inverter circuit 250 are powered by the first DC supply voltage VCC1. The linear power supply 284 receives the first DC supply voltage VCC1 and generates a second DC supply voltage VCC2 (e.g., approximately 5 V) for powering the controller 270. Both the first and second supply voltages VCC1, VCC2 are referenced to a circuit common of the ballast 110. Alternatively, the switching power supply 282 could be coupled directed to the AC mains line voltage or to the output of the EMI filter and rectifier circuit 230.
When the lamp 105 is on (i.e., the intensity of the lamp range from the minimum intensity of 1% to the maximum intensity 100%), the power supply 280 operates in a normal mode of operation. Specifically, the switching power supply 282 converts the DC bus voltage VBUS (i.e., approximately 465 volts) to the first DC supply voltage VCC1 (i.e., the normal magnitude VNORM of approximately 15 volts), such that there is a voltage drop of approximately 450 volts across the switching power supply 282. Further, the linear power supply 284 reduces the first DC supply voltage VCC1 to the second DC supply voltage VCC2, such that there is a voltage drop of approximately 10 volts across the linear power supply. Accordingly, there may be a power loss of, for example, approximately 20 mW in the switching power supply 282 and approximately 360 mW in the linear power supply 284, such that the total power loss of the two-stage power supply is approximately 380 mW in the normal mode of operation.
The power supply 280 further comprises a low-power mode adjustment circuit 286, which receives a low-power mode control signal VLOW-PWR from the controller 270. The low-power mode adjustment circuit 286 is coupled to the switching power supply 282, such that the controller 270 is operable to control the operation of the power supply 280. When the lamp 105 is off (i.e., at 0%), the controller 270 drives the low-power mode control signal VLOW-PWR high (e.g., to approximately the second DC supply voltage VCC2), such that the power supply 280 operates in a low-power mode. At this time, the magnitude of the first DC supply voltage VCC1 generated by the switching power supply 282 decreases to a decreased magnitude VDEC, which is less than the normal magnitude VNORM and greater than the magnitude of the second DC supply voltage VCC2. For example, the decreased magnitude VDEC may be approximately 8 volts. The linear power supply 284 continues to generate the second DC supply voltage VCC2 when the power supply 280 is operating in the low-power mode. Therefore, the controller 270 is still powered and is operable to receive inputs from the input circuit 274 and to transmit and receive digital messages via the communication circuit 272 when the lamp 105 is off and the power supply 280 is operating in the low-power mode.
In the low-power mode, the voltage drop across the linear power supply 284 decreases to approximately 3 volts. The average power loss of the linear power supply 284 is equal to approximately the voltage drop across the linear power supply multiplied by the average current drawn by the controller 270 and other low-voltage circuitry powered by the second DC supply voltage VCC2. Thus, when the voltage drop across the linear power supply 284 decreases in the low-power mode, the power loss of the linear power supply also decreases.
The decreased magnitude VDEC is less than the rated supply voltages of the PFC integrated circuit of the boost converter 240 and the ballast control integrated circuit of the inverter circuit 250. Therefore, when the magnitude of the first DC supply voltage VCC1 decreases from the normal magnitude VNORM to the decreased magnitude VDEC in the low-power mode, the PFC integrated circuit of the boost converter 240 and the ballast control integrated circuit of the inverter circuit 250 stop operating. For example, the ballast control integrated circuit may comprise an under-voltage lockout (UVLO) feature that ensures that the ballast control integrated circuit does not render the controlled semiconductor switches conductive when the first DC supply voltage VCC1 decreases to the decreased magnitude VDEC in the low-power mode. Since the boost converter 240 and the inverter circuit 250 do not operate in the low-power mode, there is minimal power dissipation in the transformer and the semiconductor switches of the boost converter and the inverter circuit, and the current drawn from the first DC supply voltage VCC1 decreases, such that the ballast 110 consumes less power. In addition, the magnitude of the bus voltage VBUS decreases to approximately the peak voltage VPK of the AC mains line voltage (i.e., approximately 170 V) because the boost converter 240 does not operate in the low-power mode. Thus, the voltage drop across the switching power supply 282 decreases to approximately 162V volts in the low-power mode. As a result, there may be a power loss of, for example, approximately 7 mW in the switching power supply 282 and approximately 120 mW in the linear power supply 284 in the low-power mode, such that the total power loss in the two-stage power supply 280 is approximately 127 mW. Accordingly, the two-stage power supply 280 operates more efficiently in the low-power mode than in the normal mode.
The switching power supply 282 further comprises a feedback circuit comprising two diodes D2, D3, a zener diode Z1, a capacitor C2, and two resistors R1, R2. The feedback circuit is coupled between the DC supply voltage VCC1 and a feedback terminal FB of the control IC U1. The control IC U1 renders the FET conductive and non-conductive to selectively charge the capacitor C1, such that a feedback voltage at the feedback terminal FB is maintained at a specific magnitude, e.g., approximately 1.65 volts. For example, the zener diode Z1 has a break-over voltage VBO of approximately 6.2V, the resistor R1 has a resistance of approximately 5.11 kΩ, and the resistor R2 has a resistance approximately 2.00 kΩ, such that the DC supply voltage VCC1 generated by the switching power supply 282 has the normal magnitude VNORM of approximately 15 volts in the normal mode of operation. The capacitor C2 has, for example, a capacitance of approximately 1.0 μF.
The switching power supply 282 also comprises a bypass capacitor C3 for use by an internal power supply of the control IC U1. The bypass capacitor C3 is coupled between a bypass terminal BP and the source terminal S of the control IC U1, and has, for example, a capacitance of approximately 0.1 μF. The bypass capacitor C3 is operable to charge from the control IC U1 through the bypass terminal BP. However, to allow for more efficient operation, the bypass capacitor C3 is also operable to charge from the DC bus voltage VCC1 through the zener diode Z1, the diode D3, a resistor R3 (e.g., having a resistance of approximately 2.32 kΩ), and another diode D4.
The linear power supply 284 receives the first DC supply voltage VCC1 and generates the second DC supply voltage VCC2. The linear power supply 284 comprises a linear regulator U2, which operates to produce the second DC supply voltage VCC2 across a capacitor C4 (e.g., having a capacitance of approximately 10 μF). The linear regulator U2 may comprise, for example, part number MC78L05A manufactured by On Semiconductor. The decreased magnitude VDEC (i.e., approximately 8 V) is greater than a rated dropout voltage of the linear regulator U2 (e.g., approximately 6.7 V) below which the linear regulator U2 will stop generating the second DC supply voltage VCC2. Therefore, the linear power supply 284 continues to generate the second DC supply voltage VCC2 when the power supply 280 is operating in the low-power mode.
The low-power mode adjustment circuit 286 is coupled to the switching power supply 282 and receives the low-power mode control signal VLOW-PWR from the controller 270. The controller 270 drives the low-power mode control signal VLOW-PWR low (i.e., to approximately circuit common) to operate the power supply 280 in the normal mode when the lamp 105 is on and drives the low-power mode control signal VLOW-PWR high (i.e., to approximately the second DC supply voltage VCC2) to operate the power supply in the low-power mode when the lamp is off. The low-power mode adjustment circuit 286 comprises a PNP bipolar junction transistor (BJT) Q1 coupled across the zener diode Z1 of the switching power supply 282. A resistor R4 is coupled between the emitter and the base of the transistor Q1 and has a resistance of, for example, approximately 10 kΩ. The low-power mode control signal VLOW-PWR is coupled to the base of an NPN bipolar junction transistor Q2 through a resistor R5 (e.g., having a resistance of approximately 4.99 kΩ). A resistor R6 is coupled between the base and the emitter of the transistor Q2 and has a resistance of approximately 10 kΩ.
When the low-power mode control signal VLOW-PWR is low, both of the transistors Q1, Q2 are non-conductive, and thus, the switching power supply 282 operates to generate the first DC supply voltage VCC1 at the normal magnitude VNORM of approximately 15 V as described above. However, when the low-power mode control signal VLOW-PWR is driven high by the controller 270, the transistor Q2 is rendered conductive and the base of the transistor Q1 is pulled down towards circuit common through a resistor R7 (e.g., having a resistance of approximately 6.81 kΩ). Accordingly, the transistor Q1 is rendered conductive, thus, “shorting out” the zener diode Z1 of the switching power supply 282. Since the zener diode Z1 is essentially removed from the feedback circuit of the switching power supply 282, the control IC U1 now operates to maintain the magnitude of the first DC supply voltage VCC1 at the decreased magnitude VDEC. In other words, the magnitude of the first DC supply voltage VCC1 is no longer dependent upon the breakover voltage VBO of the zener diode Z1. The decreased magnitude VDEC is approximately equal to the difference between the normal magnitude VNORM of the first DC supply voltage VCC1 and the breakover voltage VBO of the zener diode Z1.
The LED load control circuit 450 receives the bus voltage VBUS and regulates the magnitude of an LED output current ILED conducted through the LED light source 405 (by controlling the frequency and the duty cycle of the LED output current ILED) in response to the controller 470 to thus control the intensity of the LED light source. For example, the LED load control circuit 450 may comprise a LED driver integrated circuit (not shown), for example, part number MAX16831, manufactured by Maxim Integrated Products. To control the intensity of the LED light source 405, the LED load control circuit 450 may be operable to adjust the magnitude of the LED output current ILED or to pulse-width modulate (PWM) the LED output current. An example of an LED driver is described in greater detail in co-pending, commonly-assigned U.S. Provisional Patent Application No. 61/249,477, filed Oct. 7, 2009, entitled LOAD CONTROL DEVICE FOR A LIGHT-EMITTING DIODE LIGHT SOURCE, the entire disclosure of which is hereby incorporated by reference.
The dimmer switch 500 may be adapted to be mounted to a standard electrical wallbox (i.e., replacing a standard light switch), and may comprise one or more actuators 572 for receiving user inputs. The controller 570 is operable to toggle (i.e., turn on and off) the lighting load 505 and to adjust the amount of power being delivered to the lighting load in response to the inputs received from the actuators 572.
The controller 570 may be further coupled to a communication circuit 574 for transmitting and receiving digital messages via a communication link, such as a wired communication link or a wireless communication link, e.g., a radio-frequency (RF) communication link or an infrared (IR) communication link. The controller 570 may be operable to control the controllably conductive device 574 in response to the digital messages received via the communication circuit 574. Examples of RF load control systems are described in greater detail in U.S. patent application Ser. No. 11/713,854, filed Mar. 5, 2007, entitled METHOD OF PROGRAMMING A LIGHTING PRESET FROM A RADIO-FREQUENCY REMOTE CONTROL, and U.S. patent application Ser. No. 12/033,223, filed Feb. 19, 2008, entitled COMMUNICATION PROTOCOL FOR A RADIO-FREQUENCY LOAD CONTROL SYSTEM. An example of an IR load control system is described in greater detail in U.S. Pat. No. 6,545,434, issued Apr. 8, 2003, entitled MULTI-SCENE PRESET LIGHTING CONTROLLER. The entire disclosures of these three patents are hereby incorporated by reference.
The load control circuit 530 includes a controllably conductive device (e.g., a bidirectional semiconductor switch 550) adapted to conduct a load current through the lighting load 505, and a drive circuit 552 coupled to a control input (e.g., a gate) of the bidirectional semiconductor switch for rendering the bidirectional semiconductor switch conductive and non-conductive in response to control signals generated by the controller 570. The bidirectional semiconductor switch 550 may comprise any suitable type of controllable switching device, such as, for example, a triac, a field-effect transistor (FET) in a rectifier bridge, two FETs in anti-series connection, or two or more insulated-gate bipolar junction transistors (IGBTs). A zero-crossing detector 576 is coupled across the bidirectional semiconductor switch 550 and determines the zero-crossings of the AC mains line voltage of the AC power supply 502, i.e., the times at which the AC mains line voltage transitions from positive to negative polarity, or from negative to positive polarity, at the beginning of each half-cycle. Using a standard phase-control technique, the controller 576 selectively renders the bidirectional semiconductor switch 550 conductive at predetermined times relative to the zero-crossing points of the AC mains line voltage, such that the bidirectional semiconductor switch is conductive for a portion of each half-cycle of the AC mains line voltage. Typical dimmer circuits are described in greater detail in U.S. Pat. No. 5,248,919, issued Sep. 29, 1993, entitled LIGHTING CONTROL DEVICE, and U.S. Pat. No. 7,242,150, issued Jul. 10, 2007, entitled DIMMER HAVING A POWER SUPPLY MONITORING CIRCUIT. The entire disclosures of both patents are hereby incorporated by reference.
The dimmer switch 500 comprises a multi-stage power supply 580 that operates in a low-power mode when the lighting load 505 is off (as in the first and second embodiments of the present invention). The power supply 580 comprises a first efficient power supply (e.g., a switching power supply 582) and a second inefficient power supply (e.g., a linear power supply 584). The power supply 580 also comprises a rectifier bridge 588 and a capacitor CR for generating a rectified voltage, which is provided to the switching power supply 582. As in the first and second embodiments, a low-power mode adjustment circuit 586 controls the power supply into the low-power mode in response to a low-power mode control signal VLOW-PWR received from the controller 570. Specifically, the controller 570 controls the power supply 580 to the low-power mode when the lighting load 505 is off.
While the present invention has been described with reference to the ballast 110, the LED driver 400, and the dimmer switch 500, the multi-stage power supply 280, 480 of the present invention could be used in any type of control device of a load control system, such as, for example, a remote control, a keypad device, a visual display device, an electronic switch, a switching circuit including a relay, a controllable plug-in module adapted to be plugged into an electrical receptacle, a controllable screw-in module adapted to be screwed into the electrical socket (e.g., an Edison socket) of a lamp, a motor speed control device, a motorized window treatment, a temperature control device, an audio/visual control device, or a dimmer circuit for other types of lighting loads, such as, magnetic low-voltage lighting loads, electronic low-voltage lighting loads, and screw-in compact fluorescent lamps.
Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein, but only by the appended claims.
Number | Name | Date | Kind |
---|---|---|---|
4717863 | Zeiler | Jan 1988 | A |
5627434 | Sekiya et al. | May 1997 | A |
6441590 | Amantea et al. | Aug 2002 | B1 |
6674248 | Newman, Jr. et al. | Jan 2004 | B2 |
6707261 | Ito et al. | Mar 2004 | B2 |
6720739 | Konopka | Apr 2004 | B2 |
6731078 | Huber et al. | May 2004 | B2 |
6762570 | Fosler | Jul 2004 | B1 |
6969959 | Black et al. | Nov 2005 | B2 |
7061189 | Newman, Jr. et al. | Jun 2006 | B2 |
7075254 | Chitta et al. | Jul 2006 | B2 |
7091672 | Steffie et al. | Aug 2006 | B2 |
7282865 | Van Casteren | Oct 2007 | B2 |
7285919 | Newman, Jr. et al. | Oct 2007 | B2 |
7312582 | Newman, Jr. et al. | Dec 2007 | B2 |
7369060 | Veskovic et al. | May 2008 | B2 |
7432661 | Taipale et al. | Oct 2008 | B2 |
7446486 | Steffie et al. | Nov 2008 | B2 |
7528554 | Chitta et al. | May 2009 | B2 |
20020109466 | Huber et al. | Aug 2002 | A1 |
20060017409 | Hsieh | Jan 2006 | A1 |
20060125426 | Veskovic et al. | Jun 2006 | A1 |
20060244392 | Taipale et al. | Nov 2006 | A1 |
20080088180 | Cash et al. | Apr 2008 | A1 |
20080180037 | Srimuang | Jul 2008 | A1 |
20080246415 | Chitta et al. | Oct 2008 | A1 |
20080258551 | Chitta et al. | Oct 2008 | A1 |
20080278086 | Chitta et al. | Nov 2008 | A1 |
20080315779 | Taipale et al. | Dec 2008 | A1 |
20090160409 | Carmen | Jun 2009 | A1 |
20090244944 | Jang et al. | Oct 2009 | A1 |
20090273958 | Baby | Nov 2009 | A1 |
20090315400 | Howe et al. | Dec 2009 | A1 |
Number | Date | Country |
---|---|---|
1524333 | Aug 2004 | CN |
1606767 | Apr 2005 | CN |
101099417 | Jan 2008 | CN |
602 07 396 | Aug 2006 | DE |
1 231 821 AL | Aug 2002 | EP |
1374366 | Nov 2005 | EP |
WO 02082618 | Oct 2002 | WO |
Entry |
---|
European Patent Office, European Search Report for European Patent Application No. 12163764.9, May 15, 2012, 6 pages. |
European Patent Office, International Search Report and Written Opinion for International Patent Application No. PCT/US2010/025894, May 20, 2010, 11 pages. |
Number | Date | Country | |
---|---|---|---|
20100225240 A1 | Sep 2010 | US |
Number | Date | Country | |
---|---|---|---|
61158165 | Mar 2009 | US |