The present invention relates to a method for displaying a picture on a display screen including the steps of providing an input signal including a sequence of plural frames, each corresponding to a single picture, temporally dividing each frame having a frame duration into sub-fields and controlling a display element of the display screen on the basis of said subfields. Furthermore, the present invention relates to corresponding display devices.
Traditional sample and hold display addressing methods used for OLED or LCD, etc. are very suitable for multi-scan applications (supporting several frame rates). In other words they can support several frame rates or unstable frame rates without any problem.
However, the newly addressing concept (analog sub-fields) proposed in the documents EP 174 3315, EP 1914709 and EP 196 4092 that provides enhanced grayscale quality and better motion rendition cannot support this feature (multi-scan) at present. As to the sub-field addressing concept it is expressively referred to the above-mentioned documents. This concept is specifically proposed for display devices of the OLED or AMOLED type.
The document EP 0 847 037 A1 discloses a video display monitor, such as a plasma monitor, where the stable driving is assured although vertical synchronizing frequency of the input video signal changes. A vertical synchronizing measurement unit measures the vertical synchronizing frequency of the video signal, and a sub-field number adjustment unit adjusts the number of sub-fields in accordance with a measured vertical synchronizing frequency. Furthermore, the length of the sub-fields may be adjusted.
It is the object of the present invention to further develop the sub-field addressing concept in order to support a full flexible frame rate application while maintaining a high grayscale quality and linearity.
The above-mentioned object is solved according to claim 1 by a method for displaying a picture on a multi-scan hold type display screen including the steps of providing an input signal including a sequence of plural frames, each corresponding to a single picture, temporally dividing each frame having a frame duration into analog sub-fields, providing a set of reference signals for specifying the analog signal amplitudes of sub-field controlling signals, each corresponding to one of said analog sub-fields, controlling a display element of the display screen on the basis of said sub-field controlling signals wherein the amplitude of a sub-field controlling signal corresponding to the last subfield of each frame is automatically adapted to the frame duration of the frame.
Similarly, according to claim 4 there is provided a multiscan hold type display device for displaying a picture including a display screen having a plurality of display elements, input means for providing an input signal including a sequence of plural frames, each corresponding to a single picture, encoding means for temporally dividing each frame having a frame duration into analog sub-fields, controlling means for providing a set of reference signals for specifying the analog signal amplitudes of sub-field controlling signals, each corresponding to one of said analog sub-fields, and for controlling a display element of the display screen on the basis of said sub-field controlling signals, and further including adaption means for automatically adapting the amplitude of a sub-field controlling signal corresponding to the last sub-field of each frame to the frame duration of the frame.
This concept of adapting the amplitude of the last sub-field (controlling signal) can be applied to display devices alone or in connection with the adaption of the number of sub-fields of each frame as mentioned above. Furthermore, the above described concept for supporting a multiscan feature is preferably applicable to OLED or AMOLED displays. Optionally the amplitude of a reference signal of the last sub-field is adapted to the frame duration automatically.
The present invention will be described in more detail along with following figures, showing in:
The following embodiment is related to an active OLED matrix (AMOLED) where each cell of the display is controlled via an association of several TFTs. The general structure of such an electronic is illustrated in
Generally an AMOLED display includes following components:
Actually, there are two ways for driving OLED cells:
It should be noticed that an OLED is current driven so that each voltage based driving system is based on a voltage to current converter to achieve appropriate cell lighting.
On the other hand, the column drivers 4 represent the real active part and can be considered as high-level digital to analog converters as illustrated in
Specifically
In order to illustrate this concept, the example of a voltage driven circuitry is taken in the rest of this document. The driver taken as example will use 8 reference voltages named V0 to V7 and the video levels are built as explained in Table 1:
The greyscale voltage levels represent output voltages for various input video levels. Later on in connection with the analog sub-field concept these output voltages are called “sub-field controlling signals”. Table 2 shows possible voltage references for reference signaling 7.
Independently if the chosen AMOLED concept is current-driven or voltage-driven, the grayscale level is defined by storing during one frame an analog value in a capacitor located at the current pixel location. This value is kept by the pixel up to the next refresh coming with the next frame. In that case, the video value is rendered in a fully analog manner and stays stable during the whole frame.
This concept is different from of a CRT that works with an impulse.
In case of an AMOLED, the luminance of the current pixel is stable during the whole frame period. The value of the pixel will be updated only at the beginning of each frame.
In the previous example, the surface of the illumination curves for level 1 and level 2 are equal for CRT and AMOLED if the same power management system is used. All amplitude being controlled in an analog way.
It is obvious that the control signal C1 must be much lower than C255. However, the storage of such a small value can be difficult due to the inertia of the system. Moreover, the error in the setting of this value (drift, etc.) will have much more impact on the final level than for the highest level. In the rest of the document, Cth is defined as the level that switches OFF the cell (could be Cth=0)
In classical driving, the addressing of the screen is locked to the input frame synchronization. This means, that each time a new frame is coming the addressing is started independently of the frame duration.
Since this concept is capable of supporting several input frequencies (according to the limitation of the driver speed), it is called a full multi-scan display.
1.5. Grayscale Rendition with Analog Sub-Field Concept
This concept has been deeply presented in the documents EP 1 743 315, EP 1 914 709 and EP 1964 092 and will be used here as background reference. The idea was to split an analog frame as it is used today in a multiple of analog sub-fields similar to that being used in a PDP (plasma display device). However, in PDP each sub-field can be only controlled in a digital way (fully ON or OFF) whereas in the present concept each sub-field will be an analog one (variable amplitude). The maximal bit depth of each sub-field is defined by the driver bit depth.
The number of sub-fields must be higher than two and its actual number will depend on the refreshing rate of the AMOLED (time required to update the value located in each pixel). The proposed concept is illustrated in
This concept is based on a split of the original video frame in 6 sub-fields (SF0 to SF5). This number is only given as an example. There is a refresh at the beginning of each sub-field.
The data of each sub-field and the reference signals are used to generate a corresponding sub-field controlling signal. The amplitude of each sub-field controlling signal is decreasing step by step from SF0 to SF5 and may be adjusted by the reference signaling means 7 (compare
An other main advantage of the solution is that: the analog amplitude of a sub-frame (i.e. in a sub-field) is defined via a driver as presented on
The further explanations, are limited to the left concept from
2. Multi-Scan Solution with Analog Sub-Fields
In order to simplify the exposition, the example of a frame built of four analog sub-frames in 60 Hz having equal length of 16.67/4=4.16 ms using a voltage driven system is taken. The voltage reference of each sub-field is chosen in order to have 30% luminance differences between consecutive sub-fields (the voltage differences are adjusted accordingly). This means, that each 4.16 ms, the voltage reference generator is updated according to the refresh of the Capacity for the given sub-field. All values and numbers given here are only examples! These hypotheses are illustrated in
In real case, the number of sub-fields, their size and the amplitude differences is fully flexible and can be adjusted case by case depending on the application. In case of a current driven system, the same concept is used excepted that there is a linear relationship between applied current and luminance whereas in case of voltage driven system, the relation is a power of 2.
Therefore, in case of voltage driven the following relationship in terms of luminance is valid for one frame of the present example:
Out=¼×(X0)2+¼×(0.7×X1)2+¼×(0.49×X2)2+¼×(0.343×X3)2
where X0, X1, X2 and X3 are 8-bit information linked to the video values used for the four sub-fields SF0, SF1, SF2 and SF3.
In case of current driven, luminance of a frame is:
Out=¼×(X0)+¼×(0.7×X1)+¼(0.49×X2)+¼×(0.343×X3).
2.2. Increased Bit Depth from EP 1914 709
The following example shows that this system enables to dispose of more bits:
Out=¼×(255)2+¼×(0.7×255)2+¼×(0.49×255)2+¼×(0.343×255)2=30037.47 units.
Out=¼×(0)2+¼×(0.7×0)2+¼×(0.49×0)2+¼(0.343×1)2=0.03 units.
With a standard display without analog sub-field having the same maximum luminance, the lowest value would correspond to
where N represents the bit depth. So we have:
This shows that the use of the analog sub-fields while simply based on 8-bit drivers enables to generate increased bit-depth. However, the encoding must be done carefully.
Indeed, in normal situations (no analog sub-fields), half the input amplitude corresponds to fourth of the output amplitude since the relation input/output is following a quadratic curve in voltage driven mode. This has to be followed also while using an analog sub-field concept. In other words if the input value is half of the maximum available, the output must be fourth of that obtained with X0=255, X1=255, X2=255 and X3=255. This can not be achieved simply with X0=128, X1=128, X2=128 and X3=128.
Out=¼×(128)2+¼×(0.7×128)2+¼×(0.49×128)2+¼×(0.343×128)2=7568.38
which is not 30037.47/4=7509.37! This is due to the fact that (a+b+c+d)2≠a2+b2+c2+d2!
Therefore a specific encoding algorithm must be used. In that case the input should be X0=141, X1=114, X2=107 and X3=94.
Out=¼×(141)2+¼×(0.7×114)2+¼×(0.49×107)2+¼×(0.343×94)2=7509.37
which is then exactly 30037.47/4. Such an optimization should be done for each possible input video value and stored inside a Look-Up table inside the chip. The number of inputs of this LUT will depend on the bit depth chosen. In case of 8-bit, the LUT will have 256 inputs and for each, four 8-bit outputs, one per sub-field. In case of 10-bit, the LUT will have 1024 inputs and for each, four 8-bit outputs, one per sub-field. This shows that an increased bit depth has also a cost in terms of memory needed.
For example a display capable of rendering 10-bit material shall be used.
In that case the output level should correspond to
where X is a 10-bit value growing from 1 to 1024 by a step of 1. In table 3 one can find an example of coding that could be accepted to render 10-bit. This is only an example and further optimization can be done depending on the display behavior:
The difference between the awaited energy and the obtained energy is shown on
Table 3 and
Several options can be used for the generation of the encoding table but usually following main points must be followed:
It is obvious that a solution to overcome this problem is to develop several addressing schemes for different frequencies. For instance, five different modes like 50 Hz, 60 Hz, 75 Hz, 100 Hz and 120 Hz are supported. For each of them a different sub-field addressing and coding will be performed. However, this does not solve the problem of frequencies that are in-between like 66.7 Hz or 71.4 HZ from the example.
In the case of 66.7 Hz in a 60 Hz mode, the last sub-field should have the duration of 16.6/4=4.16 ms. However, the full frame duration is only 15 ms so that the last sub-field is 1.6 ms shorter (2.56 ms). In other words the last sub-field does not have the duration of one fourth of the frame duration but rather one sixth. Finally the energy obtained on the screen in this particular example is given by the formula below:
Out=¼×(X0)2+¼×(0.7×X1)2+¼×(0.49×X2)2+⅙×(0.343×X3)2
where X0, X1, X2 and X3 are 8-bit information linked to the video values used for the three sub-frames SF0, SF1, SF2 and SF3. When using this formula to update the encoding the results of 4 are obtained.
The difference between the awaited energy and the obtained energy can be seen in
In order to avoid such problems, the analog sub-fields method should be adjusted to the real input frame duration. Several possibilities exist:
The two last solutions will primarily be in the scope of this document.
The implementation of the basic analog sub-field solution is described on
The resulting signal is transmitted to a unit for analog sub-frame (i.e. sub-field) encoding 11. As depicted in the enlarged box 11′, the incoming video information (RGB 30 bit) is forwarded to the encoding LUTs (one per color). The outputs of these LUTs are the several sub-fields bits: for each pixels all sub-fields data are available at the same time.
These sub-fields are stored at different positions of a sub-field memory 12 pixel by pixel and are read out of the memory 12 sub-field per sub-field. At one moment only one sub-field picture is read out of the memory 12, transferred to a standard (OLED) driving unit 13 and displayed on the screen 1 with the adjusted voltage references (reference signaling 7) corresponding to the sub-field level. This unit 13 controls the row drivers 3 and the column drivers 4. A central control unit 14 controls the standard processing unit 10, the sub-field encoding unit 11, the driving unit 13 and reference signaling unit 7.
This implementation shows that there is at least one frame delay between the displayed picture and the incoming picture due to the storage of the sub-fields in the frame memory 13. This delay will be very useful for the sub-field duration adjustments: the main idea is that the duration of each sub-field will be adjusted exactly to the full input frame duration.
For the example of displaying N sub-fields, this means:
In case of a frame duration of 15 ms (66.7 Hz) and a clock of 100 MHz, the frame duration will be i_frame_duration=1.499.250 clocks. For four sub-fields, the counter i_SF_count will increase four times faster than the clock, so that it will reach the value 1.499.250 only after 374812 clocks which represents a fourth of the input frame duration. By doing that the four sub-fields will have equal duration independently from the input frame frequency.
However, a new problem can occur mainly when the frame rate is getting shorter. The duration of the sub-fields is getting shorter also and may become too short for the given number of sub-fields.
In that case, the number i_frame_duration is compared with a threshold and if this duration is below the given threshold, an other mode with fewer sub-fields will be selected. For instance:
A corresponding example is illustrated on
All sub-field modes are designed in such a way that the average luminance is constant between them. In that case, changing the number of sub-fields does not affect the image brightness. In order to achieve this, the voltage reference of all modes must be adjusted to take into account the luminance behavior of the selected addressing.
The LUT containing the sub-field coding and the voltage reference is computed one time and stored in a memory of the control board. It will be selectively activated based on the threshold defined above.
In order to compute optimally the references for the different numbers of sub-fields, there are two situations:
The LUTs are computed one time and stored in a memory of the control board.
The value i_frame_duration is compared with several thresholds (reference sign 15) (e.g. duration_threshold_m from the above example) to determine (reference sign 16) how many sub-fields should be used: N
This value N is used to select all Look-Up-Tables (coding addressing, driving references . . . ) in blocks 11′ and 17.
On the next Vsync, the first sub-field is addressed and SF1 is required from the memory. At the same time the counter i_SF_count is increased by the value N until it reaches the current i_frame_duration. This requires the addressing of the next sub-field SF2, its addressing and the counter i_SF_count is reset. This loop will last until the next Vsync, where the cycle will start again.
The inventive teaching is applicable to all displays using the sample & hold principle (AMOLED, LCD . . . ).
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/EP2009/066954 | 12/11/2009 | WO | 00 | 6/13/2011 |