The disclosed embodiments relate generally to video compression technology, and more specifically to methods and systems for motion estimation and compensation using parallel processing systems.
To reduce the amount of data transmitted in video systems, the video data is often compressed through a coding scheme. A video codec is a device or firmware/software program that enables video compression and/or decompression for digital video. In areas of video with motion, a number of pixels change from one frame to the next, and the video compression scheme must send more data to keep up with the larger number of pixels that are changing. In extreme cases of high-frequency detail changes, the video quality may decrease. In order to maintain video quality, yet reduce the amount of data that is transmitted, various different compression techniques have been developed. For example, MPEG-based video compression typically operates on square-shaped groups of neighboring pixels, called macroblocks. These blocks of pixels are compared from one frame to the next and the video compression codec sends only the differences within those blocks. Areas of video that have no motion thus require very little transmitted data.
Prediction techniques are also used in video compression systems to enable efficient encoding. The temporal prediction technique used in MPEG video is based on motion estimation. Motion estimation is based on the premise that, in most cases, consecutive video frames will be similar except for changes caused by objects moving within the frames. A motion vector is the key element in the motion estimation process. A motion vector is a two-dimensional vector used for inter prediction that provides an offset from the coordinates in the decoded picture to the coordinates in another picture, called the reference picture. It is used to represent a macroblock in a picture based on the position of this macroblock (or a similar one) in the reference picture. In general, motion estimation is the process of determining the motion vectors that describe the transformation from one two-dimensional image to another image, usually from adjacent frames in a video sequence. Motion vectors may relate to the whole image (global motion estimation) or specific parts, such as rectangular blocks, arbitrary shaped patches or even individual pixels. The motion vectors may be represented by a translational model or other models that can approximate the motion of a real video camera.
Applying the motion vectors to an image to synthesize the transformation to the next image is called motion compensation. The combination of motion estimation and motion compensation is a key part of video compression method used by the MPEG 1, 2 and 4 standards, as well as many other video codecs.
As stated above, the design of the video codecs is generally based on the statistical fact that most pixels in a sequence of video frames do not change by a significant amount; or when they do change they are still similar to their neighbor pixels either spatially or temporally. The use of motion vectors takes advantage of temporally similarity (one block of pixels remains the same from frame-to-frame); and differentially encoding the motion vectors takes advantage of spatial similarity (one block of pixels in a frame has the same motion as its neighbors). Codecs such as MPEG-2 and H.264 take advantage of the spatial similarity of motion vectors by utilizing differential encoding.
First Pass: 1-2, 3-4, 5-6, 7-8 . . . 46-47, 48-49, 50-51, 52-53 . . . 91-92, 93-94, 95-96, 97-98, . . . .
Second Pass: 2-3, 4-5, 6-7 . . . 47-48, 49-50, 51-52 . . . 92-93, 94-95, 96-97 . . . .
This present spatial filtering method in motion detection systems performs two or more consecutive passes in series, thus consuming extra processing overhead for each pass.
What is desired, therefore, is a motion estimation system that better utilizes the parallel processing capabilities of present graphics processing units in order to provide higher quality video and lower bitrates with reduced processing overhead.
Embodiments include a motion estimation method performed in a parallel processing system that determines a list of several candidate motion vectors for a macroblock of a video image and retains them through multiple computation passes. All candidate motion vectors are used as potential neighboring predictors, so that the best combination of differential vectors rises to the top of the candidate list. Numerous combinations of differential motion vectors are considered during the process that compares motion vectors among up to eight neighboring macroblocks, instead of simply between pairs of macroblocks. The motion estimation system is configured to use a large number of compute engines, such as on a highly parallel graphic processing unit (GPU) platform. This is achieved by having no dependencies between macroblocks except with one synchronization point per pass. This allows the number of calculations per pass to be very large.
A system and method of performing motion estimation in a video encoder is enclosed. The system and method may include calculating one or more candidate motion vectors for each macroblock of a video image to form a list of candidate motion vectors, calculating a second one or more candidate motion vectors using a sub-region of at least one macroblock of the video image to include in the list of candidate motion vectors, and comparing the calculated candidate motion vectors of a first macroblock with the calculated candidate motion vectors of at least one sub-region of the first macroblock to provide the estimated contribution to the candidate motion vector of the macroblock. Calculating a second one or more candidate motion vectors using a sub-region of at least one macroblock may include using an approximation different from the calculating one or more candidate motion vectors for each macroblock.
A data buffer structure for enhancing a method of calculation using multiple sorting passes is also disclosed. The data buffer structure may include an array of buffers including a buffer 0 and a plurality of other buffers configured to store at least one implied value and an implied candidate position. Buffer 0 is configured to maintain a final result of the method of calculation after each sorting pass. The data buffer structure may include a misc-bits field for storing information utilized with a cost value sorting procedure. The data buffer structure may include a plurality of convergence and stability bits, such as for providing very unstable, unstable, stable, or highly stable modes. A state machine that increments a state every time a sort results in a result that was previously achieved, and decrements the state every time the sort result is not sorted to the top of a list is also disclosed.
Understanding of the present invention will be facilitated by consideration of the following detailed description of preferred embodiments taken in conjunction with the accompanying drawings, in which like numerals refer to like parts.
Embodiments of the invention as described herein provide a solution to the problems of conventional methods as stated above. In the following description, various examples are given for illustration, but none are intended to be limiting. Embodiments include a motion estimation component that is incorporated in a software or hardware encoder pipeline and allows the encoder to maintain the same or similar relative level of video quality at a lower bitrate (higher compression ratio). The motion estimation component obtains the lower bitrate while performing fewer calculations than other methods used in present known encoders.
In MPEG-based video compression systems, the minimum independently encoded rectangle on the frame is called macroblock, and has a size of 16×16 pixels, with each frame having a periodicity of 1/30 of a second. Certain systems perform compression by statistically analyzing the whole frame of 16×16 pixels to determine a level of activity ranging from none or very little activity being discarded (this is true for spatial activity only). For full motion video, this type of analysis is usually adequate to perform compression in which perceptually insignificant information is discarded and human perception is relied upon to fill-in the missing data so that the compressed image appears identical to the original uncompressed version. In general, every codec can give a varying degree of quality for a given set of frames within a video sequence. Typically, the quality is controlled through a bitrate control mechanism (bitrate allocation) that sets the bitrate and quality on a per-frame basis.
A general design goal is to use the lowest bitrate possible to encode digital video data. The H.264 standard for video compression was developed to provide good video quality at substantially lower bit rates than previous standards (e.g., half or less the bit rate of MPEG-2, H.263, or MPEG-4 Part 2), without overly increasing the complexity of design. The H.264 (also known as MPEG-4 Part 10 or MPEG-4 AVC) specification has become the standard for video compression, and contains a number of features that allow it to compress video much more effectively than older standards and to provide more flexibility for application to a wide variety of network environments. These features include variable block-size motion compensation (motion estimation) with block sizes as large as 16×16 and as small as 4×4, enabling precise segmentation of moving regions, and the ability to use multiple motion vectors per macroblock.
For purposes of this description, “H.264” refers to the standard for video compression that is also known as MPEG-4 Part 10, or MPEG-4 AVC (Advanced Video Coding). H.264 is one of the block-oriented motion-estimation-based codecs developed by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG).
Many current video codecs, such as H.264 codecs utilize a form of differential encoding to take advantage of the temporal and spatial similarity between neighboring macroblocks in an image. Embodiments of an encoding system provide an improvement over present spatial filtering techniques that are performed on neighboring macroblocks, such as shown in
System 200 of
In one embodiment, the motion estimation component 204 implements a method that performs filtering and analysis of proposed neighboring motion vectors in a manner that does not require any dependencies between neighboring calculations within a large processing step or pass. This facilitates the use of separate computing engines per macroblock. Such computing engines could be an individual shader processor in a graphics processing unit (GPU) or a dedicated hardware circuit for motion estimation. Thus, the system of
The motion estimation method performed by component 204 determines a list of several candidate motion vectors and retains them through multiple computation passes. This method prevents a single best cost score in the initial pass from prematurely dominating the results for its macroblock. All candidate motion vectors are used as potential neighboring predictors, so that the best combination of differential vectors rises to the top of the candidate list. Numerous combinations of differential motion vectors are considered during the process that compares motion vectors among up to eight neighboring macroblocks, as opposed to between pairs of macroblocks. The motion estimation system is configured to use a large number of compute engines, such as on a highly parallel GPU platform. This is achieved by having no dependencies between macroblocks except with one synchronization point per pass. This allows the number of calculations per pass to be very large.
In one embodiment, a multi-pass process using multiple parallel processors is executed on a set of macroblocks to determine the best motion vector. Instead of comparing individual pairs of macroblocks, as shown in
The SAD metric for block-matching in the motion estimation process works by taking the absolute value of the difference between each pixel in the original block and the corresponding pixel in the block being used for comparison. These differences are summed to create a simple metric of block similarity, the L1 norm of the difference image. In alternative embodiments, other metrics can be used, such as the sum of the square of absolute differences (SSAD). Another possible metric is the sum of absolute transformed differences (SATD), which works by taking a frequency transform, usually a Hadamard transform (SAHD), of the differences between the pixels in the original block and the corresponding pixels in the block being used for comparison. The transform itself is often of a small block rather than the entire macroblock. For example, a series of 4×4 blocks may be transformed rather than the full 16×16 transform. In general, SATD is slower than SAD due to its increased complexity, but has the benefit of being able to more accurately predict quality from both the standpoint of objective and subjective metrics.
In one embodiment, a hierarchical searching method is used to calculate the CMVs for each macroblock. A box area is defined around the block and is then divided into multiple regions. The process then searches each region as if it is the region of interest. In one example, four regions are defined and four CMV values are determined. These values are denoted CMV1, CMV2, CMV3, and CMV4. In this method, the area is downsampled by a defined ratio, such as one-quarter in each dimension. Thus, if the size of the region is 100×100, the downsampling operation yields a search of a 4×4 block within region of 25×25, instead of a search of a 16×16 block within a region of 100×100.
Each macroblock will have a list of CMVs, such as CMV1-4. The list of candidate motion vectors for each macroblock is then sorted by cost, block 504. The minimum cost generally yields the best candidate. In one embodiment the cost is calculated by the following equation:
Cost=SAD+λ(dMVX and dMVY)
In the above equation, dMVX and dMVY are the differential motion vectors in X and Y respectively. Collectively dMVX and dMVY are referred to herein as the differential motion vector (dMV), with the differential from a predicted motion vector. The predicted motion vector may be 0, 0 or some other motion vector. The lambda (λ) factor is a normalization factor whose value can be selected depending on the requirements of the system and may be varied based on the target quality and target bitrate.
As shown in block 506 of
In block 604, the score for the single least CMV in each neighbor's list is increased. In a simple implementation, the single least cost CMV in each neighbor's list gets a scoring value of one added to its score. In other words, the calculations for a single macroblock cause one scoring point to be added to one CMV in each of its neighbors. This may be repeated for each macroblock. All of the CMVs of each non-edge macroblock may be scored eight times, for example. Alternatively, weighted scores are added to multiple CMV's in each list.
In one embodiment, for block 604, a flag can be set (or some sharable global counter can be incremented) such that each time the highest scored CMV is changed a total number of changes can be accumulated to provide an indication of when the number of changes per pass is low; such that excessive passes are not used. Alternatively, some fixed number of passes can be used based on testing, available time, quality settings, and so on.
After all scoring is completed, the list of CMVs for each macroblock is sorted, with the highest score placed at the top of the list, block 606. Note that the highest score is different from the least cost. In general, the sorting step may change the “best” motion vector for some macroblocks. Since the best is used for the scoring calculation there may be some new best CMVs. In block 608, it is determined whether or not an optimum or acceptable result is reached. A near optimum result may be acceptable after a certain number of flip-flops of some number of CMV in all the sum of macroblocks when the threshold of changes is low. In one embodiment, this defines a relative equilibrium point at which further iterations do not add a significant improvement. An incremental improvement value may be defined to determine such an optimum result. If the optimum result is not reached, the process repeats from block 602, until relative equilibrium is reached with the optimum or near optimum result. The highest scored and sorted CMV is then set as the final resultant motion vector for each macroblock, block 610.
In general, the overall motion estimation process to calculate the best motion vector for each macroblock of a video image illustrated in
In an embodiment, all possible neighbors are checked even though a particular codec may not support such a neighbor as a predictor. This is done because an inverse predictor might be valid and the direction of the predictor makes very little difference in trying to determine the smallest dMV on average for the whole image.
In one embodiment, the method is implemented in a computing platform that uses a large number of compute engines, such as a highly parallel GPU platform. This enables the method to perform the relatively high number of computations required, in a reasonable amount of time. This is generally achieved by having no dependencies between macroblocks except with one synchronization point per pass. The number of calculations per pass may be large, but there are no dependencies between macroblocks.
The number of processors that are used depends on the constraints of the system and the requirements of the video stream compression application. For example, in a typical case, about 2560 threads at a time threads may be used to process 8160 macroblocks. This may be provided by a system that has 160 individual processors and is determined through the equation 160(4(N)), where 4 represents the number of threads processed at once on a processor in a group, and N(=2, 4, or 8) represents the number of groups that can be scheduled at once to overcome memory latency.
In the described motion estimation process, the filtering and analysis of the proposed neighboring motion vectors attempts to make two vectors the same, even if the “best” proposed vectors were not the same. This helps to improve video quality and/or lower the bitrate because in some percentage of cases the bits saved by making the vectors the same can be more than the bits lost by having a slightly greater residual data to compress. This type of filtering is very well suited to GPU processing where all the blocks are considered and compared in parallel in the GPU shader model of computing rather than the sequential block processing done on a CPU. However, the concept is applicable for CPUs, GPUs and dedicated hardware encoders. The specific filtering used may be selected based on the actual codec that is being used.
A method of calculating candidate motion vectors using different candidates from a given region is illustrated in
As discussed above with respect to at least
Referring now specifically to
This additional calculation for distortion may be performed on one processor while another processor calculates a larger area search as described above. For example, a low compute algorithm may search over a large area of several regions while a smaller area near the same prediction or another prediction point may be searched with a higher precision and/or using a more computation-intensive algorithm.
An example of the operation of method 800 is shown in
In implementing the present calculations various data buffer structures may be used. For example, a non-obvious data buffer structure may be used for the collection and storage of the different candidates. This structure may improve the performance on highly data parallel architectures, such as GPUs employing a parallel array of shaders, as well as implementations using multiple GPUs or heterogeneous computing environment, such as GPUs plus CPUs.
Generally, a data buffer structure for partitioning a large area into multiple regions may include an array of results such that the several results are sequentially arranged in memory. Such a data buffer structure may be sorted by accessing a small portion of the memory. For example, for a search with 1000 macroblocks and 4 candidates per block, the data buffer structure may be organized using four 16-bit unsigned integers as:
Alternatively, a data buffer structure utilizing an array of buffers may be used. This array of buffers may be organized as follows:
Buffer—0:
Buffer 1:
Buffer 2:
Buffer 3:
Using the array of buffers can enhance any method of calculation, such as those provided herein, and may be beneficial to a method using parallel GPUs. The array of buffers can operate by maintaining the final result after each sorting pass in buffer 0. Maintaining the final result in buffer 0 can be independent of how many buffers (regions or algorithms) are used. Further, the final result in buffer 0 may be maintained at all points during the processing, even including when a timeout on algorithm elapsed time occurs, for example. In addition, using the array of buffers architecture allows for additional algorithms and may provide for any needed additional buffers without impacting the existing code and configuration, thereby providing for a scalable architecture. Within the array of buffers, algorithm components may be focused on a specific task. For example, within a given buffer or group of buffers a given approximation may be performed. That is, search algorithms can operate with a single buffer to store the result of that calculation.
The cost bits may be tracked in each buffer. When different search algorithms are used, the “cost” field for the result may be normalized to an equivalent metric. For example, if SAD is used on a 4×4 downsampled block in one region and a SAD is 8×8 on a 2×2 downsampled block in another region, then the 4×4 SAD values may be multiplied by 4 to normalize the cost comparison as between these two methodologies.
The misc_bits field may be used to store information which may be utilized with the cost value of a sorting procedure. For example, the misc-bits field may be used to indicate how the distortion approximation is calculated, the confidence level of the computation, stability measure of each candidate during the multipass scoring/sorting procedure, and/or bugging and performance monitoring flags.
In addition, the data buffer structure may contain several bits that indicate the convergence and/or stability or measures thereof. For example, when using multiple passes that compare to neighbors, a two bit field may be used with:
A stability/convergence state machine 1000 is shown in
In general, embodiments described herein are directed to a method of performing motion estimation in a video encoder, comprising: calculating one or more candidate motion vectors for each macroblock of a video image to form a list of candidate motion vectors, calculating a cost for each candidate motion vector, sorting the list of candidate motion vectors by cost from lowest cost to highest cost, comparing the calculated candidate motion vectors of a first macroblock with the calculated candidate motion vectors of a plurality of neighbor macroblocks using the lowest cost candidate motion vector as the basis of the cost calculation, assigning a base score to each candidate motion vector for each macroblock with the lowest cost candidate motion vector for each macroblock receiving an increased base score, and increasing the base score or increased base score of a respective candidate motion vector by a point depending on its similarity with a candidate motion vector in a neighbor macroblock. Through an iterative process, the method resorts the list of candidate motion vectors based on score from lowest score to highest score to create a new list of candidate motion vectors, re-compares each candidate motion vector of the new list of candidate motion vectors with the calculated candidate motion vectors of the plurality of neighbor macroblocks, and re-scores the candidate motion vectors to determine the highest scoring candidate motion vector, and repeats these steps until the number of changes of the highest scoring candidate vector is below a defined minimum threshold. The method may also perform a spatial filtering step on the motion vector for each macroblock to adjust for minor differences between the motion vectors for the macroblocks. The method may be executed in a multi-processor computing environment in which a dedicated processing engine of a multi-processor system performs the step of calculating the one or more candidate motion vectors for a respective macroblock.
Embodiments of the motion estimation process described herein can be applied to standard predictive MPEG schemes, such as for the circuit of
Although embodiments have been described in relation to the H.264 standard, it should be noted that other similar standards may also be used as the basis for encoder circuit of
Embodiments can be used in transcoding systems. Transcoding is the direct digital-to-digital conversion of one digitally encoded format to another format. Transcoding can be found in many areas of content adaptation and is often used to convert incompatible or obsolete data into a more suitable format. It is also used to archive or distribute content on different types of digital media for use in different playback devices, such as converting songs from CD format to MP3 format for playback on computers and MP3 players and/or in converting video from a DV or DVC format camcorder to an MPEG-2 DVD, for example. Transcoding is also commonly used in the area of mobile phone content adaptation. In this case, transcoding is necessary due to the diversity of mobile devices and their capabilities. This diversity requires an intermediate state of content adaptation in order to make sure that the source content will adequately play back on the target device.
Although embodiments of the motion estimation system and process are directed to GPU components, such as GPU shaders, the method could be used on any computing device that implements some form of parallel computing. Furthermore, although embodiments have been described with reference to graphics systems comprising GPU devices or visual processing units (VPU), which are dedicated or integrated graphics rendering devices for a processing system, it should be noted that such embodiments can also be used for many other types of video production engines that are used in parallel. Such video production engines may be implemented in the form of discrete video generators, such as digital projectors, or they may be electronic circuitry provided in the form of separate IC (integrated circuit) devices or as add-on cards for video-based computer systems. In one embodiment, the system including the GPU control system comprises a computing device that is selected from the group consisting of: a personal computer, a workstation, a handheld computing device, a digital television, a media playback device, smart communication device, and a game console, or any other similar processing device.
The systems and/or components described herein may be implemented as one or more electronic circuits. Such circuits described herein can be implemented through the control of manufacturing processes and maskworks, which would be then used to manufacture the relevant circuitry. Such manufacturing process control and maskwork generation known to those of ordinary skill in the art include the storage of computer instructions on computer readable media including, for example, Verilog, VHDL or instructions in other hardware description languages.
Aspects of the system described herein may be implemented as functionality programmed into any of a variety of circuitry, including programmable logic devices (“PLDs”), such as field programmable gate arrays (“FPGAs”), programmable array logic (“PAL”) devices, electrically programmable logic and memory devices and standard cell-based devices, as well as application specific integrated circuits. Some other possibilities for implementing aspects include: memory devices, microcontrollers with memory (such as EEPROM), embedded microprocessors, firmware, software, etc. Furthermore, aspects of the video stream migration system may be embodied in microprocessors having software-based circuit emulation, discrete logic (sequential and combinatorial), custom devices, fuzzy (neural) logic, quantum devices, and hybrids of any of the above device types. The underlying device technologies may be provided in a variety of component types, e.g., metal-oxide semiconductor field-effect transistor (“MOSFET”) technologies like complementary metal-oxide semiconductor (“CMOS”), bipolar technologies like emitter-coupled logic (“ECL”), polymer technologies (e.g., silicon-conjugated polymer and metal-conjugated polymer-metal structures), mixed analog and digital, and so on.
It should also be noted that the various functions disclosed herein may be described using any number of combinations of hardware, firmware, and/or as data and/or instructions embodied in various machine-readable or computer-readable media, in terms of their behavioral, register transfer, logic component, and/or other characteristics. Computer-readable media in which such formatted data and/or instructions may be embodied include, but are not limited to, non-volatile storage media in various forms (e.g., optical, magnetic or semiconductor storage media) and carrier waves that may be used to transfer such formatted data and/or instructions through wireless, optical, or wired signaling media or any combination thereof. Examples of transfers of such formatted data and/or instructions by carrier waves include, but are not limited to, transfers (uploads, downloads, e-mail, etc.) over the Internet and/or other computer networks via one or more data transfer protocols (e.g., HTTP, FTP, SMTP, and so on). Additionally, embodiments may comprise applications which enable video encoding (such as video editing software, content creation software and the like). Such applications may include instructions which program general and/or special purpose processors (such as CPUs and/or GPUs or combinations thereof) to implement aspects of the invention described herein. Such applications may generate encoded video data which were produced in manners described herein.
Unless the context clearly requires otherwise, throughout the description and the claims, the words “comprise,” “comprising,” and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is to say, in a sense of “including, but not limited to.” Words using the singular or plural number also include the plural or singular number respectively. Additionally, the words “herein,” “hereunder,” “above,” “below,” and words of similar import refer to this application as a whole and not to any particular portions of this application. When the word “or” is used in reference to a list of two or more items, that word covers all of the following interpretations of the word: any of the items in the list, all of the items in the list and any combination of the items in the list.
The above description of illustrated embodiments of the motion estimation method and system is not intended to be exhaustive or to limit the embodiments to the precise form or instructions disclosed. While specific embodiments of, and examples for, processes in graphic processing units or ASICs are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the disclosed methods and structures, as those skilled in the relevant art will recognize.
The elements and acts of the various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the disclosed system in light of the above detailed description.
In general, in the following claims, the terms used should not be construed to limit the disclosed method to the specific embodiments disclosed in the specification and the claims, but should be construed to include all operations or processes that operate under the claims. Accordingly, the disclosed structures and methods are not limited by the disclosure, but instead the scope of the recited method is to be determined entirely by the claims.
While certain aspects of the disclosed embodiments are presented below in certain claim forms, the inventors contemplate the various aspects of the methodology in any number of claim forms. For example, while only one aspect may be recited as embodied in machine-readable medium, other aspects may likewise be embodied in machine-readable medium. Accordingly, the inventors reserve the right to add additional claims after filing the application to pursue such additional claim forms for other aspects.
This application is a Continuation of U.S. patent application Ser. No. 13/310,870 filed Dec. 5, 2011, which is a Continuation-in-Part of U.S. patent application Ser. No. 12/347,932, filed Dec. 31, 2008, which is incorporated by reference as if fully set forth.
Number | Date | Country | |
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Parent | 13310870 | Dec 2011 | US |
Child | 14635604 | US |
Number | Date | Country | |
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Parent | 12347932 | Dec 2008 | US |
Child | 13310870 | US |