An inkjet printing system, as one example of a fluid ejection system, may include a printhead, an ink supply which supplies liquid ink to the printhead, and an electronic controller which controls the printhead. The printhead, as one example of a fluid ejection device, ejects drops of ink through a plurality of nozzles or orifices and toward a print medium, such as a sheet of paper, so as to print onto the print medium. In some examples, the orifices are arranged in at least one column or array such that properly sequenced ejection of ink from the orifices causes characters or other images to be printed upon the print medium as the printhead and the print medium are moved relative to each other.
In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific examples in which the disclosure may be practiced. It is to be understood that other examples may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims. It is to be understood that features of the various examples described herein may be combined, in part or whole, with each other, unless specifically noted otherwise.
Fluid ejection dies, such as thermal inkjet (TIJ) dies may be narrow and long pieces of silicon. To minimize the total number of contact pads on a die, it is desirable for at least some of the contact pads to provide multiple functions. Accordingly, disclosed herein are integrated circuits (e.g., fluid ejection dies) including a multipurpose contact pad (e.g., sense pad) coupled to a memory, thermal sensors, internal test logic, a timer circuit, a crack detector, and/or other circuitry. The multipurpose contact pad receives signals from each of the circuits (e.g., one at a time), which may be read by printer logic. By using a single contact pad for multiple functions, the number of contact pads on the integrated circuit may be reduced. In addition, the printer logic coupled to the contact pad may be simplified.
As used herein a “logic high” signal is a logic “1” or “on” signal or a signal having a voltage about equal to the logic power supplied to an integrated circuit (e.g., between about 1.8 V and 15 V, such as 5.6 V). As used herein a “logic low” signal is a logic “0” or “off” signal or a signal having a voltage about equal to a logic power ground return for the logic power supplied to the integrated circuit (e.g., about 0 V).
The digital circuit 104 outputs a digital signal to the interface 102 through control logic 108. In one example, the digital circuit 104 includes a memory. In another example, the digital circuit 104 includes a timer. In another example, the digital circuit 104 includes a configuration register. In yet another example, the digital circuit 104 includes a shift register.
The analog circuit 106 outputs an analog signal to the interface 102 through control logic 108. In one example, the analog circuit 106 includes a resistor wiring. The resistor wiring may be separate from and extend along at least a subset of fluid actuation devices (e.g. fluid actuation devices 608, which will be described below with reference to
The control logic 108 activates the digital circuit 104 or the analog circuit 106 such that an output of the digital circuit 104 or the analog circuit 106 may be read through interface 102. In one example, control logic 108 activates the digital circuit 104 or the analog circuit 106 based on data passed to integrated circuit 100. Control logic 108 may include transistor switches, tristate buffers, and/or other suitable logic circuitry for controlling the operation of integrated circuit 100.
Configuration register 122 may be a memory device (e.g., non-volatile memory, shift register, etc.) and may include any suitable number of bits (e.g., 4 bits to 24 bits, such as 12 bits). In certain examples, configuration register 122 may also store configuration data for testing integrated circuit 120, detecting cracks within a substrate of integrated circuit 120, enabling timers of integrated circuit 120, setting analog delays of integrated circuit 120, validating operations of integrated circuit 120, or for configuring other functions of integrated circuit 120.
The digital circuit 214 outputs a digital signal to the interface 202. In one example, the digital circuit 214 is similar to the digital circuit 104 previously described and illustrated with reference to
The delay circuit 310 receives a fire signal through the fire interface 312 and outputs a delayed fire signal through the output interface 302. In this way, the delay circuit 310 may be tested to make sure the delay is functioning as expected. In one example, the configuration register 322 stores data to enable or disable the shifting of the nozzle data out of the integrated circuit 320 through the output interface 302. In another example, the configuration register 322 stores data to enable or disable the output of the delayed fire signal through the output interface 302. In yet another example, configuration register 322 stores data to enable or disable analog circuit 314. In one example, configuration register 322 is similar to configuration register 122 previously described and illustrated with reference to
Analog circuit 314 outputs an analog signal to the output interface 302. In one example, analog circuit 314 is similar to analog circuit 106 previously described and illustrated with reference to
The output interface 302, the data interface 306, and the fire interface 312 may each include a contact pad, a pin, a bump, or a wire. In one example, each of the output interface 302, the data interface 306, and the fire interface 312 is configured to contact a corresponding printer-side contact to transmit signals to and from the printer-side contacts.
Shift register 404 and delay circuit 410 are similar to shift register 304 and delay circuit 310 previously described and illustrated with reference to
Control logic 408 may enable or disable shift register 404, delay circuit 410, crack detector 414, thermal sensor 416, memory 418, and timer 424. In one example, control logic 408 may enable one of the shift register 404, delay circuit 410, crack detector 414, thermal sensor 416, memory 418, and timer 424 at a time. In another example, control logic 408 may enable timer 424 and one of the shift register 404, delay circuit 410, crack detector 414, thermal sensor 416, and memory 418. In one example, control logic 408 may enable or disable shift register 404, delay circuit 410, crack detector 414, thermal sensor 416, memory 418, and timer 424 based on data stored in configuration register 422. In one example, configuration register 422 is similar to configuration register 122 previously described and illustrated with reference to
Sense pad 502 is electrically coupled to one side of the source-drain path of transistor 506, one side of the source-drain path of the transistor 570 of each thermal sensor 5141 to 514M, the output of tristate buffer 522, one side of the source-drain path of transistor 538, and one side of the source-drain path of transistor 542. The other side of the source-drain path of transistor 506 is electrically coupled to one side of the source-drain path of transistor 510. The gate of transistor 506 and the gate of transistor 510 are electrically coupled to a memory enable signal path 504. The other side of the source drain path of transistor 510 is electrically coupled to one side of the source-drain path of the floating gate transistor 550 of each memory cell 5121 to 512N.
While memory cell 5121 is illustrated and described herein, the other memory cells 5122 to 512N include a similar circuit as memory cell 5121. The other side of the source-drain path of floating gate transistor 550 is electrically coupled to one side of the source-drain path of transistor 552. The gate of transistor 552 is electrically coupled to a memory enable signal path 504. The other side of the source-drain path of transistor 552 is electrically coupled to one side of the source-drain path of transistor 556. The gate of transistor 556 is electrically coupled to a bit enable signal path 558. The other side of the source-drain path of transistor 556 is electrically coupled to a common or ground node 540.
While thermal sensor 5141 is illustrated and described herein, the other thermal sensors 5142 to 514M include a similar circuit as thermal sensor 5141. The gate of transistor 570 is electrically coupled to a thermal sensor enable signal path 569. The other side of the source-drain path of transistor 570 is electrically coupled to the anode of thermal diode 572. The cathode of thermal diode 572 is electrically coupled to a common or ground node 540.
An enable input of tristate buffer 522 is electrically coupled to a test enable signal path 524. The input of tristate buffer 522 is electrically coupled to the output of multiplexer 518 through a signal path 520. A control input of multiplexer 518 is electrically coupled to a test mode signal path 516. A first input of multiplexer 518 is electrically coupled to nozzle column 530 through a signal path 526. A second input of multiplexer 518 is electrically coupled to nozzle column 530 through a signal path 528. Nozzle column 530 is electrically coupled to a fire interface 532 and a data interface 534.
The gate of transistor 538 is electrically coupled to a timer elapsed signal path 536. The other side of the source-drain path of transistor 538 is electrically coupled to a common or ground node 540. The gate of transistor 542 is electrically coupled to a crack detector enable signal path 541. The other side of the source-drain path of transistor 542 is electrically coupled to one side of crack detector 544. The other side of crack detector 544 is electrically coupled to a common or ground node 540.
The memory enable signal on memory enable signal path 504 determines whether a memory cell 5121 to 512N may be accessed. In response to a logic high memory enable signal, transistors 506, 510, and 552 are turned on (i.e., conducting) to enable access to memory cells 5121 to 512N. In response to a logic low memory enable signal, transistors 506, 510, and 552 are turned off to disable access to memory cells 5121 to 512N. With a logic high memory enable signal, a bit enable signal may be activated to access a selected memory cell 5121 to 512N. With a logic high bit enable signal, transistor 556 is turned on to access the corresponding memory cell. With a logic low bit enable signal, transistor 556 is turned off to block access to the corresponding memory cell. With a logic high memory enable signal and a logic high bit enable signal, the floating gate transistor 550 of the corresponding memory cell may be accessed for read and write operations through sense pad 502. In one example, the memory enable signal may be based on a data bit stored in a configuration register, such as configuration register 422 of
Each thermal sensor 5141 to 514M may be enabled or disabled via a corresponding thermal sensor enable signal on thermal sensor enable signal path 569. In response to a logic high thermal sensor enable signal, the transistor 570 for the corresponding thermal sensor 5141 to 514M is turned on to enable the thermal sensor by electrically connecting thermal diode 572 to sense pad 502. In response to a logic low thermal sensor enable signal, the transistor 570 for the corresponding thermal sensor 5141 to 514M is turned off to disable the thermal sensor by electrically disconnecting thermal diode 572 from sense pad 502. With a thermal sensor enabled, the thermal sensor may be read through sense pad 502, such as by applying a current to sense pad 502 and sensing a voltage on sense pad 502 indicative of the temperature. In one example, the thermal sensor enable signal may be based on data stored in a configuration register, such as configuration register 422 of
Tristate buffer 522 may be enabled or disabled in response to the test enable signal on test enable signal path 524. In response to a logic high test enable signal, tristate buffer 522 is enabled to pass signals from signal path 520 to sense pad 502. In response to a logic low test enable signal, tristate buffer 522 is disabled and outputs a high impedance signal to sense pad 502. Nozzle column 530 may include a shift register and a delay circuit used to fire fluid actuation devices. The test mode signal on test mode signal path 516 determines whether the shift register or the delay circuit of the nozzle column 530 is to be tested and controls the multiplexer 518 accordingly. To test the shift register of nozzle column 530, data is passed to nozzle column 530 through data interface 534 and shifted out of the shift register to signal path 528 and through multiplexer 518 and tristate buffer 522 to sense pad 502. To test the delay circuit of nozzle column 530, a fire signal on fire interface 532 is passed to nozzle column 530. After passing through the delay circuit, the delayed fire signal is passed to signal path 526 and through multiplexer 518 and tristate buffer 522 to sense pad 502. In one example, the test enable signal and the test mode signal may be based on data stored in a configuration register, such as configuration register 422 of
Transistor 538 may provide a pulldown device, which is enabled in response to a timer elapsed signal on timer elapsed signal path 536. The timer elapsed signal is provided by a timer, such as timer 424 of
Crack detector 544 may be enabled or disabled in response to the crack detector enable signal on crack detector enable signal path 541. In response to a logic high crack detector enable signal, the transistor 542 is turned on to enable crack detector 544 by electrically connecting crack detector 544 to sense pad 502. In response to a logic low crack detector enable signal, the transistor 542 is turned off to disable the crack detector 544 by electrically disconnecting crack detector 544 from sense pad 502. With crack detector 544 enabled, the crack detector 544 may be read through sense pad 502, such as by applying a current or voltage to sense pad 502 and sensing a voltage or current, respectively, on sense pad 502 indicative of the state of crack detector 544. In one example, the crack detector enable signal may be based on data stored in a configuration register, such as configuration register 422 of
The fire interface 532 and the data interface 534 may each include a contact pad, a pin, a bump, or a wire. In one example, each of the fire interface 532, the data interface 534, and the sense pad 502 is configured to contact a corresponding printer-side contact to transmit signals to and from the printer-side contacts. Accordingly, through a single sense pad 502, a printer may be connected to memory cells 5121 to 512N, thermal sensors 5141 to 514M, nozzle column 530, pulldown device 538, and crack detector 544.
The second column 604 of contact pads is aligned with the first column 602 of contact pads and at a distance (i.e., along the Y axis) from the first column 602 of contact pads. The column 606 of fluid actuation devices 608 is disposed longitudinally to the first column 602 of contact pads and the second column 604 of contact pads. The column 606 of fluid actuation devices 608 is also arranged between the first column 602 of contact pads and the second column 604 of contact pads. In one example, fluid actuation devices 608 are nozzles or fluidic pumps to eject fluid drops.
In one example, the first column 602 of contact pads includes six contact pads. The first column 602 of contact pads may include the following contact pads in order: a data contact pad 610, a clock contact pad 612, a logic power ground return contact pad 614, a multipurpose input/output contact (e.g., sense) pad 616, a first high voltage power supply contact pad 618, and a first high voltage power ground return contact pad 620. Therefore, the first column 602 of contact pads includes the data contact pad 610 at the top of the first column 602, the first high voltage power ground return contact pad 620 at the bottom of the first column 602, and the first high voltage power supply contact pad 618 directly above the first high voltage power ground return contact pad 620. While contact pads 610, 612, 614, 616, 618, and 620 are illustrated in a particular order, in other examples the contact pads may be arranged in a different order.
In one example, the second column 604 of contact pads includes six contact pads. The second column 604 of contact pads may include the following contact pads in order: a second high voltage power ground return contact pad 622, a second high voltage power supply contact pad 624, a logic reset contact pad 626, a logic power supply contact pad 628, a mode contact pad 630, and a fire contact pad 632. Therefore, the second column 604 of contact pads includes the second high voltage power ground return contact pad 622 at the top of the second column 604, the second high voltage power supply contact pad 624 directly below the second high voltage power ground return contact pad 622, and the fire contact pad 632 at the bottom of the second column 604. While contact pads 622, 624, 626, 628, 630, and 632 are illustrated in a particular order, in other examples the contact pads may be arranged in a different order.
In one example, data contact pad 610 may provide data interface 306 of
Data contact pad 610 may be used to input serial data to die 600 for selecting fluid actuation devices, memory bits, thermal sensors, configuration modes (e.g. via a configuration register), etc. Data contact pad 610 may also be used to output serial data from die 600 for reading memory bits, configuration modes, status information (e.g., via a status register), etc. Clock contact pad 612 may be used to input a clock signal to die 600 to shift serial data on data contact pad 610 into the die or to shift serial data out of the die to data contact pad 610. Logic power ground return contact pad 614 provides a ground return path for logic power (e.g., about 0 V) supplied to die 600. In one example, logic power ground return contact pad 614 is electrically coupled to the semiconductor (e.g., silicon) substrate 640 of die 600. Multipurpose input/output contact pad 616 may be used for analog sensing and/or digital test modes of die 600.
First high voltage power supply contact pad 618 and second high voltage power supply contact pad 624 may be used to supply high voltage (e.g., about 32 V) to die 600. First high voltage power ground return contact pad 620 and second high voltage power ground return contact pad 622 may be used to provide a power ground return (e.g., about 0 V) for the high voltage power supply. The high voltage power ground return contact pads 620 and 622 are not directly electrically connected to the semiconductor substrate 640 of die 600. The specific contact pad order with the high voltage power supply contact pads 618 and 624 and the high voltage power ground return contact pads 620 and 622 as the innermost contact pads may improve power delivery to die 600. Having the high voltage power ground return contact pads 620 and 622 at the bottom of the first column 602 and at the top of the second column 604, respectively, may improve reliability for manufacturing and may improve ink shorts protection.
Logic reset contact pad 626 may be used as a logic reset input to control the operating state of die 600. Logic power supply contact pad 628 may be used to supply logic power (e.g., between about 1.8 V and 15 V, such as 5.6 V) to die 600. Mode contact pad 630 may be used as a logic input to control access to enable/disable configuration modes (i.e., functional modes) of die 600. Fire contact pad 632 may be used as a logic input to latch loaded data from data contact pad 610 and to enable fluid actuation devices or memory elements of die 600.
Die 600 includes an elongate substrate 640 having a length 642 (along the Y axis), a thickness 644 (along the Z axis), and a width 646 (along the X axis). In one example, the length 642 is at least twenty times the width 646. The width 646 may be 1 mm or less and the thickness 644 may be less than 500 microns. The fluid actuation devices 608 (e.g., fluid actuation logic) and contact pads 610-632 are provided on the elongate substrate 640 and are arranged along the length 642 of the elongate substrate. Fluid actuation devices 608 have a swath length 652 less than the length 642 of the elongate substrate 640. In one example, the swath length 652 is at least 1.2 cm. The contact pads 610-632 may be electrically coupled to the fluid actuation logic. The first column 602 of contact pads may be arranged near a first longitudinal end 648 of the elongate substrate 640. The second column 604 of contact pads may be arranged near a second longitudinal end 650 of the elongate substrate 640 opposite to the first longitudinal end 648.
Printhead assembly 702 includes at least one printhead or fluid ejection die 600 previously described and illustrated with reference to
Ink supply assembly 710 supplies ink to printhead assembly 702 and includes a reservoir 712 for storing ink. As such, in one example, ink flows from reservoir 712 to printhead assembly 702. In one example, printhead assembly 702 and ink supply assembly 710 are housed together in an inkjet or fluid-jet print cartridge or pen. In another example, ink supply assembly 710 is separate from printhead assembly 702 and supplies ink to printhead assembly 702 through an interface connection 713, such as a supply tube and/or valve.
Carriage assembly 716 positions printhead assembly 702 relative to print media transport assembly 718, and print media transport assembly 718 positions print media 724 relative to printhead assembly 702. Thus, a print zone 726 is defined adjacent to nozzles 608 in an area between printhead assembly 702 and print media 724. In one example, printhead assembly 702 is a scanning type printhead assembly such that carriage assembly 716 moves printhead assembly 702 relative to print media transport assembly 718. In another example, printhead assembly 702 is a non-scanning type printhead assembly such that carriage assembly 716 fixes printhead assembly 702 at a prescribed position relative to print media transport assembly 718.
Service station assembly 704 provides for spitting, wiping, capping, and/or priming of printhead assembly 702 to maintain the functionality of printhead assembly 702 and, more specifically, nozzles 608. For example, service station assembly 704 may include a rubber blade or wiper which is periodically passed over printhead assembly 702 to wipe and clean nozzles 608 of excess ink. In addition, service station assembly 704 may include a cap that covers printhead assembly 702 to protect nozzles 608 from drying out during periods of non-use. In addition, service station assembly 704 may include a spittoon into which printhead assembly 702 ejects ink during spits to ensure that reservoir 712 maintains an appropriate level of pressure and fluidity, and to ensure that nozzles 608 do not clog or weep. Functions of service station assembly 704 may include relative motion between service station assembly 704 and printhead assembly 702.
Electronic controller 720 communicates with printhead assembly 702 through a communication path 703, service station assembly 704 through a communication path 705, carriage assembly 716 through a communication path 717, and print media transport assembly 718 through a communication path 719. In one example, when printhead assembly 702 is mounted in carriage assembly 716, electronic controller 720 and printhead assembly 702 may communicate via carriage assembly 716 through a communication path 701. Electronic controller 720 may also communicate with ink supply assembly 710 such that, in one implementation, a new (or used) ink supply may be detected.
Electronic controller 720 receives data 728 from a host system, such as a computer, and may include memory for temporarily storing data 728. Data 728 may be sent to fluid ejection system 700 along an electronic, infrared, optical or other information transfer path. Data 728 represent, for example, a document and/or file to be printed. As such, data 728 form a print job for fluid ejection system 700 and includes at least one print job command and/or command parameter.
In one example, electronic controller 720 provides control of printhead assembly 702 including timing control for ejection of ink drops from nozzles 608. As such, electronic controller 720 defines a pattern of ejected ink drops which form characters, symbols, and/or other graphics or images on print media 724. Timing control and, therefore, the pattern of ejected ink drops, is determined by the print job commands and/or command parameters. In one example, logic and drive circuitry forming a portion of electronic controller 720 is located on printhead assembly 702. In another example, logic and drive circuitry forming a portion of electronic controller 720 is located off printhead assembly 702.
Although specific examples have been illustrated and described herein, a variety of alternate and/or equivalent implementations may be substituted for the specific examples shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the specific examples discussed herein. Therefore, it is intended that this disclosure be limited only by the claims and the equivalents thereof.
This application is a Divisional of application Ser. No. 16/956,326, filed Jun. 19, 2020 entitled: MULTIPLE CIRCUITS COUPLED TO AN INTERFACE, which is 371 National Application of PCT/US2019/016724, filed Feb. 6, 2019, entitled MULTIPLE CIRCUITS COUPLED TO AN INTERFACE, both of which are incorporated herein.
Number | Date | Country | |
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Parent | 16956326 | Jun 2020 | US |
Child | 17962736 | US |