Mayeda W., "Diode Circuit", IBM Technical Disclosure Bulletin, vol. 3, No. 10, Mar. 1961, p. 77. |
Baskin, H. B., "N-Valued Logic Circuit", IBM Technical Disclosure Bulletin, vol. 3, No. 10, Mar. 1961, p. 81. |
Akmenkalns, I. G., "Odd-Even Circuit", IBM Technical Disclosure Bulletin, vol. 4, No. 12, May 1962, p. 76. |
Explanation of "Multiple-Valued ECL Quantization Circuit" T. Higuchi and M. Kameyama, Multiple-Valued Digital Processing System (Shokado, 1989) p. 77. |
"Multivalued SRAM Cell Using Resonant Tunneling Diodes" by Sen-Jung Wei and Hung Chang Lin IEEE Journal of Solid-State Circuits. vol. 27, No. 2 Feb. 1992, pp. 212-216. |
M. W. Dellow, P.H. Beton, M. Henini, P. C. Main, L. Eaves, S. P. Beaumont, and C. D. W. Wilkinson, "Gated resonant tunneling devices," Electron. Lett., 27(2), 134-136 (1991). |
K. Maezawa and T. Mizutani, "A new resonant tunneling logic gate employing monostable bistable transition," Jpn. J. Appl. Phys. Pt. 2,32(1A-B), L42-44 (1993). |