The present disclosure relates to an inkjet print head chip, and more particularly to a modular inkjet print head chip including a metal oxide semiconductor.
With the rapid development of technology, the size and shape of an inkjet print head are also changing according to the requirements of different customers, for example faster printing speeds. However, the changes in the size and shape of the inkjet head are limited by the size of the photomask in the manufacturing process, and increase the production costs.
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However, in the conventional inkjet print head chip 9, since the ESD protection unit 92 needs to be arranged adjacent to the corresponding electrode pad 91, and the heater switch 94 needs to be arranged adjacent to the corresponding heater 93, the flexibility in configuration is low. Furthermore, due to the size limitation of photomask, it is difficult to produce a narrow type inkjet print head in response to customization requirements for industrial use.
An object of the present disclosure is to provide a narrow type inkjet print head chip including complementary metal oxide semiconductor (CMOS) or N-type metal oxide semiconductor (NMOS) circuits, which is not limited by the size of the photomask, and is able to form various lengths and shapes of print heads by changing a part of the photomask. It has advantages of high flexibility and low production cost.
In accordance with an aspect of the present disclosure, a narrow type inkjet print head chip is provided and includes a silicon substrate, an active component layer and a passive component layer. The silicon substrate includes a first long side, a second long side opposite to the first long side, a first short side connected to the first long side and the second long side, and a second short side connected to the first long side and the second long side, and opposite to the first short side. The active component layer is stacked on the silicon substrate and includes a plurality of electro static discharge (ESD) protection units disposed adjacent to the first long side and arranged along the first long side, a plurality of encoder switches disposed adjacent to the first long side and arranged along the first long side, a plurality of discharge protection units disposed adjacent to the first long side and arranged along the first long side, and a plurality of heater switches disposed in parallel with the plurality of electro static discharge (ESD) protection units. The plurality of electro static discharge (ESD) protection units, the plurality of encoder switches, the plurality of discharge protection units and the plurality of heater switches are disposed in each of at least two high-precision regions of the active component layer, respectively, wherein the corresponding positions and quantities of the plurality of electro static discharge (ESD) protection units, the plurality of encoder switches, the plurality of discharge protection units and the plurality of heater switches are the same in the at least two high-precision regions. The passive component layer is stacked on the active component layer and includes a plurality of heaters arranged along the second long side, a plurality of electrode pads, a plurality of encoders arranged along the first long side and adjacently connected to the plurality of encoder switches, respectively, and a plurality of circuit traces electrically connected to the plurality of electro static discharge (ESD) protection units, the plurality of encoder switches, the plurality of discharge protection units, the plurality of heater switches, the plurality of heaters, the plurality of electrode pads and the plurality of encoders.
The above contents of the present disclosure will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, in which:
The present disclosure will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this invention are presented herein for purpose of illustration and description only. It is not intended to be exhaustive or limited to the precise embodiments disclosed.
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The active component layer 12 is stacked on the silicon substrate 11. The active component layer 12 includes a plurality of electro static discharge (ESD) protection units 121, a plurality of encoder switches 122, a plurality of discharge protection units 123 and a plurality of heater switches 124. The EDS protection units 121 are disposed adjacent to the first long side 111 and arranged along the first long side 111. The plurality of encoder switches 122 are disposed adjacent to the first long side 111 and arranged along the first long side 111. The plurality of discharge protection units 123 are disposed adjacent to the first long side 111 and arranged along the first long side 111. In the embodiment, the ESD protection units 121, the encoder switches 122 and the discharge protection units 123 are arranged in a row along the first long side 111, but the present disclosure is not limited thereto. The heater switches 124 are located at the middle area of the narrow type inkjet print head chip 1, and disposed in parallel with the ESD protection units 121, the encoder switches 122 and the discharge protection units 123.
In the embodiment, the narrow type inkjet print head chip 1 includes at least two high-precision regions, and the plurality of ESD protection units 121, the plurality of encoder switches 122, the plurality of discharge protection units 123 and the plurality of heater switches 124 are disposed in each of the at least two high-precision regions of the active component layer 12, respectively. Preferably but not exclusively, corresponding positions and quantities of the plurality of ESD protection units 121, the plurality of encoder switches 122, the plurality of discharge protection units 123 and the plurality of heater switches 124 are the same in the at least two high-precision regions.
The passive component layer 13 is stacked on the active component layer 12. The passive component layer 13 includes a plurality of heaters 131, a plurality of electrode pads 132, a plurality of circuit traces 133 and a plurality of encoders 134. The plurality of heaters 131 are arranged along the second long side 112 of the silicon substrate 11, and arranged in a row. The plurality of electrode pads 132 are arranged along the first short side 113 and the second short side 114. In the embodiment, a part of the electrode pads 132 are arranged along the first short side 113, and another part of the electrode pads 132 are arranged along the second short side 114, and the present disclosure is not limited thereto. The plurality of encoders 134 are arranged along the first long side 111, and adjacently connected to the corresponding encoder switches 122, respectively. The plurality of circuit traces 133 are electrically connected to the plurality of ESD protection units 121, the plurality of encoder switches 122, the plurality of discharge protection units 123, the plurality of heater switches 124, the plurality of heaters 131, the plurality of electrode pads 132 and the plurality of encoders 134. Preferably but not exclusively, the circuit traces 133 are respectively disposed on different metal layers, so that the complicated circuit jumper can be reduced. The passive component layer 13 is made of at least one material selected from the group consisting of gold, aluminum, tantalum and a combination thereof.
In the embodiment, the heaters 131 are arranged in a row with 300 dots per inch (DPI), but the present disclosure is not limited thereto. In other embodiment, the arrangement of the heaters 131 is adjustable according to the design requirements.
Notably, in the embodiment, preferably but not exclusively, the discharge protection units 123 are pull down resistor (RPD) protection devices, but not limited thereto. In the embodiment, preferably but not exclusively, the EDS protection units 121, the encoder switches 122, the discharge protection units 123, and the heater switches 124 are N-type metal oxide semiconductor (NMOS) elements, respectively, but not limited thereto. In other embodiments, the ESD protection units 121, the encoder switches 122, the discharge protection units 123 and the heater switches 124 are complementary metal oxide semiconductor (CMOS) elements or bipolar elements, respectively.
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In addition, taking the first high-precision region 1a as an example, a part of the discharge protection units 123, a part of the ESD protection units 121, the encoder switches 122, another part of the ESD protection units 121 and another part of the discharge protection units 123 are sequencently arranged in a row along the first long side 111, and the heater switches 124 are arranged in parallel with the foregoing components in a row, but not limited thereto. In the embodiment, the corresponding positions and quantities of the components disposed in each high-precision region are the same. Therefore, when the components in the first high-precision region 1a are arranged in the above-mentioned manner, the components of the active component layer 12 in the second high-precision region 1b (or the third high-precision region 1c) are also arranged in the same manner, so that a part of the discharge protection units 123, a part of the ESD protection units 121, the encoder switches 122, another part of the ESD protection units 121 and another part of the discharge protection units 123 are sequentially arranged in a row along the first long side 111, and the heater switches 124 are arranged in parallel with the foregoing components in a row.
Notably, in the embodiment, each high-precision region has a length of 13500 micrometers (μm) and a width of 2500 micrometers (μm). Taking the first high-precision region 1a and the second high-precision region 1b as an example, the lengthwise distance between the first high-precision region 1a and the second high-precision region 1b is 100 micrometers (μm). In addition, since the heaters 131 are arranged in a row on the silicon substrate 11 with 300 DPI. In the embodiment, the length and the width of each heater 131 are both 35 micrometers (μm) and the distance between each pair of the heaters 131 is 50 microns (μm). Preferably but not exclusively, a part of the heaters 131 are arranged at the junction of the first high-precision region 1a and the second high-precision region 1b.
In the embodiment, the manufacturing process of the narrow type inkjet print head chip 1 is divided into a front-end manufacturing process and a back-end manufacturing process. The front-end manufacturing process is shown in
After the components of the active component layer 12 are arranged, the back-end manufacturing process is executed, as shown in
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From the above descriptions, the present disclosure provides a narrow type inkjet print head chip. The inkjet print head chip is modularized by modifying the chip layout and the manufacturing process, so as to accelerate the printing speed and meet customer requirements. In addition, the inkjet print head chip includes the circuits of the complementary metal oxide semiconductor (CMOS) or the N-type metal oxide semiconductor (NMOS), which is not limited by the size of the photomask, and has high flexibility and low production cost. On the other hand, the manufacturing process of the present disclosure is divided into a front-end manufacturing process and a back-end manufacturing process. In the front-end manufacturing process, the high-precision electronic components of the active component layer are produced by using the stepped photomasks to perform the exposure processes sequentially. In the back-end manufacturing process, the low-precision electronic components of the passive component layer are produced by using a normal photomask to perform the exposure process in one time. Moreover, the corresponding positions and quantities of the high-precision regions of the active component layer are fixed, so that the photomasks having the same pattern are used in the front-end manufacturing process to produce the inkjet print head chips in any size. Under different requirements, 1-inch three inkjet print head chips or multi-color wide-format inkjet print head chips can be configured through the 1.5-inch and/or 2-inch narrow type inkjet print head chip without the need to reconstruct the photomasks of the front-end manufacturing process. Moreover, when the active component layer is configured by different high-precision regions, it is also not need to replace the photomasks, but only needs to adjust the photomask used for the passive component layer to change the position and layout of the heaters, the electrode pads and the circuit traces of the passive component layer to complete the manufacturing without replacing the photomasks used for the active component layer. This is advantageous to save time and cost.
While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention is not need to be limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims so as to encompass all such modifications and similar structures.
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109109504 | Mar 2020 | TW | national |
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Number | Date | Country | |
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20210291523 A1 | Sep 2021 | US |