BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of a navigation system according to one embodiment of the present invention; and FIG. 1(A) is a functional block diagram of the CPU in FIG. 1(A);
FIG. 2 is a diagram illustrating communication between the navigation system and a road traffic information center (VICS®);
FIG. 3 is a main flowchart of a congestion information display routine (program) that the navigation system executes for display of congestion information when the map display area is a wide area display reduced to a specified scale or smaller;
FIG. 4 is a flowchart of a sub-routine for area information display in the routine of FIG. 3;
FIG. 5 is a continuation of the flowchart of FIG. 3;
FIG. 6 is a diagram illustrating transition from step S115 directly to step S116 in FIG. 5;
FIG. 7 is a diagram illustrating transition from step S116 directly to step S117 in FIG. 5;
FIG. 8 is a diagram illustrating transition from step S115 directly to step S117 in FIG. 5; and
FIG. 9 is a diagram that shows an example of a congestion information display and a wide area display (1:160,000 scale diagram) at a reduced scale of 1/160,000 that is implemented at step S126.