1. Field of the Invention
The present invention relates to a Universal Mobile Telecommunications System Frequency-Division Duplexing (UMTS FDD) communications system, and in particular, relates to a network server, mobile communications device, and method thereof in a UMTS FDD communications system.
2. Description of the Related Art
In a Universal Mobile Telecommunications System Frequency-Division Duplexing (UMTS FDD) environment such as a Universal Mobile Telecommunications System (UMTS), a blind transport format detection (BTFD) can be utilized to determine a transport format for decoding received data, leading to increased system capacity.
A detailed description is given in the following embodiments with reference to the accompanying drawings.
An embodiment of a method performed by a network server is described, comprising: receiving a first data from an uplink dedicated data physical channel (UL DPDCH); despreading the first data with a plurality of spreading factors; and determining a transport format of the first data that is being used based on all despreaded data, wherein the first data has a variable data rate.
Another embodiment of a method performed by a network server is provided, comprising: receiving a first data from a first radio frame on a UL DPDCH; despreading the first data with a fixed spreading factor; de-rate maching the despreaded first data with a plurality of de-rate matching schemes; and determining a transport format of the first data that is being used based on all decoded data.
Another embodiment of a method performed by a mobile communications device is disclosed, comprising rate matching a first data to a fixed data length; spreading the rate matched first data with a fixed spreading factor; and transmitting the spreaded data on a UL DPDCH.
Another embodiment of a method performed by a mobile communications device is revealed, comprising generating a radio frame which only consists of a pilot data, a feedback indication (FBI) data, and a transmit power control (TPC) data; and transmitting the radio frame on an uplink dedicated control physical channel (UL DPCCH).
The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
Since 1999, 3rd Generation Partnership Project (3GPP) relasesed several versions of spread-spectrum-based mobile communications system, including Universal Mobile Telecommunications Systems (UMTS), High-Speed Packet Access (HSPA), and High-Speed Packet Access+(HSPA+). The following discussions are based on UMTS Frequency-Division Duplexing (FDD) communications system, which is also called Release 99 FDD to discriminate from those new features in later releases. We will illustrate various features and benefits of the disclosed power control methods, devices and systems.
The UTRAN 1 implements a blind transport format detection (BTFD) scheme for the circuit switched service on the Node B 10 according to various embodiments of the invention, as detailed by
In the case of a speech data, each speech data is transmitted over 2 radio frames on the uplink and downlink DPCHs, which indicates how often data arrive from the higher layers to a physical layer. The BTFD method implemented on the Node B 10 can decide a format for the received speech data by processing the received speech data by embodiments and methods introduced in
The DPCCH radio frame includes a Pilot field 220, a TFCI field 222, a feedback information (FBI) field 224, and a transmit power control (TPC) field 226. The Pilot field 220 contains pilot bits which allow the Node B 10 to maintain synchronization and to provide the channel estimation as well as the downlink transmit power control (TPC). More specifically, the pilot bits are used by the receiver of the Node B 10 to determine a Signal-to-Interference Ratio (SINR) which is then compared with the uplink target SINR for generating a downlink TPC command. The TPC command is then included in the TPC field 226 for the downlink inner loop power control, instructing the Node B 10 to either increase or decrease their transmission powers. The TFCI field 222 is optional, and contains a TFCI data to inform the Node B 10 of the transport combination at any instant of time. When the TFCI data is absent from the radio frame, the Node B 10 has to perform a blind detection of the transport format combination by CRC check results. In the 3GPP Release 99, the blind detection is only implemented for a fixed rate data. The FBI field 224 includes an FBI data for closed-loop downlink transmission diversity mode or for site selection diversity transmit mode.
Before being transmitted over the UL DPCH, the uplink DPDCH and DPCCH radio frames on the I and Q components are separately multiplied by different spreading codes, and then multiplied by UE-specific scrambling codes to separate transmission for different UEs in the cell coverage. The spreading factor of spreading code for the DPDCH radio frames may range from 4 to 256. The spreading factor of spreading code for the DPCCH radio frames may be 256. The spreading factor on the DPDCH may vary on a frame by frame basis.
For example, since the TFCI field is removed in the present embodiment, the data length of the pilot field 300 for slot form at #0 may be increased to 8 bits, leading to an increased accuracy in estimating the signal quality for the channel.
As a consequence of the expanded pilot field 300, accuracy of signal quality and channel estimation by the Node B 10 can be increased, resulting in an increased system capacity. In some embodiments where the closed loop transmit diversity (CLTD) and site selection diversity transmit is not applied, the FBI field 302 can also be removed from the slot format, rendering further increased available data space for the pilot field 300 and the TPC field 304. The blind detection method incorporated with the UL DPCCH slot format 3 is detailed in the methods 5 through 8 in
The Block types 1-3 are different in data length. The UE 14 is configured to take the Block types 1-3 and make them equal in length (fixed data length or fixed data size) by a predetermined repetition pattern, or simply repeating the block data until a fixed data length is filled. For example, the UE 14 can directly repeat the block 400 four times to derive a encoded block 420, repeat the block 402 twice to produce the encoded block 422, and retain the block 404 as it is, resulting in the three blocks 420, 422 and 404 which are equal in data length. The UE 14 can then carry on to apply a fixed spreading code to the encoded blocks 420, 422 and 404 and transmit the spreaded data over the uplink DPDCH to the Node B 10. The fixed data length may be the maximal data length among all available data lengths. For example, the fixed data length in
In some embodiments, the UE 14 can apply a bit-by-bit repetition to the block data until the fixed data length is reached. For example, the UE 14 can repeat the block 402 in a bit-by-bit manner and each bit is repeated twice to generate the encoded block 422. In some embodiments, the UE 14 can apply a multibit-by-multibit repetition to the block data until the fixed data length is reached. For example, the UE 14 can repeat the block 402 in a 2 bits-by-2 bits manner and each 2 bits is repeated twice to generate the encoded block 422. In some other embodiments, the UE 14 can apply a random block repetition until the fixed data length is reached.
The rate matching method 4 is adopted by the UE 14 to provide a fixed-length data block which can be used in a blind detection method 6 in
Upon initialization (S700), the UE 14 is configured to generate a control radio frame which consists of only the pilot data, the FBI data and the TPC data (S702). There is no TFCI data in the control radio frame. The pilot data may have a data length exceeding that is defined in the 3GPP Release 99 standard to provide an increased channel estimation and synchronization performance. Next, the UE 14 is configured to transmit the control radio frame over the uplink DPCCH to the Node B 10 (S704) and the uplink DPCCH data generation method 7 is completed and exited (S706). Although the TFCI data is absent from the control radio frame, the Node B 10 is still able to determine the transport format of the user data on the uplink DPDCH based on the BTFD schemes outlined in the blind detection method 5 or 6, as detailed in
Upon initialization (S800), the UE 14 is ready to transmit a user data on the uplink DPDCH. The uplink DPDCH data generation method 8 utilizes a fixed rate matched data length and a fixed spreading factor. The UE 14 is configured to rate match the user data (low rate data) to the fixed rate matched data length (fixed data length) (S802), spread the rate matched data with the fixed spreading factor to produce the data radio frame (S804), and transmit the data radio frame over the uplink DPDCH to the node B 10 (S806), where the data radio frame will be decoded by the blind detection method 6 detailed in
Upon startup, the Node B 10 is initiated to detect radio frames on the uplink DPCH (S500). The receiver of the Node B 10 can detect and receive a first radio frame on the uplink DPCH, which contains DPCCH slots and DPDCH slots. In the embodiment, the TFCI data is eliminated from the DPCCH slot, as depicted in the DPCCH slot 3 in
Upon receiving the low rate data (first data) from a DPDCH slot of the first radio frame on the UL DPCH (S502), the control circuit of the Node B 10 is configured to pre-despread the low rate data with a plurality of possible spreading factors (S504). The number of the possible spreading factors may range from 1 to 7, that is, the control circuit of the Node B 10 can concurrently despread the low rate data with up to 7 different spreading factors and buffer the despreaded data in a local memory. In the example of the 12.2 k bps speech data, the control circuit of the Node B10 is configured to despread the low rate data with the 3 possible spreading factors, i.e. 64, 128 and 256 and buffer the despreaded results into the local memory in the control circuit of the Node B 10.
Based on the despreaded data in the local memory, the control circuit of the Node B 10 can proceed to determine a correct slot format for the received low rate data (S506). In some embodiments, the control circuit is configured to determine the correct slot format by an error detection coding scheme such as a cyclic redundancy check (CRC), a parity bit, a checksum, a repetition code, or other error correcting codes. Before applying the error detection coding scheme, the control circuit of the Node B 10 can apply various signal processes such as de-rate matching and deinterleaving to the three buffered despreaded data. The control circuit can apply the CRC on the three signal processed data to derive corresponding CRC results (accuracy), and based on the CRC results, determine which one of the three despreaded data has a correct slot format that is being used by the low rate data. The correct slot format will show no error in the CRC results. In other embodiments, the control circuit is configured to determine the correct slot format based on a data quality metric derived during the channel decoding. For example, the control circuit is configured to decode all three despreaded data by a convolutional code to determine convolutional code metrics that rank the degree of the correctness in the three despreaded data, and based on the convolutional code metrics (accuracy), determine which one of the three despreaded data has a correct slot format that is being used by the low rate data. The correct slot format will display a highest rank in the convolutional code metrics.
After the correct slot format for the low rate data is determined, the blind detection method 5 is completed and exited (S508).
The blind detection method 5 pre-despreads a variable-rate data by two or more possible spreading codes, and determines a correct slot format for the variable-rate data based on the pre-despreaded results, thereby reducing the uses of the TFCI information on the UL DPCCH, and increasing data space for the pilot data on the UL DPCCH, leading to an increased accuracy in signal quality estimation and channel estimation, and an improvement in the system capacity.
Upon startup, the Node B 10 is initiated to detect radio frames on the uplink DPCH (S600). The receiver of the node B 10 can detect and receive a first radio frame on the uplink DPCH, which contains DPCCH slots and DPDCH slots. In the embodiment, the TCFI data is eliminated from the DPCCH slot, as depicted by the DPCCH slot 3 in
Upon receiving the low rate data (first data) from a DPDCH slot of the first radio frame on the UL DPCH (S602), the control circuit of the Node B 10 is configured to despread the low rate data with a fixed spreading factor (S604). The fixed spreading factor may be a minimal spreading factor defined in the 3GPP Release 99 specification, or the fixed spreading factor may be 4.
Based on the despreaded data, the control circuit of the Node B 10 can proceed to perform de-rate matching on the despreaded data with a plurality of de-rate matching schemes (S606). More specifically, each decoding scheme may involve decoding the despreaded data with a different number of repeated bits or a different repetition pattern. Accordingly, the coding schemes in
Next, based on all de-rate matched data, the control circuit of the Node B 10 can determine a correct slot format for the received low rate data (S608). In some embodiments, the control circuit is configured to determine the correct slot format by an error detection coding scheme such as a cyclic redundancy check (CRC), a parity bit, a checksum, a repetition code, or other error correcting codes. For example, the control circuit can apply the CRC on the three buffered decoded data, and based on the CRC results, which represents accuracy of the de-rate matched data, the control circuit can determine which one of the three decoded data has a correct slot format that is being used by the low rate data. The correct slot format will show no error in the CRC results. In other embodiments, the control circuit is configured to determine the correct slot format based on a data quality metric derived during the channel decoding. For example, the control circuit is configured to decode all three de-rate matched data by a convolutional code to determine convolutional code metrics that rank the degree of the correctness in the three de-rate matched data, and based on the convolutional code metrics, which represents accuracy of the de-rate matched data, the control circuit can determine which one of the three de-rate matched data has a correct slot format that is being used by the low rate data. The correct slot format will display a highest rank in the convolutional code metrics.
After the correct slot format for the low rate data is determined, the blind detection method 6 is completed and exited (S610).
The blind detection method 6 employs a fixed spreading code to determine a correct slot format for a low rate data on the UL DPDCH, thereby reducing the uses of the TFCI information on the UL DPCCH, and increasing data space for the pilot data on the UL DPCCH, leading to an increased accuracy in signal quality estimation and channel estimation, and an improvement in the system capacity.
As used herein, the term “determining” encompasses calculating, computing, processing, deriving, investigating, looking up (e.g., looking up in a table, a database or another data structure), ascertaining and the like. Also, “determining” may include resolving, selecting, choosing, establishing and the like.
The various illustrative logical blocks, modules and circuits described in connection with the present disclosure may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array signal (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any commercially available processor, controller, microcontroller or state machine.
The operations and functions of the various logical blocks, modules, and circuits described herein may be implemented in circuit hardware or embedded software codes that can be accessed and executed by a processor.
While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
This application claims priority of U.S. Provisional Application No. 61/653,597, filed on May 31st, 2012, and the entirety of which is incorporated by reference herein.
Number | Date | Country | |
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61653597 | May 2012 | US |