The present invention relates to a noise reduction arrangement related to a three-phase brushless motor and a motor drive system for a vehicle using the same.
A three-phase brushless motor itself is well-known. For example, JP2003-235240 discloses it. In this type of three-phase brushless motor, a capacitor is connected between a positive power line and a negative power line of a direct-current power source, and three groups of two power MOS transistors in series are connected, respectively, between the positive power line and the negative power line. Star-connected inductive loads are connected to midpoints between transistors in the respective groups.
However, in a circuit configuration of the three-phase brushless motor disclosed in JP2003-235240, the respective current loops, which are generated when two switching elements related to U-phase, for example, are turned on or off in reversed phase with respect to each other, are generated in separate areas in a plane. As a result of this, magnetic fields in opposite directions are generated by the respective current loops alternately at a high-speed (i.e., for a short period). Thus, there is a problem that noise is generated due to such a variation in the magnetic field.
Therefore, it is an object of the present invention to provide a noise reduction arrangement applied to a three-phase brushless motor by means of which noise generated when driving the three-phase brushless motor can be effectively reduced. Another object of the present invention is to provide a motor drive system for a vehicle.
In order to achieve the aforementioned objects, according to the first aspect of the present invention a noise reduction arrangement applied to a three-phase brushless motor is provided in which
respective current loops, which are generated when two switching elements related to U-phase are turned on or off in reversed phase with respect to each other, are opposed to each other in a direction of the normal to a board,
respective current loops, which are generated when two switching elements related to V-phase are turned on or off in reversed phase with respect to each other, are opposed to each other in the direction of the normal to the board, and
respective current loops, which are generated when two switching elements related to W-phase are turned on or off in reversed phase with respect to each other, are opposed to each other in the direction of the normal to the board.
According to the present invention, a noise reduction arrangement applied to a three-phase brushless motor is obtained which can effectively reduce noise generated when driving the three-phase brushless motor. Further, according to the present invention, a motor drive system for a vehicle using the noise reduction arrangement is obtained.
These and other objects, features, and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments given with reference to the accompanying drawings, in which:
In the following, the best mode for carrying out the present invention will be described in detail by referring to the accompanying drawings.
The motor drive system 1 includes the battery 10, a DC-DC converter 20, an inverter 30, the motor 40 and a semiconductor driver device 50, as shown in
The battery 10 is an arbitrary capacitor cell which accumulates power to output a direct-current voltage. The battery 10 may be configured as a nickel hydrogen battery, a lithium ion battery, a capacitive element such as electrical double layer capacitor, etc.
The DC-DC converter 20 is a bidirectional DC-DC converter (also referred to as variable chopper type of a step-up DC-DC converter), and is capable of converting an input voltage 14 V up to 42 V and converting an input voltage 42 V down to 14 V. A smoothing capacitor C1 is connected between an input side of an electric reactor L1 of the DC-DC converter 20 and a negative electrode line.
The inverter 30 includes arms of U-W-W phases disposed in parallel between a positive electrode line and the negative electrode line. The U-phase arm includes switching elements (IGBT in this example) Q1 and Q2 connected in series, the V-phase arm includes switching elements (IGBT in this example) Q3 and Q4 connected in series and W-phase arm includes switching elements (IGBT in this example) Q5 and Q6 connected in series. Further, diodes D1-D6 are provided between collectors and emitters of switching elements Q1-Q6, respectively. The switching elements Q1-Q6 are IGBTs (Insulated Gate Bipolar Transistor) in this example; however, the switching elements Q1-Q6 may be other transistors such as MOSFETs (metal oxide semiconductor field-effect transistor), etc.
The motor 40 is a three-phase permanent-magnetic motor and one end of each coil of the U, V and W phases is commonly connected at a midpoint therebetween. The other end of the coil of U-phase is connected to a midpoint M1 between the switching elements Q1 and Q2, the other end of the coil of V-phase is connected to a midpoint M2 between the switching elements Q3 and Q4 and the other end of the coil of W-phase is connected to a midpoint M3 between the switching elements Q5 and Q6. A smoothing capacitor C2 is connected between a collector of the switching element Q1 and the negative electrode line.
The semiconductor driver device 50 controls the inverter 30. The semiconductor driver device 50 includes a CPU, a ROM, a main memory, etc., for example, and the functions of the semiconductor driver device 50 are implemented when control programs stored in the ROM are read out from the main memory and then executed by the CPU. The control method of the inverter 30 may be arbitrary; however, in general, two switching elements Q1 and Q2 related to U-phase are turned on/off in reversed phase with respect to each other, two switching elements Q3 and Q4 related to V-phase are turned on/off in reversed phase with respect to each other and two switching elements Q5 and Q6 related to W-phase are turned on/off in reversed phase with respect to each other.
In the present embodiment, the inverter 30 is configured in such a manner that respective current loops, which are generated when two switching elements Q1 and Q2 related to U-phase are turned on or off in reversed phase with respect to each other, are opposed to each other in a direction Z of the normal to a board; respective current loops, which are generated when two switching elements Q3 and Q4 related to V-phase are turned on or off in reversed phase with respect to each other, are opposed to each other in the direction Z of the normal to the board; and respective current loops, which are generated when two switching elements Q5 and Q6 related to W-phase are turned on or off in reversed phase with respect to each other, are opposed to each other in the direction Z of the normal to the board. In other words, the inverter 30 is disposed such that the positive electrode side and the negative electrode side are opposed to each other by folding along a line P shown in
In
Further, in
Further, in
It is noted that in
Here, in the present embodiment, the superposed waveshapes of the magnetic fluxes Φ1+Φ2, Φ3+Φ4 and Φ5+Φ6 are generated in the area in which two current loops are superposed, as mentioned above. This is in contrast to a prior art configuration with an arrangement shown in
Here, when considering U-phase, for example, at first, a first state shown in
On an upper side of the board of the second layer 92 is formed a circuit portion which is connected to the positive electrode of the battery 10 via the switching element Q1 on the positive electrode side from a midpoint M1 between the switching elements Q1 and Q2 related to U-phase (i.e., a circuit portion on the positive electrode side in U-phase). Further, on an upper side of the board of the second layer 92 is formed a circuit portion which is connected to the positive electrode of the battery 10 via the switching element Q3 on the positive electrode side from a midpoint M2 between the switching elements Q3 and Q4 related to V-phase (i.e., a circuit portion on the positive electrode side in V-phase). Similarly, on an upper side of the board of the second layer 92 is formed a circuit portion which is connected to the positive electrode of the battery 10 via the switching element Q5 on the positive electrode side from a midpoint M3 between the switching elements Q5 and Q6 related to W-phase (i.e., a circuit portion on the positive electrode side in W-phase).
On an upper side of the board of the third layer 93 is formed a circuit portion which is connected to the negative electrode of the battery 10 via the switching element Q2 on the negative electrode side from the midpoint M1 between the switching elements Q1 and Q2 related to U-phase (i.e., a circuit portion on the negative electrode side in U-phase). Further, on an upper side of the board of the third layer 93 is formed a circuit portion which is connected to the negative electrode of the battery 10 via the switching element Q4 on the negative electrode side from the midpoint M2 between the switching elements Q3 and Q4 related to V-phase (i.e., a circuit portion on the negative electrode side in V-phase). Similarly, on an upper side of the board of the second layer 93 is formed a circuit portion which is connected to the negative electrode of the battery 10 via the switching element Q6 on the negative electrode side from the midpoint M3 between the switching elements Q5 and Q6 related to W-phase (i.e., a circuit portion on the negative electrode side in W-phase).
The fourth layer board 94 is a ground layer. Ground potential is formed on an upper side of the board 94 by a solid pattern of copper, for example.
In this way, in the example shown in
The switching elements Q1-Q6 are housed in a heat sink 80 which is provided above the board of the first layer 91 in a direction Z perpendicular to the board surface. The switching elements Q1-Q6 are connected to the corresponding circuit portions on the boards 92 and 93 via through holes formed in the direction Z perpendicular to the board surfaces. It is noted that as a matter of fact the through holes from the circuit portions on the negative electrode side in U, V and W-phases are offset from the circuit portions on the positive electrode side in U, V and W-phases (in a Y-direction in
The heat sink 80 is formed of an electrically conductive material (for example, an aluminum block). The heat sink 80 may include concave portions for receiving the switching elements Q1-Q6 in such a manner that concave portions are in contact with the corresponding switching elements Q1-Q6. The heat sink 80 may have a fin formed thereon so as to enhance heat radiation characteristics. In this way, the heat sink 80 has not only a heat sink function but also a shielding function for shielding radiation noise from the switching elements Q1-Q6.
Metal portions of the heat sink 80 such as a conductor 102 are connected to the ground layer of the board of the first layer 91. Further, the ground layer of the board of the first layer 91 is connected to the ground layer of the board of the fourth layer 94 via through holes or via conductors 104 which are provided between the edge faces of the boards 91 and 94. As a result of this, the electrical connections between the respective ground layers and the shielding portion of the heat sink are established and thus common mode noise can be shielded effectively. It is noted that from a similar point of view the motor 40 may be surrounded with a shielding element which is electrically connected to the respective ground layers of the boards 91 and 94.
The present invention is disclosed with reference to the preferred embodiments. However, it should be understood that the present invention is not limited to the above-described embodiments, and variations and modifications may be made without departing from the scope of the present invention.
For example, in the above-described embodiments, the circuit portion on the positive electrode side related to U, V and W phases and the circuit portion on the negative electrode side related to U, V and W phases are formed on the board 92 and 93, respectively. However, the present invention is not limited to this, and thus the mounting manner may be arbitrary as long as the superposed area of the loops such as shown in
Further, in the above-described embodiments, the heat sink 80 is provided on the side of the board 91; however, the heat sink 80 may be provided on the side of the board 92. The heat sink 80 may be disposed in a upside down manner with respect to the example shown in
The present application is based on Japanese Priority Application No. 2009-089599, filed on Apr. 1, 2009, the entire contents of which are hereby incorporated by reference.
Number | Date | Country | Kind |
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2009-089599 | Apr 2009 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP2010/055155 | 3/17/2010 | WO | 00 | 9/20/2011 |