Patent Application
20250202350
The present invention generally relates to electronic circuit, and more particularly but not exclusively relates to non-isolated resonant converter and its driving circuit.
A converter is an electrical circuit that converts an input voltage to an output voltage. The output voltage is lower than the input voltage in the case of a buck converter, whereas the output voltage is higher than the input voltage in the case of a boost converter. A resonant converter is a type of converter that converts a DC input voltage to a DC output voltage using a resonant tank circuit. A transformer may be employed to scale a voltage presented on the primary winding of the transformer. A conventional resonant converter includes a DC to AC (DC/AC) inverter that converts the DC input voltage to a square wave. The resonant tank circuit filters the harmonics of the square wave, resulting in a sinusoidal current that is provided to an AC to DC (AC/DC) rectifier by way of a transformer. The rectified output of the rectifier is filtered by an output capacitor to generate the DC output voltage.
It is one of the objects of the present invention to provide non-isolated resonant converter and associated driving circuit and driving method.
One embodiment of the present invention discloses a non-isolated resonant switching converter, having an input node to receive an input voltage, and an output node to provide an output voltage. The non-isolated resonant switching converter comprises a transformer, a resonant tank, a first switching device, a second switching device, a third switching device, a first driver integrated circuit (IC), and a second driver IC. The transformer has a primary winding and a secondary winding. The resonant tank comprises a resonant capacitor and a resonant inducor coupled in series between a first tank node and a second tank node, wherein the resonant inductor is formed by the primary winding. The first switching device is coupled between the input node and the first tank node. The second switching device is coupled between the first tank node and the secondary winding. The third switching device is coupled between the secondary winding and a reference ground. The first driver IC has a first driver and a second driver. The first driver is configured to provide a first driving signal based on a first control signal to drive the third switching device. The second driver is configured to provide a second driving signal based on a second control signal to drive the second switching device. The first driver is configured to be powered by a power supply and the second driver is configured to be powered by a voltage across a first boot capacitor. The second driver IC has a third driver configured to provide a third driving signal based on a third control signal to drive the first switching device, and the third driver is configured to be powered by a voltage across a second boot capacitor. When the third switching device and the first switching device are turned on and the second switching device is turned off, the first boot capacitor is charged by the power supply. When the third switching device and the first switching device are turned off and the second switching device is turned on, the second boot capacitor is charged by the first boot capacitor.
Another embodiment of the present invention discloses a driving circuit for driving a first switching device, a second switching device and a third switching device coupled in series between an input voltage and a reference ground. The first switching device is coupled to the input voltage, the third switching device is coupled to the reference ground, and the second switching device is coupled between the first switching device and the third switching device. The driving circuit comprises a first driver IC and a second driver IC. The first driver IC is configured to provide a first driving signal to drive the third switching device and a second driving signal to drive the second switching device. The first driver IC has a power supply pin configured to receive a power supply, a bootstrap pin, a first control input pin configured to receive a first control signal, a second control input pin configured to receive a second control signal, a first driving output pin configured to provide the first driving signal based on the first control signal, a second driving output pin configured to provide the second driving signal based on the second control signal, and a switching node pin coupled to a common node of the second switching device and the third switching device. A first boot capacitor is capable of coupling between the bootstap pin of the first driver IC and the switching node pin of the first driver IC. The second driver IC is configured to provide a third driving signal to drive the first switching device and a fourth driving signal to drive the third switching device together with the first driving signal. The second driver IC has a power supply pin configured to receive the power supply, a bootstrap pin, a first control input pin configured to receive the first control signal, a second control input pin configured to receive a third control signal, a first driving output pin configured to provide the fourth driving signal based on the first control signal, a second driving output pin configured to provide the third driving signal based on the third control signal, and a switching node pin coupled to a common node of the first switching device and the second switching device. A second boot capacitor is capable of coupling between the bootstap pin of the second driver IC and the switching node pin of the second driver IC.
Yet another embodiment of the present invention discloses a driving method for driving a first switching device, a second switching device and a third switching device coupled in series between an input voltage and a reference ground. The first switching device is coupled to the input voltage, the third switching device is coupled to the reference ground, and the second switching device is coupled between the first switching device and the third switching device. The driving method comprises receiving a first control signal and providing a first driving signal to drive the third switching device via a first driver. Powering the first driver by a power supply. Receiving a second control signal and providing a second driving signal to drive the second switching device via a second driver. Powering the second driver by a voltage across a first boot capacitor. Receiving a third control signal and providing a third driving signal to drive the first switching device via a third driver. Powering the third driver by a voltage across a second boot capacitor. When the third switching device and the first switching device are turned on and when the second switching device is turned off, charging the first boot capacitor by the power supply. When the third switching device and the first switching device are turned off and when the second switching device is turned on, charging the second boot capacitor by the first boot capacitor.
These and other features of the present invention will be readily apparent to persons of ordinary skill in the art upon reading the entirety of this disclosure, which includes the accompanying drawings and claims.
The present invention can be further understood with reference to the following detailed description and the appended drawings, wherein like elements are provided with like reference numerals.
Reference will now be made in detail to the preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the preferred embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be obvious to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present invention.
The primary winding W1 could be simplified to a magnetizing inductor Lm and a leakage inductor in series, the leakage inductor acts as the resonant inductor Lr. In the example shown in
The switching device Q1 is coupled between the input node 110 and the tank node 101, the switching device Q2 is coupled between the tank node 110 and the secondary winding W2, and the switching device S1 is coupled between the secondary winding W2 and the reference ground. In the example shown in
The driving circuit 20 is configured to drive the switching devices Q1, Q2 and S1 based on control signals PWMS1, PWMP1, and PWMP2. The driving circuit 20 has drivers 11-13. In one embodiment, the drivers 11 and 12 are integrated on a driver integrated circuit (IC) 21, and the driver 13 is integrated on a driver IC 22. The driver 11 receives the control signal PWMS1, and provides a driving signal Vgs11 based on the control signal PWMS1. The driver 11 is powered by a power supply Vsup via a switch Dsp1. In one embodiment, the switch Dsp1 is a diode, and an anode of the diode Dsp1 is coupled to the power supply Vsup, and a cathode of the diode Dsp1 is coupled to the driver 11. In another embodiment, the switch Dsp1 is a field effect transistor (FET). The driver 12 receives the control signal PWMP2, and provides a driving signal Vg2 based on the control signal PWMP2. The driver 12 is powered by a voltage Vbs1 across a boot capacitor Cbs1. The boot capacitor Cbs1 may be positioned out of the driver IC 21, or may be integrated on the driver IC 21. In one embodiment, the boot capacitor Cbs1 has a terminal 106 coupled to the cathode of the diode Dsp1, and a terminal 107 coupled to a common node of the switching device Q2 and the switching device S1. The driver 13 receives the control signal PWMP1, and provides a driving signal Vg1 based on the control signal PWMP1. The driver 13 is powered by a voltage Vbs2 across a boot capacitor Cbs2. The boot capacitor Cbs2 may be positioned out of the driver IC 22, or may be integrated on the driver IC 22. In one embodiment, the boot capacitor Cbs2 has a terminal 108 coupled to the terminal 106 of the boot capacitor Cbs1 via a boot diode Db1, and a terminal 109 coupled to a common node of the switching device Q1 and the switching device Q2. An anode of the boot diode Db1 is coupled to the terminal 106 of the boot capacitor Cbs1, and a cathode of the boot diode Db1 is coupled to the terminal 108 of the boot capacitor Cbs2. The switching device S1 is derived by the driving signals Vgs11, the switching device Q2 is derived by the driving signal Vg2, and the switching device Q1 is derived by the driving signal Vg1.
In one embodiment, when the switching device S1 is turned on, the boot capacitor Cbs1 is charged by the power supply Vsup. For example, a current flowing through the power supply Vsup, the diode Dsp1, the boot capacitor Cbs1, the switching device S1 and the reference ground is used to charge the boot capacitor Cbs1. In one embodiment, when the switching device Q2 is turned on, the boot capacitor Cbs2 is charged by the boot capacitor Cbs1. For example, a current flowing from the terminal 106 of the boot capacitor Cbs1, the boot diode Db1, the boot capacitor Cbs2, and the switching device Q2, to the terminal 107 of the boot capacitor Cbs1 is used to charge the boot capacitor Cbs2. In one embodiment, the switching devices S1 and Q1 are turned on and turned off at the same time, and the switching device Q2 is turn on interleaved with the switching devices S1 and Q1. However, one with ordinary skill in the art should also understand that a delay may exist between turning on of the switching device Q1 and turning on of the switching device S1, and a delay may exist between turning off of the switching device Q1 and turning off of the switching device S1. In one embodiment, a maximum voltage of the driving signal Vgs11 is higher than a maximum voltage of the driving signal Vg2, and the maximum voltage of the driving signal Vg2 is higher than a maximum voltage of the driving signal Vg1.
In one embodiment, the switching device S1 may comprise more than one transistors coupled in parallel, such that large current can be handled. The driving circuit 20 further comprises a driver 14 which is integrated on the driver IC 22. The driver 14 receives the control signal PWMS1, and provides a driving signal Vgs12 based on the control signal PWMS1. The driver 14 is powered by the power supply Vsup via a switch Dsp2. In one embodiment, the switch Dsp2 is a diode, an anode of the diode Dsp2 is coupled to the power supply Vsup, and a cathode of the diode Dsp2 is coupled to the driver 14. The switching device S1 is derived by the driving signals Vgs11 and Vgs12. In one embodiment, a maximum voltage of the driving signal Vgs12 is higher than the maximum voltage of the driving signal Vg2. Embodiments of the present invention could provide more than one driving signals to drive the switching device S1. In one embodiment, the drivers 11-12 may be integrated on an integrated circuit (IC), and the drivers 13-14 may be integrated on another IC. In another embodiment, the drivers 11-14 may be integrated on a single IC.
The driving circuit 20 further comprises drivers 15-17. In one embodiment, the drivers 15 and 16 are integrated on a driver IC 23, and the driver 17 is integrated on a driver IC 24. The driver 15 receives a control signal PWMS2, and provides a driving signal Vgs21 based on the control signal PWMS2. The driver 15 is powered by the power supply Vsup via a switch Dsp3. In one embodiment, the switch Dsp3 is a diode, and an anode of the diode Dsp3 is coupled to the power supply Vsup, and a cathode of the diode Dsp3 is coupled to the driver 15. The driver 16 receives the control signal PWMP1, and provides a driving signal Vg4 based on the control signal PWMP1. The driver 16 is powered by a voltage Vbs3 across a boot capacitor Cbs3. The boot capacitor Cbs3 may be positioned out of the driver IC 23, or may be integrated on the driver IC 23. In one embodiment, the boot capacitor Cbs3 has a terminal 301 coupled to the cathode of the diode Dsp3, and a terminal 302 coupled to a common node of the switching device Q4 and the switching device S2. The driver 17 receives the control signal PWMP2, and provides a driving signal Vg3 based on the control signal PWMP2. The driver 17 is powered by a voltage Vbs4 across a boot capacitor Cbs4. The boot capacitor Cbs4 may be positioned out of the driver IC 24, or may be integrated on the driver IC 24. In one embodiment, the boot capacitor Cbs4 has a terminal 303 coupled to the terminal 301 of the boot capacitor Cbs3 via a boot diode Db2, and a terminal 304 coupled to a common node of the switching device Q3 and the switching device Q4. An anode of the boot diode Db2 is coupled to the terminal 301 of the boot capacitor Cbs3, and a cathode of the boot diode Db2 is coupled to the terminal 303 of the boot capacitor Cbs2. The switching device S2 is derived by the driving signal Vgs21. The switching device Q4 is derived by the driving signal Vg4 based on the control signal PWMP1, such that the switching device Q4 is expected to be turned on and off at the same time with the switching device Q1. The switching device Q3 is derived by the driving signal Vg3 based on the control signal PWMP2, such that the switching device Q3 is expected to be turned on and off at the same time with the switching device Q2.
In one embodiment, when the switching device S2 is turned on, the boot capacitor Cbs3 is charged by the power supply Vsup. For example, a current flowing through the power supply Vsup, the diode Dsp3, the boot capacitor Cbs3, the switching device S2 and the reference ground is used to charge the boot capacitor Cbs2. In one embodiment, when the switching device Q4 is turned on, the boot capacitor Cbs4 is charged by the boot capacitor Cbs3. For example, a current flowing from the terminal 301 of the boot capacitor Cbs3, the boot diode Db2, the boot capacitor Cbs4, and the switching device Q4, to the terminal 302 of the boot capacitor Cbs2 is used to charge the boot capacitor Cbs3. In one embodiment, the switching devices S2 and Q3 are turned on and turned off at the same time, and the switching device Q4 is turned on interleaved with the switching devices S2 and Q3. However, one with ordinary skill in the art should also understand that a delay may exist between turning on of the switching device Q3 and turning on of the switching device S2, and a delay may exist between turning off of the switching device Q3 and turning off of the switching device S2. In one embodiment, a maximum voltage of the driving signal Vgs21 is higher than a maximum voltage of the driving signal Vg4, and the maximum voltage of the driving signal Vg4 is higher than a maximum voltage of the driving signal Vg3.
In one embodiment, the switching device S2 may comprise more than one transistors coupled in parallel, such that large current can be handled. The driving circuit 20 further comprises a driver 18 which is integrated on the driver IC 24. The driver 18 receives the control signal PWMS2, and provides a driving signal Vgs22 based on the control signal PWMS2. The driver 18 is powered by the power supply Vsup via a switch Dsp4. In one embodiment, the switch Dsp4 is a diode, an anode of the diode Dsp4 is coupled to the power supply Vsup, and a cathode of the diode Dsp4 is coupled to the driver 18. The switching device S2 is derived by the driving signals Vgs21 and Vgs22. In one embodiment, a maximum voltage of the driving signal Vgs22 is higher than the maximum voltage of the driving signal Vg4. Embodiments of the present invention could provide more than one driving signals to drive the switching device S2. In one embodiment, the drivers 15-16 may be integrated on an integrated circuit (IC), and the drivers 17-18 may be integrated on another IC. In another embodiment, the drivers 15-18 may be integrated on a single IC.
Referring
In one embodiment, when the control signals PWMP1 and PWMS1 are logic high and the control signals PWMP2 and PWMS2 are logic low, the switching devices Q1, S1, Q4 are turned on, the switching devices Q2, Q3, S2 are turned off, such that the boot capacitors Cbs1 and Cbs4 are charged and the voltages Vbs1 and Vbs4 increase, and the boot capacitors Cbs2 and Cbs3 are discharged and the voltages Vbs2 and Vbs3 decrease. In one embodiment, when the control signals PWMP1 and PWMS1 are logic low and the control signals PWMP2 and PWMS2 are logic high, the switching devices Q1, S1, Q4 are turned off, the switching devices Q2, Q3, S2 are turned on, such that the boot capacitors Cbs2 and Cbs3 are charged and the voltages Vbs2 and Vbs3 increase, and the boot capacitors Cbs1 and Cbs4 are discharged and the voltages Vbs1 and Vbs4 decreases.
In the embodiment of
Each of the driver ICs 21A and 22A has a power supply pin VCC to receive the power supply Vsup, a bootstrap pin BST, a control input pin PWMH, a control input pin PWML, a driving output pin HG, a driving output pin LG, a switching node pin SW, and a reference ground pin GND coupled to the reference ground. The driver IC 21A has the driver 11 and the driver 12. The driver 11 is coupled to the control input pin PWML of the driver IC 21A to receive the control signal PWMS1, and coupled to the driving output pin LG of the driver IC 21A to provide the driving signal Vgs11. The driver 12 is coupled to the control input pin PWMH of the driver IC 21A to receive the control signal PWMP2, and coupled to the driving output pin HG of the driver IC 21A to provide the driving signal Vg2. The driver IC 22A has the driver 13 and the driver 14. The driver 13 is coupled to the control input pin PWMH of the driver IC 22A to receive the control signal PWMP1, and coupled to the driving output pin HG of the driver IC 22A to provide the driving signal Vg1. The driver 14 is coupled to the control input pin PWML of the driver IC 22A to receive the control signal PWMS1, and coupled to the driving output pin LG of the driver IC 22A to provide the driving signal Vgs12. The driver IC 21A has the diode Dsp1 coupled between the power supply pin VCC and the bootstrap pin BST, that is the anode of the diode Dsp1 is coupled to the power supply pin VCC of the driver IC 21A, and the cathode of the diode Dsp1 is coupled to the bootstrap pin BST of the driver IC 21A. The driver IC 22A has the diode Dsp2 coupled between the power supply pin VCC and the bootstrap pin BST, that is the anode of the diode Dsp2 is coupled to the power supply pin VCC of the driver IC 22A, and the cathode of the diode Dsp2 is coupled to the bootstrap pin BST of the driver IC 22A. The switching node pin SW of the driver IC 21A is coupled to the common node of the switching device S1 and the switching device Q2. The switching node pin SW of the driver IC 22A is coupled to the common node of the switching device Q1 and the switching device Q2.
Continuing refers
Each of the driver ICs 23A and 24A has the power supply pin VCC to receive the power supply Vsup, the bootstrap pin BST, the control input pin PWMH, the control input pin PWML, the driving output pin HG, the driving output pin LG, the switching node pin SW, and the reference ground pin GND coupled to the reference ground. The driver IC 23A has the driver 15 and the driver 16. The driver 15 is coupled to the control input pin PWML of the driver IC 23A to receive the control signal PWMS2, and coupled to the driving output pin LG of the driver IC 23A to provide the driving signal Vgs21. The driver 16 is coupled to the control input pin PWMH of the driver IC 23A to receive the control signal PWMP1, and coupled to the driving output pin HG of the driver IC 23A to provide the driving signal Vg4. The driver IC 24A has the driver 17 and the driver 18. The driver 17 is coupled to the control input pin PWMH of the driver IC 24A to receive the control signal PWMP2, and coupled to the driving output pin HG of the driver IC 24A to provide the driving signal Vg3. The driver 18 is coupled to the control input pin PWML of the driver IC 24A to receive the control signal PWMS2, and coupled to the driving output pin LG of the driver IC 24A to provide the driving signal Vgs22. The driver IC 23A has the diode Dsp3 coupled between the power supply pin VCC and the bootstrap pin BST, that is the anode of the diode Dsp3 is coupled to the power supply pin VCC of the driver IC 23A, and the cathode of the diode Dsp3 is coupled to the bootstrap pin BST of the driver IC 23A. The driver IC 24A has the diode Dsp4 coupled between the power supply pin VCC and the bootstrap pin BST, that is the anode of the diode Dsp4 is coupled to the power supply pin VCC of the driver IC 24A, and the cathode of the diode Dsp4 is coupled to the bootstrap pin BST of the driver IC 24A. The switching node pin SW of the driver IC 23A is coupled to the common node of the switching device S2 and the switching device Q4. The switching node pin SW of the driver IC 24A is coupled to the common node of the switching device Q3 and the switching device Q4.
Continuing refers
At the step S11, receiving a first control signal and providing a first driving signal to drive the third switching device via a first driver.
At the step S12, powering the first driver by a power supply.
At the step S13, receiving a second control signal and providing a second driving signal to drive the second switching device via a second driver.
At the step S14, powering the second driver by a voltage across a first boot capacitor.
At the step S15, receiving a third control signal and providing a third driving signal to drive the first switching device via a third driver.
At the step S16, powering the third driver by a voltage across a second boot capacitor.
At the step S17, when the third switching device and the first switching device are turned on and when the second switching device is turned off, charging the first boot capacitor by the power supply.
At the step S18, when the third switching device and the first switching device are turned off and when the second switching device is turned on, charging the second boot capacitor by the first boot capacitor. In one embodiment, a capacitance of the first boot capacitor is larger than a capacitance of the second boot capacitor. In one embodiment, a maximum voltage of the first driving signal is higher than a maximum voltage of the second driving signal, and the maximum voltage of the second driving signal is higher than a maximum voltage of the third driving signal. In one embodiment, a charging current is capable of flowing through the first boot capacitor, a boot diode, the second boot capacitor and the second switching device, to charging the second boot capacitor.
In one embodiment, the driving method 700 further comprising providing a fourth driving signal based on the first control signal via a fourth driver, to drive the third switching device together with the first driving signal, and powering the fourth driver by the power supply. In one embodiment, a maximum voltage of the fourth driving signal is higher than the maximum voltage of the second driving signal.
Note that in the driving method 700 described above, the box functions may also be implemented with different order as shown in
Obviously many modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described. It should be understood, of course, the foregoing disclosure relates only to a preferred embodiment (or embodiments) of the invention and that numerous modifications may be made therein without departing from the spirit and the scope of the invention as set forth in the appended claims. Various modifications are contemplated and they obviously will be resorted to by those skilled in the art without departing from the spirit and the scope of the invention as hereinafter defined by the appended claims as only a preferred embodiment(s) thereof has been disclosed.
