Patent Application
20080154991
Electronic memory comes in a variety of forms to serve a variety of purposes. Two types of memory currently in use are volatile and non volatile memory. Volatile memory requires constant power to retain data. When the system is shut down any stored data is lost. Non volatile memory does not require constant power to retain data and, thus can retain data even if the system is shut down. Nonvolatile memory such as “not or” (NOR) and “not and” (NAND) read only memory (ROM) may be used for cell phone data storage, digital camera data storage, solid state drives for computing devices, (e.g., personal computers) as well as other electronic devices. Nonvolatile memory has several advantages including that it is relatively lightweight, has no moving parts, is relatively small in size, is quiet and allows for fast access to data by a host.
Volatile memory has the ability to have data written upon it without having to first perform an erase function to remove existing unwanted data. With Nonvolatile memory, however, existing data is generally erased before new data is written. Moreover, traditional techniques involved erasing previous data immediately before the new data was written. The process of erasing the previous data, however, may take as long or longer than writing the new data.
Host interface 106 may comprise a module for receiving signals from host 102 and sending the message or memory access request to the controller 110. The nonvolatile memory storage 108 may include flash memory, such as a NAND or NOR flash memory chip, or other memory medium that permits a page, or block, containing sectors of memory to be erased before being written upon with new data. Memory storage 108 may be arranged as an array or matrix of electrically erasable transistor cells. Each transistor cell may include a source region, drain region, floating gate, and control gate. The gates may be separated by a thin insulation layer such as an oxide or nitride. The control gate may be connected to a word line, the source region may be connected to a source line or ground, the drain may be connected to a bit line, and the floating gate may be connected to the word line through the control gate and to the bit line through the drain. If the transistor cells are arranged matrix arrangement, the bit lines may be arranged as columns, while the word lines may be arranged as rows.
Data may be stored in the memory by altering electrons in the floating gate. A charge may be applied from the bit line to the floating gate and drain through the source or ground. Applying a charge creates a negatively charged barrier in the thin insulation layer between the floating gate and control gate by trapping excited electrons on the opposite side of the thin insulation layer from the floating gate. When the flow of electrons through the gate is greater than one-half of the trapped charge, the gate is “open” and the cell has value of 1. When flow is less than one-half of the trapped charge, the cell has a value of zero. Thus, the cell can be erased, or returned to the normal state, by applying a higher voltage charge. The cells or sectors can be organized in a group as a block so that multiple regions can be written or erased relatively simultaneously.
The controller 110 of non-volatile memory storage device 104 may have a memory management module 112, a file system module 114 comprising one or more file systems, and a file system scanning module 116.
Memory management module 112 may be programmed or designed with a flash page manager and may accept memory requests from the host interface 106 and, in response, may read, write, or erase a sector of memory, such as a cell, page, block, or entire memory chip. Memory management module 112 may achieve this result by translating or correlating a logical address to a physical memory address in memory storage 108.
The read, write, and/or erase events may be stored in the file system module 114. The file system module may include one or more file systems, which may be created on each device 104 by the host 102 or other programming device and may be associated with one or more memory storages 108. The file system may reside in a buffer memory on controller 110, or it may alternatively reside in memory storage 108 or on the host 102. Exemplary file systems include twelve-bit file allocation tables (FAT12), sixteen-bit file allocation tables (FAT16), thirty two-bit file allocation tables (FAT32), and New Technology File Systems (NTFS).
The file system scanning module 116 may be operable to scan the file system module to determine which sectors or blocks of memory 108 are no longer accessed by each file system. Such monitoring can be achieved by monitoring record files that indicate which files have been deleted in that file system and, therefore which sectors of memory are no longer valid.
The file system scanning module 116 may be enabled when an access request is not being generated by the host 102. For example, the scanning module 116 may be programmed to commence at a predetermined time after the memory management module 112 is idle with respect to the host 102. Alternatively or additionally, the file system scanning module 116 may be enabled independently of the status of the memory management module 112 relative to the host, such as at predetermined intervals. However, if the memory management module 112 receives a memory access request from host 102, the scanning operation being performed by the scanning module 116 may be temporarily suspended or aborted.
In response to the file system scan, an erase request may be generated by an erasing module and sent to memory management module 112 so that the invalid data in the memory 108 can be removed and the memory therefore conditioned or “pre-erased” for further write requests from the host 102. Thus, when a write command is given by host 102, the non-volatile memory storage device 104 can commence writing the data to the memory without having to first erase blocks of memory 108. The erasing module may be included in the file system scanning module 116, the memory management module 112 or other predetermined location. An implementation will now be described with reference to
A host connection protocol module 202 may communicate with a flash page manager module 204 which, in turn, may interact with a flash memory interface module 206, such as a flash application program interface (API). The host connection protocol module may be any interface for accepting or delivering data read, write, and/or erase requests from the host 102 via a host communication connection, such as a (USB) port or a system bus. The host connection protocol module 202 may also be capable of other tasks such as resetting the device 104, reading the status of device 104, or enabling security protocols for access to the device 104.
The host connection protocol module 202 may accept a data read, write, or erase request from the host 102 and deliver the request to the flash page manager module 204. The flash page manager module 204 may be coupled to, and located on or within the same memory storage device 104 as, host connection protocol module 202. The flash page manager module 204 may be responsible for responding to the host data access requests and for communicating those requests to the flash memory interface module 206.
The flash page manager module 204 may communicate with flash memory interface module 206 to locate data in response to a read request sent to the host connection protocol module 202. The flash memory interface module 206 may communicate with the flash memory 108 and access the requested data located in the pages or blocks of memory. The flash page manager module 204 may also communicate with flash memory interface module 206 to determine whether an area of memory 108 is erased prior to being written with new data or to find an area to store data sent to the host connection protocol module 202 as part of a write request.
Although the file system scanning module 208 may scan data relating to requests previously made by the host protocol module 202, the file system scanning module 208 is generally independent of the host connection. Therefore, the file system scanning module 208 may be operated when the host protocol module 202 is idle with respect to the flash page manager 204 or, in other words, when the flash memory storage device 104 is idle with respect to the host 102.
The flash page state 210 or the flash page manager 204 may maintain a record of data sectors that have been erased and therefore which sectors are immediately available for writing.
The exemplary method for file system scanning and pre-erasing, shown in
In the power-up state (block 302), the system 100 attempts to locate each file system 114 installed on the device 104 (block 306). This process may be performed by the flash page manager module 204 or the file system scanning module 208. If a file system is found (“yes” from decision block 308), that file system in files system module 114 is scanned using the file system scanning module 208 in search of invalid sectors of data in flash memory 114 (block 310, jump to block 316). If a file system is not found (“no” from decision block 308), the system 100 waits for a file system to be written on the memory storage device 104 (block 312).
After the device 104 is powered up, it may be idle with respect to the host 102 (block 304). At this stage, the system 100 determines whether a file system has been found (decision block 314). If not (“no” from decision block 314), the system scans for file systems (block 306) and proceeds as described above. If a file system is located (“yes” from decision block 314), the file system is scanned for invalid sectors (block 316) using a file system scanning module 208. If a page or block is located containing invalid sectors, the page or block is erased (block 318). If additional blocks contain invalid sectors (“no” from decision block 320), the file system scanning module 208 scans and erases the additional blocks. If there are no additional invalid sectors, the system 100 waits (block 322) until additional scanning is to be performed (e.g. returns to block 302 or 304), which may be determined based on a predetermined time lapse, number of data access requests by the host and/or other predetermined condition.
Although details of specific implementations and embodiments are described above, such details are intended to satisfy statutory disclosure obligations rather than to limit the scope of the following claims. Thus, the invention as defined by the claims is not limited to the specific features described above. Rather, the invention is claimed in any of its forms or modifications that fall within the proper scope of the appended claims, appropriately interpreted in accordance with the doctrine of equivalents.
