BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a diagrammatic view illustrating a subject to be solved by the present invention;
FIG. 2 is a block diagram showing an example of a configuration of a nonvolatile memory system to which the present invention is applied;
FIG. 3 is a diagrammatic view illustrating a concept of a memory region of a memory unit shown in FIG. 2;
FIG. 4 is a diagrammatic view illustrating an example of an ordinary flash management table;
FIG. 5 is a diagrammatic view illustrating a basic table and a differential information table included in management information used in the nonvolatile memory system;
FIG. 6 is a diagrammatic view illustrating a manner of conversion from a logical address into a virtual block address and conversion of a virtual block address into an address to be used upon accessing to a memory bank in the nonvolatile memory system;
FIG. 7 is a diagrammatic view illustrating a physical address to physical address conversion table wherein all virtual block addresses and access addresses of memory banks are coordinated with each other;
FIG. 8 is a diagrammatic view illustrating a physical address to physical address conversion table wherein virtual block addresses at which replacement of a block occurs and access addresses of the banks are coordinated with each other;
FIG. 9 is a diagrammatic view illustrating a physical address to physical address conversion table wherein a virtual block address of a block to be treated as a failed block and access addresses of the banks are coordinated with each other;
FIG. 10 is a diagrammatic view illustrating a logical to physical-physical to physical conversion table wherein a flag of 1 bit is added in a physical address field of a logical to physical table;
FIG. 11 is a diagrammatic view illustrating a logical to physical-physical to physical conversion table wherein an index to a corresponding table is added to a physical address field with regard to which access address exchange of a logical address to physical address conversion table is to be performed;
FIG. 12 is a diagrammatic view illustrating an example of a replacement process for a failed block which uses differential information executed by the nonvolatile memory system;
FIG. 13 is a diagrammatic view illustrating an example of the differential information used in the replacement process for a failed block; and
FIG. 14 is a flow chart illustrating an address exchange flow executed by the nonvolatile memory system where the differential information is used.