Claims
- 1. A non-volatile semiconductor memory device comprising:
- a semiconductor substrate;
- a pair of spaced electrode films formed on a surface of said semiconductor substrate and having respective side faces opposite each other with a gap formed therebetween;
- a pair of diffusion layers formed in the surface of said semiconductor substrate and having respective end portions aligned with said side faces of said electrode films;
- a first insulating film covering said gap and said spaced electrode films;
- a silicon nitride film formed on said first insulating film to cover at least said gap;
- a second insulating film formed on said silicon nitride film to cover at least said gap;
- a gate electrode formed on said second insulating film to cover at least said gap; and
- conductive layers directly connected to said pair of electrode films.
- 2. A non-volatile semiconductor memory device according to claim 1, wherein each of said first and second insulating films includes a silicon oxide film.
- 3. A non-volatile semiconductor memory device comprising:
- a semiconductor substrate;
- a pair of spaced electrode films formed on a surface of said semiconductor substrate and having respective side faces opposite each other with a gap formed therebetween;
- a pair of diffusion layers formed in the surface of said semiconductor substrate and having respective end portions aligned with said side faces of said electrode films;
- a first insulating film covering said gap and said spaced electrode films;
- sidewall insulating films formed in said gap to cover said side faces of said electrode films;
- a silicon nitride film formed on said first insulating film to cover at least said gap;
- a second insulating film formed on said silicon nitride film to cover at least said gap;
- a gate electrode formed on said second insulating film to cover at least said gap; and
- conductive layers directly connected to said pair of electrode films.
- 4. A non-volatile semiconductor memory device according to claim 3, wherein each of said first and second insulating films includes a silicon oxide film.
Priority Claims (2)
Number |
Date |
Country |
Kind |
5-027463 |
Jan 1993 |
JPX |
|
5-191904 |
Jul 1993 |
JPX |
|
CROSS-REFERENCE TO THE RELATED APPLICATION
This application is a continuation-in-part of U.S. patent application Ser. No. 08/183,852 filed Jan. 21, 1994, now U.S. Pat. No. 5,381,028 contents of which are incorporated herein by reference.
US Referenced Citations (2)
Number |
Name |
Date |
Kind |
5045901 |
Komori et al. |
Sep 1991 |
|
5171698 |
Shimoda |
Dec 1992 |
|
Foreign Referenced Citations (2)
Number |
Date |
Country |
52-47687 |
Apr 1977 |
JPX |
60-226183 |
Nov 1985 |
JPX |
Non-Patent Literature Citations (1)
Entry |
New Scaling Guidelines for NMOS Nonvolatile Memory Devices, S. Minami et al., IEEE Transactions on Electron Devices vol. 38, No. 11, Nov. 1991. |
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
183852 |
Jan 1994 |
|