Patent Application
20140102524
1. Field
This disclosure is generally related to solar cells. More specifically, this disclosure is related to a novel electron collector in a crystalline-Si (c-Si) based solar cell. The electron collector is formed by depositing a layer of low work function TCO and a layer of tunneling oxide on top of the c-Si base layer.
2. Related Art
The negative environmental impact caused by the use of fossil fuels and their rising cost have resulted in a dire need for cleaner, cheaper alternative energy sources. Among different forms of alternative energy sources, solar power has been favored for its cleanness and wide availability.
A solar cell converts light into electricity using the photoelectric effect. There are many solar cell structures and a typical solar cell contains a p-n junction that includes a p-type doped layer and an n-type doped layer. In addition, there are other types of solar cells that are not based on p-n junctions. For example, a solar cell can be based on a metal-insulator-semiconductor (MIS) structure that includes an ultra-thin dielectric or insulating interfacial tunneling layer situated between a metal or a highly conductive layer and a doped semiconductor layer.
In a p-n junction based solar cell, the absorbed light generates carriers. These carriers diffuse into the p-n junction and are separated by the built-in electric field, thus producing an electrical current across the device and external circuitry. An important metric in determining a solar cell's quality is its energy-conversion efficiency, which is defined as the ratio between power converted (from absorbed light to electrical energy) and power collected when the solar cell is connected to an electrical circuit.
To increase the conversion efficiency, a solar cell structure should allow the photon-generated carriers to effectively transport to the electrode. To do so, high-quality carrier collectors for both types of carriers (electrons and holes) are needed. A typical p-n junction based solar cell includes a lightly n- or p-type doped base and a heavily doped emitter with an opposite doping type. For solar cells with an n-type doped emitter, electrons are collected by the n-type emitter, and the holes flow to the opposite side. The n-type doped emitter is also called an electron collector. To prevent minority carrier recombination at the surface of the opposite side, a back surface field (BSF) layer (which is often a heavily doped layer having the same doping type as the base) can be formed at the surface of the opposite side. If the BSF layer is p-type doped, it collects holes. Similarly, for solar cells with a p-type doped emitter, holes are collected by the p-type emitter, and electrons flow to the opposite side to be collected by the n-type BSF layer.
Surface passivation is important for solar cell performance because it directly impacts the open circuit voltage (Voc). Note that a good Voc implies a good temperature coefficient, which enables a better solar cell performance at higher temperatures. One attempt to passivate the surface of the solar cell is to cover the surface of the Si absorber with materials having a wider bandgap, such as amorphous-Si (a-Si), or a thin layer of insulating material (such as silicon oxide or nitride). However, such passivation layers often impede current flows unintentionally.
One embodiment of the present invention provides a solar cell. The solar cell includes a base layer comprising crystalline Si (c-Si), an electron collector situated on a first side of the base layer, and a hole collector situated on a second side of the base layer, which is opposite the first side. The electron collector includes a quantum-tunneling-barrier (QTB) layer situated adjacent to the base layer and a transparent conducting oxide (TCO) layer situated adjacent to the QTB layer. The TCO layer has a work function of less than 4.2 eV.
In a variation on this embodiment, the base layer includes at least one of: a monocrystalline silicon wafer and an epitaxially grown crystalline-Si (c-Si) thin film.
In a variation on this embodiment, the QTB layer comprises at least one of: silicon oxide (SiOx), hydrogenated SiOx, silicon nitride (SiNx), hydrogenated SiNx, aluminum oxide (AlOx), aluminum nitride (AlNx), silicon oxynitride (SiON), hydrogenated SiON, amorphous Si (a-Si), hydrogenated a-Si, carbon doped Si, and SiC.
In a variation on this embodiment, the QTB layer has a thickness between 1 and 50 angstroms.
In a variation on this embodiment, the QTB layer comprises one of: SiOx and hydrogenated SiOx. The QTB layer is formed using at least one of the following techniques: running hot deionized water over the base layer, ozone oxygen oxidation, atomic oxygen oxidation, thermal oxidation, wet or steam oxidation, atomic layer deposition, low-pressure radical oxidation, and plasma-enhanced chemical-vapor deposition (PECVD).
In a variation on this embodiment, the TCO layer includes one or more of: tungsten doped indium oxide (IWO), Sn doped indium oxide (ITO), fluorine doped tin oxide (F:SnO2), zinc doped indium oxide (IZO), zinc and tungsten doped indium oxide (IZWO), and aluminum doped zinc oxide (AZO).
In a variation on this embodiment, the TCO layer is formed using a low damage deposition technique comprising one of: radio frequency (RF) sputtering, thermal evaporation, molecular beam epitaxy (MBE), metalorganic chemical-vapor deposition (MOCVD), atomic layer deposition (ALD), and ion plating deposition (IPD).
In a variation on this embodiment, the electron collector is situated on a front surface of the solar cell, facing incident light. If the base layer is lightly doped with p-type dopants, then the electron collector acts as a front-side emitter. If the base layer is lightly doped with n-type dopants, then the electron collector acts as a front surface field (FSF) layer.
In a further variation, the hole collector is situated on a back surface of the solar cell, facing away from the incident light. If the base layer is lightly doped with p-type dopants, then the hole collector acts as a back surface field (BSF) layer. If the base layer is lightly doped with n-type dopants, then the hole collector acts as a back-side emitter.
In a further variation, the hole collector comprises one or more of: a QTB layer, amorphous-Si (a-Si), hydrogenated a-Si, and microcrystalline Si.
In a further variation, the hole collector is graded doped and has a doping concentration ranging between 1×1012/cm3 and 5×1020/cm3.
In a variation on this embodiment, the electron collector is situated on a back surface of the solar cell, facing away from incident light. If the base layer is lightly doped with p-type dopants, then the electron collector acts as a back-side emitter. If the base layer is lightly doped with n-type dopants, then the electron collector acts as a back surface field (BSF) layer.
In a further variation, the hole collector is situated on a front surface of the solar cell, facing the incident light. If the base layer is lightly doped with p-type dopants, then the hole collector acts as a front surface field (FSF) layer. If the base layer is lightly doped with n-type dopants, then the hole collector acts as a front-side emitter.
In a variation on this embodiment, the base layer has an n-type or a p-type doping concentration ranging between 5×1014/cm3 and 1×1016/cm3.
In a variation on this embodiment, the base layer includes a shallow doping layer heavily doped with n-type dopants. The shallow doping layer has a peak doping concentration of at least 1×1019/cm3 and a junction depth of less than 100 nm.
In the figures, like reference numerals refer to the same figure elements.
The following description is presented to enable any person skilled in the art to make and use the embodiments, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Thus, the present invention is not limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
Embodiments of the present invention provide a crystalline-Si (c-Si) based solar cell that includes a novel, transparent electron collector. The novel electron collector includes a layer of transparent conducting oxide (TCO) material that has a work function that is less than 4.2 eV and a quantum tunneling barrier (QTB) layer. The novel, transparent electron collector can be situated at either the front or the back side of the solar cell with the QTB layer in direct contact with the c-Si base layer, and can act as either an emitter or a back surface field (BSF) layer.
Excellent surface passivation is a key to achieving high-efficiency solar cells. In addition, it is important to ensure that such excellent surface passivation does not impede current flow. In conventional Si-based solar cells, lightly doped or intrinsic amorphous Si (a-Si) or hydrogenated a-Si are often used to passivate the surface of c-Si substrates. The passivation effect is due to the reduction of the interface dangling bonds and the positive valence band offset between a-Si and c-Si. However, the presence of the a-Si passivation layer means that, to reach to the p-type emitter, holes need to tunnel through this band offset barrier and also need to hop through the lightly doped a-Si region. This can lead to much higher current loss due to internal recombination and the dramatically lower drift velocity through the interface. Hence, heavily doped emitter layers or BSF layers would be needed at both sides of the solar cell. However, emitter absorption can also limit the performance of the conventional heterojunction solar cells, because light absorbed by the emitter layer cannot contribute to the photocurrent. A typical heterojunction solar cell may lose up to 5% of light due to the emitter absorption. Usually there is a conflict between reducing absorption loss and surface passivation loss.
For solar cells fabricated using diffusion-based technologies, the heavily doped region on the front side of the solar cell may cause blue-blindness and current loss unless a selective-emitter technology is used. However, such technologies often require fine patterning and localized laser dopant activation, which may add to fabrication complexity and cost.
Although surface passivation using a-Si or a-Si:H can improve the solar cell performance by reducing surface recombination, such passivation is not ideal and the resulting open circuit voltage can be limited (often less than 640 mV). Thermal oxide used as a tunneling barrier can also provide low dangling bond interface, and can provide better surface passivation to generate a higher open circuit voltage (can be as high as 730 mV). However, this tunneling mechanism can limit the final short circuit current. More specifically, the intra-band tunneling between two non-degenerated semiconductor materials is not strong enough to sustain the high flow of photocurrent.
In addition to the heavily doped p-type emitter made of wider bandgap semiconductor materials, metal-insulator-semiconductor (MIS) structures have been used as n-type emitters in solar cell applications. Al is often used as the metal layer due to its low work function (at around 4.0 eV). However, because Al or other metals are not transparent and do not work well in spreading and collecting current, the MIS emitter is often located at the back side of the solar cell. Moreover, deposition of metals can often result in increased Dit on the surface of the semiconductor.
To overcome the aforementioned shortcomings of the light-absorbing emitters of conventional Si-based heterojunction solar cells, embodiments of the present invention provide solar cells that include an electron collector that is transparent to visible light. The transparent electron collector interfaces directly with the c-Si base, and can function as either an emitter or a BSF layer, depending on the doping type of the base layer. In some embodiments, the transparent electron collector includes a TCO layer and a thin quantum tunneling barrier (QTB) layer.
In embodiments of the present invention, instead of having an emitter made of a wider bandgap material (such as a-Si), the TCO/QTB structure can serve as a p-type emitter by directly interfacing with the c-Si base layer. More specifically, the TCO layer, which is heavily doped, can act as a metal layer, and the QTB layer can function as a passivation layer and tunneling barrier. For electron collection purposes, the work function of the TCO should match the conduction band edge of the c-Si, which is roughly 4.05 eV.
TCO material has been widely used to coat the front side of heterojunction solar cells in order to facilitate the spread of the photogenerated current and to provide anti-reflection coating (ARC). Typical TCO materials have a wider bandgap, thus being transparent to visible light. The heavily doped TCO material may incur absorption loss at the near IR regime. In general, a good TCO film may introduce 2-2.5% optical loss, all in the near IR regime. Compared with the light loss caused by conventional p-type emitters, optical loss induced by the TCO layer is much less.
Note that most TCO materials are heavily doped to an extent (with a doping concentration of at least 1×1019/cm3, sometimes higher than 2×1020/cm3) that they have degenerated carrier distribution. Moreover, the improved low-damage deposition techniques have made it possible to deposit a TCO film with an interface defect density (Dit) less than 1 e11/cm2. The degenerated carrier distribution in the TCO film and the low Dit make it possible to have a strong tunneling effect when the TCO/QTB structure is in contact with a lightly doped c-Si base. The tunneling process depends on the available carrier concentration at the starting side (the c-Si side) and the density of states at the receiving side (the TCO side), according to the Wentzel-Kramers-Brillouin (WKB) approximation. Based on the difference between the TCO work function and the c-Si conduction band edge, there are three different situations when strong tunneling is present.
Substrate 202 includes a layer of c-Si that is epitaxially grown or a c-Si wafer cut from an ingot obtained via the Czochralski (CZ) or floating zone (FZ) process and is lightly doped with either n-type dopants or p-type dopants. In one embodiment, substrate 202 is p-type doped. The thickness of substrate 202 can be between 80 and 300 μm. In some embodiments, the thickness of substrate 202 is between 120 and 180 μm. The doping concentration of substrate 202 can be between 5×1014/cm3 and 1×1016/cm3. In one embodiment, the doping concentration of substrate 202 is less than 5×1015/cm3. In a further embodiment, substrate 202 is graded doped with the doping concentration at the Si/QTB interface being larger than 1×1019/cm3.
QTB layer 204 directly contacts substrate 202, and can include one or more of: a dielectric thin film and a layer of wide bandgap semiconductor material with low or intrinsic doping. Exemplary materials used for the dielectric thin film include, but are not limited to: silicon oxide (SiOx), hydrogenated SiOx, silicon nitride (SiNx), hydrogenated SiNx, silicon oxynitride (SiON), hydrogenated SiON, aluminum oxide (AlOx), and aluminum nitride (AlNx). Examples of the wide bandgap materials include, but are not limited to: amorphous Si (a-Si), hydrogenated a-Si, carbon doped a-Si, and silicon carbide (SiC). In one embodiment, QTB layer 204 includes either SiOx, such as SiO; or hydrogenated SiOx. The SiOx or hydrogenated SiOx layer can be formed using various oxidation techniques, such as running hot deionized water over the substrate, ozone oxygen oxidation, atomic oxygen oxidation, thermal oxidation, steam or wet oxidation, atomic layer deposition, and plasma-enhanced chemical-vapor deposition (PECVD). The thickness of QTB layer 204 can be between 5 and 50 angstroms. In one embodiment, QTB layer 204 includes a SiOx layer having a thickness between 8 and 15 Å.
TCO layer 206 includes a layer of low work function TCO material. In one embodiment, the low work function TCO material has a work function of less than 4.2 eV. Note that, although most common TCO materials have work functions within the range between 4.5 and 4.6 eV, obtaining TCO materials with lower work functions is also possible. For example, aluminum doped zinc oxide (AZO) can be a good candidate with a special mixture of crystal phase/orientations. Other examples of low work function TCO materials include, but are not limited to: tungsten doped indium oxide (IWO), Sn doped indium oxide (ITO), fluorine doped tin oxide (F:SnO2), zinc doped indium oxide (IZO), zinc and tungsten doped indium oxide (IZWO), and their combinations. Note that the work function of most TCO materials can be tuned by adjusting the carrier concentration and doping. In addition, one can control the TCO work function by controlling the crystalline orientation and surface condition. To ensure sufficiently low Dit, in one embodiment, TCO layer 206 is deposited on QTB layer 204 using a low-damage deposition method. Examples of low-damage deposition methods include, but are not limited to: radio frequency (RF) sputtering; thermal evaporation; epitaxial growth, such as molecular beam epitaxy (MBE) and metalorganic chemical-vapor deposition (MOCVD); atomic layer deposition (ALD); and ion plating deposition (IPD). In one embodiment, the Dit at the TCO/QTB interface is less than 1×1011/cm2, which ensures good surface passivation. TCO layer 206 is often heavily doped (with metal ions) with a doping concentration of at least 1×1019/cm3. In one embodiment, the doping concentration of TCO layer 206 is greater than 2×1020/cm3. The thickness of TCO layer 206 can be controlled to meet the anti-reflection requirement. In one embodiment, TCO layer 206 also acts as an anti-reflection (AR) coating, having a thickness of around 100 nm.
Note that TCO layer 206 and QTB layer 204 together form an n-type emitter, and collect electron current, as shown in
BSF layer 208 can include a Si layer that is heavily doped with p-type dopant, and is responsible for collecting hole current, as shown in
In the example shown in
Note that the TCO/QTB structure collects electron current when placed in direct contact with the lightly doped c-Si substrate. Hence, in addition to functioning as an n-type emitter and being placed at the light-facing side of a solar cell, it is also possible to place this structure at the backside of the solar cell. In one embodiment, the solar cell includes a front p-type emitter that collects hole current and a back TCO/QTB structure acting as a BSF layer to collect electron current. Note that because the TCO/QTB structure is transparent to visible light, the solar cell can be bifacial, meaning that light shining on both sides of the solar cell can be absorbed to generate photo current.
Substrate 302 can be similar to substrate 202 shown in
QTB layer 304 is situated directly underneath substrate 302. Materials and processes used to form QTB layer 304 can be similar to those used to form QTB layer 204. In addition, the thickness of QTB layer 304 is similar to that of QTB layer 204, which can be between 5 and 50 angstroms.
Like TCO layer 206, TCO layer 306 includes a layer of low work function TCO material, such as AZO, IWO, ITO, F:SnO2, IZO, IZWO, and their combinations. The process used to form TCO layer 306 can be similar to the one used to form TCO layer 206. If solar cell 300 is bifacial, TCO layer 306 can also be used as an AR coating.
Because the TCO/QTB structure shown in
Front-side electrode 310 and back-side electrode 312 are responsible for collecting the corresponding current. In one embodiment, front-side electrode 310 and back-side electrode 312 include an electroplated or screen-printed metal grid.
In the example shown in
Note that, although in
Either n- or p-type doped high-quality solar-grade silicon (SG-Si) wafers can be used to build the solar cell with the novel electron collector. In one embodiment, a p-type doped SG-Si wafer is selected to fabricate a solar cell with the TCO/QTB structure acting as an electron-collecting emitter.
In operation 4A, an SG-Si substrate 400 is prepared. The resistivity of the SG-Si substrate is typically in, but not limited to, the range between 0.5 ohm-cm and 10 ohm-cm. SG-Si substrate can include a monocrystalline Si wafer that is cut from an ingot obtained via the CZ/FZ process. The preparation operation includes typical saw damage etching that removes approximately 10 μm of silicon. In one embodiment, surface texturing can also be performed. Afterwards, the SG-Si substrate goes through extensive surface cleaning. In addition, SG-Si substrate can also come from an epitaxial process (such as MBE or MOCVD) where a c-Si epitaxial film is grown on and then removed from a growth substrate. In one embodiment, SG-Si substrate is lightly doped with p-type dopants with a doping concentration that ranges between 5×1014/cm3 and 1×1016/cm3.
In operation 4B, a thin layer of high-quality (with D, less than 1×1011/cm2) dielectric or wide bandgap semiconductor material is deposited on the front surface of SG-Si substrate 400 to form front-side passivation/tunneling layer 402. In one embodiment, both the front and back surfaces of SG-Si substrate 400 are deposited with a thin layer of dielectric or wide bandgap semiconductor material. Various types of dielectric materials can be used to form the passivation/tunneling layers, including, but not limited to: silicon oxide (SiOx), hydrogenated SiOx, silicon nitride (SiNx), hydrogenated SiNx, silicon oxynitride (SiON), hydrogenated SiON, aluminum oxide (AlOx), and aluminum nitride (AlNx). If front-side passivation/tunneling layer 402 includes SiOx or hydrogenated SiOx, various deposition techniques can be used to deposit such oxide layers, including, but not limited to: thermal oxidation, atomic layer deposition, wet or steam oxidation, low-pressure radical oxidation, plasma-enhanced chemical-vapor deposition (PECVD), etc. The thickness of the tunneling/passivation layer can be between 5 and 50 angstroms, preferably between 8 and 15 angstroms. Note that a well-controlled thickness of the tunneling/passivation layer ensures good tunneling and passivation effects. In addition to dielectric material, a variety of wide bandgap semiconductor materials, such as a-Si, hydrogenated a-Si, carbon doped a-Si, and SiC, can also be used to form the tunneling/passivation layer.
In operation 4C, a layer of low work function TCO material is deposited on top of front-side passivation/tunneling layer 402 using a low damage deposition technique to form a TCO layer 404. In one embodiment, the work function of TCO layer 404 is less than the c-Si conduction band edge, or 4.05 eV. Examples of low work function TCO materials include, but are not limited to: AZO, IWO, ITO, F:SnO2, IZO, IZWO, and their combinations. Examples of the low-damage deposition technique include, but are not limited to: radio frequency (RF) sputtering; thermal evaporation; epitaxial growth, such as molecular beam epitaxy (MBE) and metalorganic chemical-vapor deposition (MOCVD); atomic layer deposition (ALD); and ion plating deposition (IPD). In one embodiment, the Dit at the TCO/QTB interface is controlled to be less than 1×1011/cm2, which ensures good surface passivation. The thickness of TCO layer 404 can be determined based on the anti-reflection requirement.
The combination of low work function TCO layer 404 and passivation/tunneling layer 402 functions as an electron-collecting emitter when directly interfaced with SG-Si substrate 400. Such a structure eliminates the need for an additional emitter that can collect electrons and is made of wide bandgap materials, which may absorb a small portion of incoming light. On the contrary, this new electron-collecting emitter is transparent to visible light, thus significantly increasing solar cell efficiency. In addition, the elimination of the wide bandgap emitter simplifies the fabrication process, as the deposition of a TCO layer has been part of the standard fabrication process of the conventional solar cells.
In operation 4D, a layer of a-Si with graded doping is deposited on the back surface of SG-Si substrate 400 to form back surface field (BSF) layer 406. In one embodiment, BSF layer 406 is p-type doped using boron as dopant. The thickness of BSF layer 406 can be between 3 and 30 nm. BSF layer 406 collects the hole current and improves the back-side passivation. For graded doped BSF layer 406, the region within BSF layer 406 that is adjacent to SG-Si substrate 400 has a lower doping concentration, and the region that is away from SG-Si substrate 400 has a higher doping concentration. The lower doping concentration ensures minimum defect density at the interface between SG-Si substrate 400 and BSF layer 406, and the higher concentration on the other side ensures good ohmic-contact with the subsequently formed back-side electrode. In one embodiment, the doping concentration of BSF layer 406 varies from 1×1012/cm3 to 5×1020/cm3. In addition to a-Si, it is also possible to use other materials, such as hydrogenated a-Si, microcrystalline Si, or a semiconductor material with a wide bandgap, to form BSF layer 406. Using microcrystalline Si material for BSF layer 406 can ensure lower series resistance and better ohmic contact.
In operation 4E, front-side electrode 408 and back-side electrode 410 are formed on the surfaces of TCO layer 404 and BSF layer 406, respectively. In some embodiments, front-side electrode 408 and/or back-side electrode 410 include Ag finger grids, which can be formed using various techniques, including, but not limited to: screen printing of Ag paste, inkjet or aerosol printing of Ag ink, and evaporation. In some embodiments, front-side electrode 408 and back-side electrode 410 can include a Cu grid formed using various techniques, including, but not limited to: electroless plating, electroplating, sputtering, and evaporation.
In one embodiment, the TCO/QTB structure can be placed at the backside of the solar cell to act as an electron-collecting BSF layer.
In operation 5A, an SG-Si substrate 500 is prepared using a process that is similar to operation 4A. In one embodiment, SG-Si substrate 500 is lightly doped with n-type dopants with a doping concentration ranging between 5×1014/cm3 and 1×1016/cm3.
In operation 5B, a thin layer of high-quality (with Dit less than 1×1011/cm2) dielectric or wide bandgap semiconductor material is deposited on the back surface of SG-Si substrate 500 to form back-side passivation/tunneling layer 502. The processes and materials that can be used to form back-side passivation/tunneling layer 502 are similar to the ones used in operation 4B. In one embodiment, both the front and back surfaces of SG-Si substrate 500 are deposited with a thin layer of dielectric or wide bandgap semiconductor material.
In operation 5C, a layer of a-Si with graded doping is deposited on the front surface of SG-Si substrate 500 to form an emitter layer 504, which faces the incident sunlight. In one embodiment, emitter layer 504 collects hole current and is doped with p-type dopants, such as boron. The thickness of emitter layer 504 is between 2 and 50 nm. Note that the doping profile of emitter layer 504 can be optimized to ensure good ohmic contact, minimum light absorption, and a large built-in electrical field. In one embodiment, the doping concentration of emitter layer 504 varies from 1×1012/cm3 to 5×1020/cm3. In a further embodiment, the region within emitter layer 504 that is adjacent to SG-Si substrate 500 has a lower doping concentration, and the region that is away from SG-Si substrate 500 has a higher doping concentration. The lower doping concentration ensures minimum defect density at the interface, and the higher concentration on the other side prevents emitter layer depletion. In addition to a-Si, materials used to form emitter layer 504 can also include hydrogenated a-Si, microcrystalline Si, or a semiconductor material with a wide bandgap. Moreover, emitter layer 504 can include other types of structures, such as MIS or a TCO-insulator-semiconductor structure. Note that, in order to collect holes, the TCO used here needs to have a high (at least 5.0 eV) work function.
In operation 5D, a layer of low work function TCO material is deposited on the surface of passivation/tunneling layer 502 to form a back-side TCO layer 506. Materials and processes that can be used to form back-side TCO layer 506 are similar to the ones used in operation 4C.
The combination of low work function TCO layer 506 and passivation/tunneling layer 502 functions as an electron-collecting BSF layer when directly interfaced with SG-Si substrate 500. In addition to collecting electron current, the TCO/QTB structure also passivates the backside of the solar cell.
In operation 5E, front-side electrode 508 and back-side electrode 510 are formed on the surfaces of emitter layer 504 and TCO layer 506, respectively. Materials and processes that can be used to form front-side electrode 508 and back-side electrode 510 are similar to the ones used in operation 4E.
Note that, if the selected TCO material has a work function that is slightly higher (by about 0.05-0.15 eV) than the c-Si conduction band edge, an additional fabrication operation is needed before the formation of the TCO/QTB structure. The additional fabrication operation includes shallow doping of n-type dopants at the surface of the base layer. In one embodiment, the peak carrier concentration of the shallow doping is at least 1×1019/cm3 and the doping depth is less than 100 nm. In a further embodiment, the shallow doping process involves one or more of: diffusion of doped silica glass, ion implantation, laser doping, etc. The TCO/QTB structure can then be formed on top of the shallow, heavily n-doped layer.
The foregoing descriptions of various embodiments have been presented only for purposes of illustration and description. They are not intended to be exhaustive or to limit the present invention to the forms disclosed. Accordingly, many modifications and variations will be apparent to practitioners skilled in the art. Additionally, the above disclosure is not intended to limit the present invention.
This application claims the benefit of U.S. Provisional Application No. 61/713,871, Attorney Docket Number SSP12-1005PSP, entitled “Low Absorption Emitter for Crystalline Silicon Solar Cells with Low-Work-Function-TCO and Tunneling Oxide,” by inventors Zhigang Xie, Wei Wang, Jiunn Benjamin Heng, Jianming Fu, and Zheng Xu, filed 15 Oct. 2012.
| Number | Date | Country | |
|---|---|---|---|
| 61713871 | Oct 2012 | US |
