Claims
- 1. A memory system for a numerical control device having a power source, having a memory, and having a processor connected to said memory, the processor for executing numerical control processing on the basis of data stored in said memory, wherein said memory system comprises:
- a magnetic bubble memory;
- an integrated circuit memory; and
- an interface circuit, connected between said magnetic bubble memory and said integrated circuit memory and connected to the power source, for transferring data between said magnetic bubble memory and said integrated circuit memory so that the data stored in said magnetic bubble memory is transferred to and stored in said integrated circuit memory through said interface circuit when power from the power source of the numerical control device is applied thereto, wherein numerical control processing is executed in accordance with the data in said integrated circuit memory.
- 2. A numerical control device, comprising:
- numerical control porcessor means for executing numerical control processing;
- an integrated circuit memory connected to said numerical control processor means;
- a magnetic bubble memory; and
- an interface circuit, connected between said integrated circuit memory and said magnetic bubble memory, for transferring data from said magnetic bubble memory to said integrated circuit memory.
- 3. A numerical control device as recited in claim 2, further comprising:
- a power source, connected to said numerical control processor means, to said integrated circuit memory, to said interface circuit and to said magnetic bubble memory, for generating a power source enable signal, wherein when the power source enable signal is received by said numerical control processor means, said numerical control processor means generates an initial load command; and
- an initial program loader memory, within said numerical control processor means and said interface circuit being connected to said numerical control processor means, for storing control signals and for outputting the control signals when the initial load command is generated and wherein when said interface circuit receives the control signals, said interface circuit transfers the data from said magnetic bubble memory to said integrated circuit memory.
- 4. A numerical control device as recited in claim 2, further comprising a power source, connected to said numerical control processor means, to said integrated circuit memory, to said interface circuit and to said magnetic bubble memory, for generating a power source enable signal, wherein when said interface circuit receives the power source enable signal said interface circuit transfers the data from said magnetic bubble memory to said integrated circuit memory.
- 5. A fast/slow memory system for a numerical controller, comprising:
- a memory hierarchy comprising a magnetic bubble memory and an integrated circuit memory;
- a processor, connected to said integrated circuit memory, for executing data processing on the basis of data stored in said integrated circuit memory; and
- an interface circuit, connected between said magnetic bubble memory and said integrated circuit memory, for controlling the transfer of said data between said magnetic bubble memory and said integrated circuit memory, a numerical control program being stored in said magnetic bubble memory as said data, the numerical control program stored in said magnetic bubble memory being transferred to said integrated circuit memory through said interface circuit by introducing power and said processor performing numerical control processing under the control of the numerical control program stored in said integrated circuit memory.
Priority Claims (1)
Number |
Date |
Country |
Kind |
54-90562[U] |
Jun 1979 |
JPX |
|
Parent Case Info
This application is a continuation-in-part, of application Ser. No. 243,935, filed Mar. 2, 1981, now abandoned.
PCT Information
Filing Document |
Filing Date |
Country |
Kind |
102e Date |
371c Date |
PCT/JP80/00149 |
6/30/1980 |
|
|
2/20/1981 |
3/2/1981 |
Publishing Document |
Publishing Date |
Country |
Kind |
WO81/00158 |
1/22/1981 |
|
|
US Referenced Citations (8)
Non-Patent Literature Citations (1)
Entry |
System Utilizing Low Cost Control Store Backing Memory; R. P. Fletcher, IBM Technical Disclosure Bulletin, vol. 20, No. 10, Mar. 1978, pp. 4226-4229. |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
243935 |
Mar 1981 |
|