The present disclosure relates to the field of display technology, in particular to an OLED display structure and electronic equipment.
In the existing OLED display structure, the threshold voltage (Vth) of the thin film transistor (TFT) is prone to drift phenomenon when the positive voltage is applied for a long time, the change of Vth will eventually cause the current of the OLED to change, and for the three colors of red, green and blue (R/G/B) of the OLED display structure, due to the different light emitting areas of the three colors of R/G/B, the changing speed of the OLED current on the three colors of R/G/B varied with Vth is not consistent, the finally presented R/G/B brightness changing speed is also inconsistent, which easily leads to the color offset problem of the OLED display structure.
The technical solutions of the present disclosure disclose an OLED display structure and electronic equipment with uniform color rendering.
An OLED display structure comprises pixels, the pixels include a first sub-pixel, a second sub-pixel and a third sub-pixel, the first sub-pixel comprises a first storage capacitor, a first auxiliary capacitor and a first light emitting area, the second sub-pixel comprises a second storage capacitor, a second auxiliary capacitor and a second light emitting area, and the third sub-pixel comprises a third storage capacitor, a third auxiliary capacitor and a third light emitting area, the area of the first light emitting area is defined as S(1), the area of the second light emitting area is defined as S(2), and the area of the third light emitting area is defined as S(3), the capacitance value of the first auxiliary capacitor is defined as C2(1), the capacitance value of the second auxiliary capacitor is defined as C2(2), and the capacitance value of the third auxiliary capacitor is defined as C2(3), wherein S(1)<S(2)<S(3), and C2(1)>C2(2)>C2(3).
An electronic equipment includes the above-mentioned OLED display structure.
In the OLED display structure and electronic equipment of the present disclosure, by setting C2(1)>C2(2)>C2(3), it can compensate for the difference of the changing speed of R/G/B OLED current under different Vth, so the problem of color offset is not easy to occur.
In order to illustrate technical solutions in the embodiments of the present disclosure more clearly, the drawings to be used in the embodiment will be briefly introduced below, obviously, the drawings in the following description are only some embodiments of the present disclosure, for those ordinarily skilled in the art, other drawings can also be obtained in light of these drawings, without using any inventive efforts.
The technical solutions in the embodiment of the present disclosure will be clearly and completely described below in combination with the drawings in the embodiments of the technical solutions of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, not all the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those ordinary skilled in the art without creative work shall fall within the protection scope of the present disclosure.
Please refer to
Each sub-pixel includes a storage capacitor, an auxiliary capacitor, and an organic light emitting diode, each sub-pixel also has a light emitting area, wherein the lighting emitting areas of three sub-pixels have different areas, among the three sub-pixels, the larger the area of the lighting emitting area is, the smaller the auxiliary capacitance value of the sub-pixel is.
Specifically, as shown in
The area of the first light emitting area 114 of the first sub-pixel 11 is defined as S(1), the area of the second light emitting area 124 of the second sub-pixel 12 is defined as S(2), and the area of the third light emitting area 134 of the third sub-pixel 13 is defined as S(3), the capacitance value of the first auxiliary capacitor 112 corresponding to the first sub-pixel 11 is defined as C2(1), the capacitance value of the second auxiliary capacitor 122 corresponding to the second sub-pixel 12 is defined as C2(2), and the capacitance value of the third auxiliary capacitor 132 corresponding to the third sub-pixel 13 is defined as C2(3), then S(1)<S(2)<S(3), and C2(1)>C2(2)>C2(3).
Further, the capacitance value of the first storage capacitor 111 corresponding to the first sub-pixel 11 is defined as C1(1), the capacitance value of the first storage capacitor 121 corresponding to the second sub-pixel 12 is defined as C1(2), and the capacitance value of the first storage capacitor 131 corresponding to the third sub-pixel 13 is defined as C1(3), then C1(1)=C1(2)=C1(3).
In this embodiment, the capacitance value of the capacitor is adjusted by adjusting the area of the capacitor.
As shown in
The first sub-pixel 11, the second sub-pixel 12, and the third sub-pixel 13 may be three primary color sub-pixels respectively, that is, one of the red, green and blue sub-pixels.
In this embodiment, the first sub-pixel 11 is a red sub-pixel, the second sub-pixel 12 is a green sub-pixel, and the third sub-pixel 13 is a blue sub-pixel.
Each sub-pixel further includes a plurality of transistors, and preferably, each sub-pixel includes at least 4 thin film transistors.
In this embodiment, each sub-pixel includes four thin film transistors, one storage capacitor, one auxiliary capacitor, and at least one organic light emitting diode, that is, in this embodiment, the pixel driving circuit of each sub-pixel is a 4T2C pixel driving circuit.
In one embodiment, four thin film transistors are respectively a driving thin film transistor and three switching thin film transistors.
In one embodiment, the driving thin film transistor includes a gate electrode, a source electrode, and a drain electrode, and the storage capacitor is connected between the gate electrode and the drain electrode of the driving thin film transistor.
In one embodiment, the auxiliary capacitor is connected between a switching thin film transistor and the driving thin film transistor, and the switching thin film transistor is configured to receive a reference voltage; for example, the auxiliary capacitor is connected between the source electrode of the switching thin film transistor and the drain electrode of the driving thin film transistor, or is connected between the drain electrode of the switching thin film transistor and the source electrode of the driving thin film transistor.
In one embodiment, the anode of the organic light emitting diode is electrically connected to the drain electrode of the driving thin film transistor.
Preferably, the thin film transistors of the technical solution are all of the top gate structure, that is, the gate electrode is on the upper side of the channel layer, and the source and drain electrodes are on the lower side of the channel layer.
The following uses an embodiment to describe in detail a 4T2C pixel driving circuit of a sub-pixel:
Please refer to
The first, second, and third switching thin film transistors SW1, SW2, and SW3 and the driving thin film transistor DR all include a gate electrode, a drain electrode and a source electrode, wherein the gate electrode of the first switching thin film transistor SW1 is configured to receive the previous-level gate signal Gn−1, the source electrode is configured to receive an input signal Int, and the drain electrode is electrically connected to the node A. The gate electrode of the second switching thin film transistor SW2 is configured to receive a gate signal Gn, the drain electrode is electrically connected to the gate electrode of the driving thin film transistor DR, the source electrode is configured to receive a data signal Data, wherein the data signal has a data voltage. The gate electrode of the third switching thin film transistor SW3 is configured to be electrically connected to the control main line En, the drain electrode is electrically connected to the source electrode of the driving thin film transistor DR, and the drain electrode is electrically connected to a first reference voltage ELVDD. The gate electrode of the driving thin film transistor DR is electrically connected to the drain electrode of the second switching thin film transistor SW2, the drain electrode is electrically connected to the node A, and the source electrode is electrically connected to the source electrode of the third switching thin film transistor SW3.
The storage capacitor C1 is bridged between the gate electrode and the drain electrode of the driving thin film transistor DR. The auxiliary capacitor C2 is bridged between the source electrode of the third switching thin film transistor SW3 and the node A (the drain electrode of the driving thin film transistor DR).
The organic light emitting diode OLED includes an anode and a cathode, the anode of the organic light emitting diode OLED is electrically connected to the drain electrode of the driving thin film transistor DR, and the cathode is electrically connected to a second reference voltage ELVSS. In this embodiment, a filter capacitor C3 is connected in parallel between the anode and the cathode of the organic light emitting diode OLED.
The following uses another embodiment to describe in detail another 4T2C pixel driving circuit of a sub-pixel.
Please refer to
In an embodiment, the driving thin film transistor T2 and the first, second, and third switching thin film transistors T1, T3, and T4 are all N-type thin film transistors.
The gate electrode of the first switching thin film transistor T1 is configured to receive a scan signal (Scan), source electrode is configured to receive a data signal Data (the data signal Data represents a data voltage), and the drain electrode is electrically connected to the node G. The gate electrode of the driving thin film transistor T2 is electrically connected to the drain electrode of the first switching thin film transistor T1 and the node G, the drain electrode is electrically connected to the drain electrode of the second switching thin film transistor T3 and the node D, and the drain electrode is electrically connected to the node S. The gate electrode of the second switching thin film transistor T3 receives a switching signal EM, the source electrode is electrically connected to a first reference voltage OVDD. The gate electrode of third switching thin film transistor T4 receives a reset signal RESET, the source electrode receives a sustain voltage signal Vsus, and the drain electrode is electrically connected to the node S.
The anode of the organic light emitting diode OLED is electrically connected to the node S (the drain electrode of the driving thin film transistor T2), and the cathode is electrically connected to a second reference voltage OVSS, wherein the first reference voltage OVDD is greater than the second reference voltage OVSS.
The storage capacitor C1 is bridged between the node G (the gate electrode of the driving thin film transistor T2) and the node S (the drain electrode of the driving thin film transistor T2); the auxiliary capacitor C2 is bridged between the source electrode of the second switching thin film transistor T3 and the node S (the drain electrode of the driving thin film transistor T2).
In other embodiments, each of the sub-pixels may also include five thin film transistors, six thin film transistors or even more, that is, the pixel driving circuit of the sub-pixel may also be 5T2C pixel driving circuit, and 6T2C pixel driving circuit, and the like.
Please refer to
In the above, the electronic equipment 2 may be a mobile phone, a tablet computer, and an e-book, and the like.
In the prior art, the changing speed of R/G/B OLED current under different Vth is not consistent, as shown in
The above are the preferred embodiments of the present disclosure, it should be pointed out that for those ordinarily skilled in the art, without departing from the principle of the present disclosure, several improvements and modifications can also be made, and these improvements and modifications are also considered to be within the protection scope of the present disclosure.
Filing Document | Filing Date | Country | Kind |
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PCT/CN2019/070693 | 1/7/2019 | WO | 00 |