Claims
- 1. A one bit digital to analog converter, comprising:
- a. a subtraction circuit for receiving a one bit digital signal and a feedback signal;
- b. a signal processor for converting the output of said subtraction circuit into an analog signal; and
- c. a sampling circuit for sampling said analog signal to provide said feedback signal.
- 2. The one bit digital to analog converter of claim 1 in which said signal processor comprises a discrete time processor.
- 3. The one bit digital to analog converter of claim 2 in which said discrete time processor comprises an integrator chain.
- 4. The one bit digital to analog converter of claim 3 in which said integrator chain comprises a first integrator having an operational amplifier with an integration capacitor connected from an output to one input of said operational amplifier.
- 5. The one bit digital to analog converter of claim 4 in which said subtraction circuit comprises two switched capacitor circuits each connected at one end to said one input of said operational amplifier.
- 6. The one bit digital to analog converter of claim 3 in which the output of the integrators of said integrator chain are summed and connected'to a low pass filter.
- 7. The one bit digital to analog converter of claim 6 in which said low pass filter is a second order Butterworth filter.
- 8. The one bit digital to analog converter of claim 2 in which said signal processor comprises a continuous time processor.
- 9. The one bit digital to analog converter of claim 8 in which said continuous time processor comprises a continuous time low pass smoothing filter.
- 10. The one bit digital to analog converter of claim 8 in which said continuous time processor comprises a second order g.sub.m C filter.
- 11. The one bit digital to analog converter of claim 1 in which a finite impulse response filter is connected between said digital signal and said subtraction circuit.
- 12. The one bit digital to analog converter of claim 11 in which said finite impulse response filter is an analog finite impulse filter.
- 13. The one bit digital to analog converter of claim 11 in which said finite impulse response filter is a time multiplexed analog finite impulse filter.
- 14. The one bit digital to analog converter of claim 1 in which a buffer is connected between the output of said signal processor and said sampling circuit.
- 15. The one bit digital to analog converter of claim 1 in which said sampling circuit comprises a switch between said analog output and said subtraction circuit.
- 16. The one bit digital to analog converter of claim 1 in which said sampling circuit comprises two paths from said analog output to said subtraction circuit.
- 17. The one bit digital to analog converter of claim 16 in which one of said paths provides a rough charge of a capacitor of a switched capacitor input to said subtraction circuit and the other path provides a fine charge of said switched capacitor.
- 18. The one bit digital to analog converter of claim 1 in which said one of said paths comprises a rough charge buffer.
- 19. A method of converting a one bit digital signal to an analog signal, comprising the step of:
- combining feedback from an analog output across the discrete time/continuous time interface to an input receiving said one bit digital signal.
- 20. A method of converting a one bit digital signal to an analog signal, comprising the step of:
- passing a one bit digital signal from an input through a finite impulse response filter to a signal processing stage providing feedback from said analog output to the input of said signal processing stage.
- 21. A system for signal processing comprising:
- a. a source of one bit digital signals;
- b. a one bit digital to analog converter receiving said one bit digital signals and converting them to an analog signal; and
- c. a feedback circuit providing feedback from said analog signal to at least one input of said digital to analog converter.
- 22. The system of claim 21 in which said digital to analog converter comprises at least one switched capacitor integrator.
- 23. The system of claim 21 in which said digital to analog converter comprises an amplifier followed by discrete time and continuous time filtering.
- 24. An integrated circuit, comprising:
- a. an input for receiving one bit digital signals;
- b. a one bit digital to analog converter receiving said one bit digital signals and converting them to an analog signal; and
- c. a feedback circuit providing feedback from said analog signal to at least one input of said digital to analog converter.
CROSS-REFERENCE TO RELATED APPLICATIONS
The invention disclosed herein is related to application Ser. No. 09/089,490, filed Jun. 2, 1998, by inventors Wai Laing Lee, Axel Thomsen, Lei Wang and Dan Kasha and entitled "A DIGITAL TO ANALOG CONVERTER HAVING IMPROVED NOISE AND LINEARITY PERFORMANCE."
The invention disclosed herein is related to application Ser. No. 09/089,489, filed Jun. 2, 1998, by inventors Wai Laing Lee, Axel Thomsen, Lei Wang and Dan Kasha and entitled "A MULTIBIT DIGITAL TO ANALOG CONVERTER WITH FEEDBACK ACROSS THE DISCRETE TIME/CONTINUOUS TIME INTERFACE."
The invention disclosed herein is related to application Ser. No. 09/089,497, filed Jun. 2, 1998, by inventors Wai Laing Lee, Axel Thomsen, Lei Wang and Dan Kasha and entitled "A ONE BIT DIGITAL TO ANALOG CONVERTER WITH RELAXED FILTERING REQUIREMENTS."
The invention disclosed herein is related to application Ser. No. 09/089,495, filed Jun. 2, 1998, by inventors Wai Laing Lee, Axel Thomsen, Lei Wang and Dan Kasha and entitled "A DIGITAL TO ANALOG CONVERTER FOR CORRECTING FOR NON-LINEARITIES IN ANALOG DEVICES."
The invention disclosed herein is related to application Ser. No. 09/089,496, filed Jun. 2, 1998, by inventors Wai Laing Lee, Axel Thomsen, Lei Wang and Dan Kasha and entitled "A DIGITALLY DRIVEN ANALOG TEST SIGNAL GENERATOR."
US Referenced Citations (4)
Number |
Name |
Date |
Kind |
5376936 |
Kerth et al. |
Dec 1994 |
|
5412348 |
Kasha et al. |
May 1995 |
|
5541599 |
Kasha et al. |
Jul 1996 |
|
5644257 |
Kerth et al. |
Jul 1997 |
|