Patent Application
20230198207
When two nodes have a different electrical potential, such as different electrical charge accumulation, and the two nodes are electrically connected, an electrostatic discharge (ESD) occurs. Current flows and seeks a low impedance path from the higher potential node to a ground reference voltage level. In one example, a user inserts a head contact of a cable into a connector port of an input/output interface of a computing system, and it is possible that electrical charge had accumulated on the skin, which causes the electrostatic discharge event. The circuitry of ESD protection components are used to provide a lowest impedance path to the ground reference voltage level, which protect circuits of an input/output interface and one or more functional blocks of an integrated circuit connected to the input/output interface. These ESD protection components are located near the input/output interface of the integrated circuit. However, as signal rates increase through the input/output interface, these ESD protection components increase transmission line loss and reduce signal integrity. It is desired to have a method to both provide ESD protection for circuit nodes without introducing insertion loss.
In view of the above, efficient methods and systems for input/output (I/O) port protection from electrostatic discharge events are desired.
While the invention is susceptible to various modifications and alternative forms, specific implementations are shown by way of example in the drawings and are herein described in detail. It should be understood, however, that drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the invention is to cover all modifications, equivalents and alternatives falling within the scope of the present invention as defined by the appended claims.
In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, one having ordinary skill in the art should recognize that the invention might be practiced without these specific details. In some instances, well-known circuits, structures, and techniques have not been shown in detail to avoid obscuring the present invention. Further, it will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements.
Systems and methods for efficiently providing input/output port protection from electrostatic discharge events are contemplated. In various implementations, an integrated circuit mounted on a printed circuit board includes one or more functional blocks. The integrated circuit also includes an input/output interface with a connector port that communicates with a peripheral device through a link between the peripheral device and the connector port. The link includes a head contact of a cable that is inserted into the connector port by a user. The connector port uses multiple signal pins within a metal shell mounted on the printed circuit board. The multiple signal pins are connected to one or more of the functional blocks of the integrated circuit. The shell is electrically connected to a ground reference voltage level of the printed circuit board. At least a first signal pin of the multiple signal pins is electrically connected to the ground reference voltage level though a spring pin located between the shell and the first signal pin. Therefore, the first signal pin is not floating.
A user inserts the head contact of the cable into the connector port. The head contact of the cable is associated with a display connector, a Universal Serial Bus (USB) link, or other. The head contact includes multiple signal pins including a second signal pin that is floating. As the user inserts the head contact into the connector port, the second signal pin becomes physically connected to the first signal pin. As a result, the second signal pin is set to the ground reference voltage level and is no longer floating. If there is a difference in electrical potential between the first signal pin and the second signal pin, an electrostatic discharge occurs, and the corresponding current flows through the low impedance path provided by the first signal pin, the spring pin, and the shell connected to the ground reference voltage level. For example, as the second signal pin becomes physically connected to the first signal pin, if the second signal pin has a non-zero electrical potential, whereas, the first signal pin has the ground reference voltage level, then there is a difference in electrical potential that causes the electrostatic discharge to occur. The use of the spring pin provides ESD protection, though.
As the user continues to insert the head contact into the connector port, the head contact is configured to push the spring pin causing physical disconnection of the spring pin from the first signal pin. As a result, the first signal pin is disconnected from the metal shell of the connector port, and each of the first signal pin and the second signal pin remains at a same electrical potential. By being at the same electrical potential, a further electrostatic discharge is unable to occur. At this point in time, the head contact is fully inserted into the connector port, and each of the first signal pin and the second signal pin is available for transmitting data. In some implementations, the functional block that receives the first signal pin does not include electrostatic discharge protection circuitry.
Turning now to
In the illustrated implementation, clients 120 include multiple processing units 122-124. Examples of processing units 122-124 are a central processing unit (CPU) with circuitry used for processing instructions of a selected instruction set architecture (ISA), a graphics processing unit (GPU) with circuitry that implements a high parallel data microarchitecture, a Hub used for communicating with multimedia engine, and a multimedia engine with circuitry that processes audio data and visual data for multimedia applications. In another implementation, examples of the processing units 122-124 include one or more application specific integrated circuits (ASICs) or microcontrollers, one or more digital signal processors (DSPs), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). Other data processing semiconductor chip designs included within clients 120 are possible and contemplated. Further, physically, in other implementations, one or more of these data processing designs are implemented outside of processing unit 110 for interfacing reasons, on-die routing and signal integrity reasons, or other reasons.
In some implementations, a cache memory subsystem is implemented as a L1 cache structure integrated within one or more of the processing units 122-124 that stores blocks of data. Memory subsystem 130 is implemented as a L2 or L3 cache structure and is directly coupled to clients 120. In various implementations, communication fabric 140 transfers data back and forth between clients 120, memory subsystem 130, and other external devices via the IF units 150-160. The data being transferred through fabric 450 includes data such as commands, messages, probes, interrupts, and data corresponding to the commands and messages. Interface units 150-160 include circuitry to receive packets and synchronize the packets to an internal clock used by the processing node 110.
Processing node 110 is coupled to one or more peripheral devices 170-172. Depending on the implementation of processing node 110, peripheral devices 170-172 include one or more of portable storage devices, display screens, gamepads, smartphones, personal data assistants (PDAs), portable audio/video players, cameras, or other. The peripheral devices 170-172 consist of several logical sub-devices that are referred to as device functions. A single peripheral device is capable of providing several functions. For example, a portable DVD player has both a video device function and built-in speakers, which is an audio device function. Other devices are contemplated to also be within the scope of the present invention. The specific type of peripheral used does not limit the invention.
As shown, the interface unit 150 includes connector ports 152-154. One or more of the links 182-184 are a cable with a head contact that inserts into a corresponding one of the connector ports 152-154. The links 182-184 and the connector ports 152-154 support data transfer and a communication protocol based on the type of a corresponding one of the peripheral devices 170-172. For example, the link 180 and the connector port 152 support the communication protocol of a serial data communications of a Universal Serial Bus (USB) when the peripheral device 170 is a USB device. Similarly, the link 182 and the connector port 154 support the communication protocol for transferring video data when the peripheral device 172 is a display screen or monitor. In such cases, the link 182 and the connector port 154 support the DisplayPort (DP) specification, the High-Definition Multimedia Interface (HDMI) specification, or other.
The peripheral devices 170-172, the links 182-184 and the connector ports 152-154 typically operate at relatively low voltage levels. Should an overvoltage event occur, then it is possible that one or more of the connector ports 152-154 and the head contact of a cable of the links 182-184 becomes permanently damaged. As described earlier, the link 182 includes a head contact of a cable that is inserted into the connector port 154 by a user. The connector port 154 uses multiple signal pins within a metal shell mounted on a printed circuit board. The multiple signal pins are connected to circuitry of the interface unit 150, which sends the corresponding data to clients 120 through the communication fabric 140.
The metal shell of the connector port 154 is electrically connected to a ground reference voltage level of the printed circuit board. At least one signal pin of the multiple signal pins is electrically connected to the ground reference voltage level though the spring pin 155 located between the shell and the first signal pin. Therefore, this signal pin is not floating. As the head contact of the cable of the link 182 is inserted by the user, the spring pin 155 a signal pin of the head contact physically connects to the signal pin of the connector port 154 and becomes electrically shorted to the ground reference voltage level. Shortly afterwards, the spring pins disconnects from the signal pin of the connector port 154. Since the two signal pins are at a same electrical potential, such as the ground reference voltage level, no electrostatic discharge occurs. In various implementations, the connector port 152 also includes at least one spring pin 153 to prevent a corresponding signal pin from being a floating signal.
Referring to
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The connector port 310 additionally includes the spring pin 412. Similar to the signal pin 410, although a single signal pin is shown, the connector port 310 includes any number of spring pins in various implementations. For example, in an implementation, each signal pin of the connector port 310 has a corresponding spring pin. The spring pin 412 is physically connected to each of the metal shell 414 and the signal pin 410. Since the spring pin 412 conducts, the signal pin 410 is electrically connected to the ground reference voltage level of the printed circuit board through the spring pin 412 and the metal shell 414. Therefore, the signal pin 410 is not floating.
The head contact 320 also has a signal pin 420. It is possible and contemplated that the head contact 320 has a same number of signal pins as the connector port 310. In contrast to the signal pin 410, there is no spring pin used with the signal pin 420 of the head contact 320. Therefore, the signal pin 420 is a floating signal. In some implementations, the signal pins 410 and 420 use copper metal or a mixture of copper and other conductive metals. The spring pin 412 uses stainless steel. In one implementation, the spring pin 412 uses the Society of Automotive Engineers (SAE) steel grade 304, which is equivalent to the Asian steel grade of SUS 304. As shown, the head contact 320 is partially inserted in the connector port 310, and the signal pin 420 has not yet made physical contact with the signal pin 410.
Referring to
The connector port 310 also includes the spring pin 512. The spring pin 512 is equivalent to the spring pin 412. For example, the spring pin 512 is physically connected to each of the metal shell 414 and the signal pin 510. Since the spring pin 512 conducts, the signal pin 510 is electrically connected to the ground reference voltage level of the printed circuit board through the spring pin 512 and the metal shell 414. Therefore, the signal pin 510 is not floating.
Turning now to
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A voltage level of a shielding (or metal shell) of a connector port is set to a ground reference voltage level of a computing system (block 902). For example, the connector port is embedded in an edge of the printed circuit board and a ground reference voltage level is routed to the shielding of the connector port. A voltage level of a first signal pin of the connector port is set to the ground reference voltage level via a spring pin between the shielding and the first signal pin (block 904). A user inserts, into the connector port, a head contact of a cable with a second signal pin that is floating (block 906). For example, the head contact and the cable are a link between the connector port and a peripheral device. The link is used to connect a display monitor, a Universal Serial Bus (USB) data storage device, or other.
If the second signal pin does not physically connect to the first signal pin (“no” branch of the conditional block 908), then the second signal pin of the head contact remains as a floating signal (block 910), and control flow of method 900 returns to conditional block 908. However, if the second signal pin becomes physically connected to the first signal pin (“yes” branch of the conditional block 908), then the first signal pin sets a voltage level of the second signal pin to the ground reference voltage level (block 912.) For example, due to the physical connection with the first signal pin, the second signal pin is electrically connected to the ground reference voltage level of the printed circuit board through the first signal pin, the spring pin, and the metal shell shielding of the connector port.
If the body or housing of the head contact does not push the spring pin causing physical disconnection from the first signal pin (“no” branch of the conditional block 914), then control flow of method 900 returns to block 912 where the first signal pin sets the voltage level of the second signal pin to the ground reference voltage level. Otherwise, if the body or housing of the head contact pushes the spring pin causing physical disconnection from the first signal pin (“yes” branch of the conditional block 914), then each of the first signal pin and the second signal pin remains at the ground reference voltage level until data is transmitted (block 916).
If a user does not begin removing the head contact from the connector port (“no” branch of the conditional block 1004), then control flow of method 1000 returns to block 1002 where the head contact and the connector port transfer data between using their signal pins. However, if the user begins removing the head contact from the connector port (“yes” branch of the conditional block 1004), then the head contact releases pressure on a spring pin of the connector port (block 1006). If the release of pressure does not allow the spring pin to physically contact the first signal pin (“no” branch of the conditional block 1008), then control flow of method 1000 returns to the block 1006 where the head contact releases pressure on the spring pin of the connector port. Otherwise, if the release of pressure does allow the spring pin to physically contact the first signal pin (“yes” branch of the conditional block 1008), then the spring pin sets a voltage level of each of the first signal pin and the second signal pin to the ground reference voltage level (block 1012). For example, the spring pin is now physically connected to each of the first signal pin and the metal shielding of the connector port. The metal shielding of the connector port is physically connected to a route on the printed circuit board that is electrically connected to the ground reference voltage level.
If the removal of the head contact has not yet caused physical connection to be removed between the first signal pin and the second signal pin (“no” branch of the conditional block 1014), then control flow of method 1000 returns to the block 1012 where the spring pin sets the voltage level of each of the first signal pin and the second signal pin to the ground reference voltage level. Otherwise, if the removal of the head contact has caused physical connection to be removed between the first signal pin and the second signal pin (“yes” branch of the conditional block 1014), then the ground reference voltage level on the first signal pin is maintained via the spring pin as the second signal pin becomes floating (block 1016).
It is noted that one or more of the above-described implementations include software. In such implementations, the program instructions that implement the methods and/or mechanisms are conveyed or stored on a computer readable medium. Numerous types of media which are configured to store program instructions are available and include hard disks, floppy disks, CD-ROM, DVD, flash memory, Programmable ROMs (PROM), random access memory (RAM), and various other forms of volatile or non-volatile storage. Generally speaking, a computer accessible storage medium includes any storage media accessible by a computer during use to provide instructions and/or data to the computer. For example, a computer accessible storage medium includes storage media such as magnetic or optical media, e.g., disk (fixed or removable), tape, CD-ROM, or DVD-ROM, CD-R, CD-RW, DVD-R, DVD-RW, or Blu-Ray. Storage media further includes volatile or non-volatile memory media such as RAM (e.g. synchronous dynamic RAM (SDRAM), double data rate (DDR, DDR2, DDR3, etc.) SDRAM, low-power DDR (LPDDR2, etc.) SDRAM, Rambus DRAM (RDRAM), static RAM (SRAM), etc.), ROM, Flash memory, non-volatile memory (e.g. Flash memory) accessible via a peripheral interface such as the Universal Serial Bus (USB) interface, etc. Storage media includes microelectromechanical systems (MEMS), as well as storage media accessible via a communication medium such as a network and/or a wireless link.
Additionally, in various implementations, program instructions include behavioral-level descriptions or register-transfer level (RTL) descriptions of the hardware functionality in a high level programming language such as C, or a design language (HDL) such as Verilog, VHDL, or database format such as GDS II stream format (GDSII). In some cases the description is read by a synthesis tool, which synthesizes the description to produce a netlist including a list of gates from a synthesis library. The netlist includes a set of gates, which also represent the functionality of the hardware including the system. The netlist is then placed and routed to produce a data set describing geometric shapes to be applied to masks. The masks are then used in various semiconductor fabrication steps to produce a semiconductor circuit or circuits corresponding to the system. Alternatively, the instructions on the computer accessible storage medium are the netlist (with or without the synthesis library) or the data set, as desired. Additionally, the instructions are utilized for purposes of emulation by a hardware based type emulator from such vendors as Cadence®, EVE®, and Mentor Graphics®.
Although the implementations above have been described in considerable detail, numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications.
